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dp_test.uasm
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// Checkoff benchmarks for 6.004 Design Project, Fall 2013
.include "beta.uasm"
. = 0
Reset: BR(Start)
IllOp: JMP(XP) // return to instruction following illop
Trap: .breakpoint
BR(Trap) // loop on unexpected interrupt
. = 0x20
LONG(tos) // Location 0x20 contains pointer to end
Start:
CMOVE(0, R0) // 051123 SAW: Avoid Ra bug in LDR
LDR(tosp,SP)
BR(bench0,LP) // q&d functionality test
BR(bench1,LP) // unsigned 16-bit divide
BR(bench2,LP) // list processing
BR(bench3,LP) // JIT emulation
BR(bench4,LP) // arithmetic for superscalars...
BR(bench5,LP) // RAM accesses
ST(LP,sdone,R31) // Store address of this instruction.
Done: .breakpoint
BR(Done)
tosp: LONG(tos)
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
////
//// Benchmark #0
////
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// Test all the instructions to make sure none of them have disappeared :)
// We don't require MUL or DIV.
// Here's how mismatches in memory locations correspond to possible bugs.
// The verification will report the memory address as a *word* address
// Memory addr Test
// 0x14A no test, expect 0
// 0x14B (test opcode 0b000001) should be an ILLOP, expect PC+4 = 0x80000060
// 0x14C (test opcode 0b000010) should be an ILLOP, expect PC+4 = 0x80000068
// 0x14D (test opcode 0b000011) should be an ILLOP, expect PC+4 = 0x80000070
// 0x14E (test opcode 0b000100) should be an ILLOP, expect PC+4 = 0x80000078
// 0x14F (test opcode 0b000101) should be an ILLOP, expect PC+4 = 0x80000080
// 0x150 (test opcode 0b000110) should be an ILLOP, expect PC+4 = 0x80000088
// 0x151 (test opcode 0b000111) should be an ILLOP, expect PC+4 = 0x80000090
// 0x152 (test opcode 0b001000) should be an ILLOP, expect PC+4 = 0x80000098
// 0x153 (test opcode 0b001001) should be an ILLOP, expect PC+4 = 0x800000A0
// 0x154 (test opcode 0b001010) should be an ILLOP, expect PC+4 = 0x800000A8
// 0x155 (test opcode 0b001011) should be an ILLOP, expect PC+4 = 0x800000B0
// 0x156 (test opcode 0b001100) should be an ILLOP, expect PC+4 = 0x800000B8
// 0x157 (test opcode 0b001101) should be an ILLOP, expect PC+4 = 0x800000C0
// 0x158 (test opcode 0b001110) should be an ILLOP, expect PC+4 = 0x800000C8
// 0x159 (test opcode 0b001111) should be an ILLOP, expect PC+4 = 0x800000D0
// 0x15A (test opcode 0b010000) should be an ILLOP, expect PC+4 = 0x800000D8
// 0x15B (test opcode 0b010001) should be an ILLOP, expect PC+4 = 0x800000E0
// 0x15C (test opcode 0b010010) should be an ILLOP, expect PC+4 = 0x800000E8
// 0x15D (test opcode 0b010011) should be an ILLOP, expect PC+4 = 0x800000F0
// 0x15E (test opcode 0b010100) should be an ILLOP, expect PC+4 = 0x800000F8
// 0x15F (test opcode 0b010101) should be an ILLOP, expect PC+4 = 0x80000100
// 0x160 (test opcode 0b010110) should be an ILLOP, expect PC+4 = 0x80000108
// 0x161 (test opcode 0b010111) should be an ILLOP, expect PC+4 = 0x80000110
// 0x162 (test opcode 0b011000) LD, expect Mem[0] = 0x73FF0008
// 0x163 no test, expect 0x00000000
// 0x164 (test opcode 0b011010) should be an ILLOP, expect PC+4 = 0x80000124
// 0x165 (test opcode 0b011011) JMP, expect PC+4 = 0x00000134 (user mode!)
// 0x166 (test opcode 0b011100) BEQ, expect PC+4 = 0x00000140
// 0x167 (test opcode 0b011101) BNE, expect PC+4 = 0x00000148
// 0x168 (test opcode 0b011110) should be an ILLOP, expect PC+4 = 0x00000154
// 0x169 (test opcode 0b011111) LDR, expect 0xDEADBEEF
// 0x16A (test opcode 0b100000) ADD, expect 0xDEADBEEF + 0x73FF0008 = 0x52ACBEF7
// 0x16B (test opcode 0b100001) SUB, expect 0xDEADBEEF - 0x73FF0008 = 0x6AAEBEE7
// 0x16C no test, expect 0x00000000
// 0x16D no test, expect 0x00000000
// 0x16E (test opcode 0b100100) two CMPEQ, add results, expect 0x00000001
// 0x16F (test opcode 0b100101) two CMPLT, add results, expect 0x00000001
// 0x170 (test opcode 0b100110) two CMPLE, add results, expect 0x00000001
// 0x171 (test opcode 0b100111) should be an ILLOP, expect PC+4 = 0x000001A0
// 0x172 (test opcode 0b101000) AND, expect 0xDEADBEEF & 0x73FF0008 = 0x52AD0008
// 0x173 (test opcode 0b101000) OR, expect 0xDEADBEEF | 0x73FF0008 = 0xFFFFBEEF
// 0x174 (test opcode 0b101010) XOR, expect 0xDEADBEEF ^ 0x73FF0008 = 0xAD52BEE7
// 0x175 (test opcode 0b101011) XNOR, expect ~(0xDEADBEEF ^ 0x73FF0008) = 0x52AD4118
// 0x176 (test opcode 0b101100) SHL, expect 0x73FF0008 << 4 = 0x3FF00080
// 0x177 (test opcode 0b101101) SHR, expect 0x73FF0008 >> 4 = 0x073FF000
// 0x178 (test opcode 0b101110) SRA, expect 0x73FF0008 >> 4 = 0x073FF000
// 0x179 (test opcode 0b101111) should be an ILLOP, expect PC+4 = 0x000001E4
// 0x17A (test opcode 0b110000) ADDC, expect -1 + 1 = 0x00000000
// 0x17B (test opcode 0b110001) SUBC, expect 0xDEADBEEF - (-1) = 0xDEADBEF0
// 0x17C no test, expect 0x00000000
// 0x17D no test, expect 0x00000000
// 0x17E (test opcode 0b110100) CMPEQC, expect 0x00000001
// 0x17F (test opcode 0b110101) CMPLTC, expect 0x00000001
// 0x180 (test opcode 0b110110) CMPLEC, expect 0x00000001
// 0x181 (test opcode 0b110111) should be an ILLOP, expect PC+4 = 0x00000214
// 0x182 (test opcode 0b111000) ANDC, expect 0xDEADBEEF & 0x7654 = 0x00003644
// 0x183 (test opcode 0b111000) ORC, expect 0xDEADBEEF & 0xFFFFFFFF = 0xFFFFFFFF
// 0x184 (test opcode 0b111010) XORC, expect 0xDEADBEEF & 0xFFFFFFFF = 0x21524110
// 0x185 (test opcode 0b111011) XNORC, expect 0xDEADBEEF & 0xFFFFFFFF = 0xDEADBEEF
// 0x186 (test opcode 0b111100) SHLC, expect 0x73FF8000 << 32 = 0x73FF0008
// 0x187 (test opcode 0b111101) SHRC, expect 0x73FF8000 >> 6 = 0X037AB6FB
// 0x188 (test opcode 0b111110) SRAC, expect 0x73FF8000 >> 7 = 0xFFBD5B7D
// 0x189 (test opcode 0b111111) should be an ILLOP, expect PC+4 = 0x00000254
// 0x190 expect 0xEDEDEDED, overwritten if JMP didn't JMP or BNE didn't branch
bench0:
PUSH(LP) // ADDC, ST
CMOVE(sbench0,LP) // pointer to where to store results
// test all opcodes!
// oops, skip magic built-in opcode 0
LONG(0b000001<<26) ST(XP, 4,LP) // illop => store PC+4 as "result"
LONG(0b000010<<26) ST(XP, 8,LP) // illop => store PC+4 as "result"
LONG(0b000011<<26) ST(XP,12,LP) // illop => store PC+4 as "result"
LONG(0b000100<<26) ST(XP,16,LP) // illop => store PC+4 as "result"
LONG(0b000101<<26) ST(XP,20,LP) // illop => store PC+4 as "result"
LONG(0b000110<<26) ST(XP,24,LP) // illop => store PC+4 as "result"
LONG(0b000111<<26) ST(XP,28,LP) // illop => store PC+4 as "result"
LONG(0b001000<<26) ST(XP,32,LP) // illop => store PC+4 as "result"
LONG(0b001001<<26) ST(XP,36,LP) // illop => store PC+4 as "result"
LONG(0b001010<<26) ST(XP,40,LP) // illop => store PC+4 as "result"
LONG(0b001011<<26) ST(XP,44,LP) // illop => store PC+4 as "result"
LONG(0b001100<<26) ST(XP,48,LP) // illop => store PC+4 as "result"
LONG(0b001101<<26) ST(XP,52,LP) // illop => store PC+4 as "result"
LONG(0b001110<<26) ST(XP,56,LP) // illop => store PC+4 as "result"
LONG(0b001111<<26) ST(XP,60,LP) // illop => store PC+4 as "result"
LONG(0b010000<<26) ST(XP,64,LP) // illop => store PC+4 as "result"
LONG(0b010001<<26) ST(XP,68,LP) // illop => store PC+4 as "result"
LONG(0b010010<<26) ST(XP,72,LP) // illop => store PC+4 as "result"
LONG(0b010011<<26) ST(XP,76,LP) // illop => store PC+4 as "result"
LONG(0b010100<<26) ST(XP,80,LP) // illop => store PC+4 as "result"
LONG(0b010101<<26) ST(XP,84,LP) // illop => store PC+4 as "result"
LONG(0b010110<<26) ST(XP,88,LP) // illop => store PC+4 as "result"
LONG(0b010111<<26) ST(XP,92,LP) // illop => store PC+4 as "result"
CMOVE(-1,R0)
LD(R0,1,R23) ST(R23,96,LP) // LD location 0
// we've been testing ST all along...
LONG(0b011010<<26) ST(XP,104,LP) // illop => store PC+4 as "result"
CMOVE(b0_jmp,R17) JMP(R17) ST(XP,sbench0_bad,R31)
b0_jmp: ST(R17,108,LP) // JMP
LDR(b0_consts+4,R13) BEQ(R13,.+4,XP) ST(XP,112,LP) // BEQ
BNE(R13,.+8,XP) ST(LP,sbench0_bad,R31) ST(XP,116,LP) // BNE
LONG(0b011110<<26) ST(XP,120,LP) // illop => store PC+4 as "result"
ST(R13,124,LP) // LDR
ADD(R13,R23,XP) ST(XP,128,LP) // ADD
SUB(R13,R23,XP) ST(XP,132,LP) // SUB
// skip MUL and DIV
CMPEQ(R13,R13,R2) CMPEQ(R13,R23,R3) ADD(R2,R3,XP) ST(XP,144,LP) // CMPEQ
CMPLT(R13,R13,R2) CMPLT(R13,R23,R3) ADD(R2,R3,XP) ST(XP,148,LP) // CMPLT
CMPLE(R13,R13,R2) CMPLE(R23,R13,R3) ADD(R2,R3,XP) ST(XP,152,LP) // CMPLE
LONG(0b100111<<26) ST(XP,156,LP) // illop => store PC+4 as "result"
AND(R13,R23,XP) ST(XP,160,LP)
OR(R13,R23,XP) ST(XP,164,LP)
XOR(R13,R23,XP) ST(XP,168,LP)
XNOR(R13,R23,XP) ST(XP,172,LP)
CMOVE(4,R2) SHL(R23,R2,XP) ST(XP,176,LP)
SHR(R23,R2,XP) ST(XP,180,LP)
SRA(R23,R2,XP) ST(XP,184,LP)
LONG(0b101111<<26) ST(XP,188,LP) // illop => store PC+4 as "result"
ADDC(R0,0x1,XP) ST(XP,192,LP) // worst case? -1 + 1
SUBC(R13,0xFFFF,XP) ST(XP,196,LP)
// skip MULC, DIVC
CMPEQC(LP,sbench0,XP) ST(XP,208,LP)
CMPLTC(R13,0,XP) ST(XP,212,LP)
CMPLEC(R0,-1,XP) ST(XP,216,LP) // worst case? -1 - -1, then compare
LONG(0b110111<<26) ST(XP,220,LP) // illop => store PC+4 as "result"
ANDC(R13,0x7654,XP) ST(XP,224,LP)
ORC(R13,0xFFFF,XP) ST(XP,228,LP)
XORC(R13,0xFFFF,XP) ST(XP,232,LP)
XNORC(R13,0xFFFF,R13) ST(R13,236,LP)
SHLC(R23,32,XP) ST(XP,240,LP)
SHRC(R13,6,XP) ST(XP,244,LP)
SRAC(R13,7,XP) ST(XP,248,LP)
LONG(0b111111<<26) ST(XP,252,LP) // illop => store PC+4 as "result"
POP(LP)
JMP(LP)
b0_consts:
LONG(0xABADBABE)
LONG(0xDEADBEEF)
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
////
//// Benchmark #1
////
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// This benchmark makes two calls to an subroutine
// that performs an unsigned divide of its arguments,
// and then checks the returned results.
bench1:
PUSH(LP)
CMOVE(32761,R0)
CMOVE(5,R1)
BR(UDiv16,LP)
ST(R1,sbench1,R31) // quotient: should be 6552 = 0x1998
ST(R0,sbench1+4,R31) // remainder: should be 1
CMOVE(32227,R0)
CMOVE(37,R1)
BR(UDiv16,LP)
ST(R1,sbench1+8,R31) // quotient: should be 871 = 0x367
ST(R0,sbench1+12,R31) // remainder: should be 0
POP(LP)
JMP(LP)
// unsigned 16-bit divide: R0 = dividend, R1 = divisor
// results: R0 = remainder, R1 = quotient
UDiv16:
CMOVE(16,R2) // W = 16
CMOVE(0,R3) // Q = 0
Uloop: SHL(R1,R2,R4) // r4 = divisor << iter
CMOVE(1,R5)
SHL(R5,R2,R5) // r5 = 1 << iter
CMPLTC(R0,0,R6)
BT(R6,Uneg)
SUB(R0,R4,R0) // R -= divisor << iter
ADD(R3,R5,R3) // Q += 1 << iter
BR(Unext)
Uneg: ADD(R0,R4,R0) // R += divisor << iter
SUB(R3,R5,R3) // Q -= 1 << iter
Unext: SUBC(R2,1,R2) // iter -= 1
CMPLTC(R2,0,R6)
BF(R6,Uloop)
CMPLTC(R0,0,R6)
BF(R6,Udone)
ADD(R1,R0,R0)
SUBC(R3,1,R3)
Udone: MOVE(R3,R1) // R0 = remainder, R1 = quotient
JMP(LP)
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
////
//// Benchmark #2
////
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// This benchmark makes two subroutine calls: one
// to do an in-place reverse an 11-element list,
// the second to compare the reversed list with a
// "answer" list to see if all went well.
bench2: PUSH(LP)
CMOVE(list1,R0)
PUSH(R0)
BR(Reverse,LP)
DEALLOCATE(1)
PUSH(R0)
CMOVE(list2,R0)
PUSH(R0)
BR(Equal,LP)
DEALLOCATE(2)
ST(R0,sbench2,R31) // should be 1
POP(LP)
JMP(LP)
// in-place reverse of list
Reverse:
PUSH(LP)
PUSH(BP)
MOVE(SP,BP)
PUSH(R1)
PUSH(R2)
CMOVE(0,R0) // last = nil
LD(BP,-12,R1)
BEQ(R1,Rdone)
Rloop:
LD(R1,4,R2) // next = cdr(this)
ST(R0,4,R1)
MOVE(R1,R0) // last = this
MOVE(R2,R1) // this = next
BNE(R1,Rloop)
Rdone: // return last
POP(R2)
POP(R1)
POP(BP)
POP(LP)
JMP(LP)
// see if two lists are equal
Equal:
PUSH(LP)
PUSH(BP)
MOVE(SP,BP)
PUSH(R1)
PUSH(R2)
PUSH(R3)
LD(BP,-12,R0)
LD(BP,-16,R1)
Eloop:
BNE(R0,E1) // if (null R0) and (null R1) return t
BEQ(R1,Etrue)
E1:
BEQ(R1,Efalse)
LD(R0,0,R2)
LD(R1,0,R3)
CMPEQ(R2,R3,R2)
BF(R2,Efalse)
LD(R0,4,R0)
LD(R1,4,R1)
BR(Eloop)
Efalse:
CMOVE(0,R0)
BR(Edone)
Etrue:
CMOVE(1,R0) // return t
Edone:
POP(R3)
POP(R2)
POP(R1)
POP(BP)
POP(LP)
JMP(LP)
list2: LONG(1)
LONG(list2a)
list2i: LONG(10)
LONG(list2j)
list2b: LONG(3)
LONG(list2c)
list2h: LONG(9)
LONG(list2i)
list2d: LONG(5)
LONG(list2e)
list2f: LONG(7)
LONG(list2g)
list2e: LONG(6)
LONG(list2f)
list2c: LONG(4)
LONG(list2d)
list2g: LONG(8)
LONG(list2h)
list2a: LONG(2)
LONG(list2b)
list2j: LONG(11)
LONG(0)
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
////
//// Benchmark #3
////
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// This benchmark makes a copy of itself 0x200
// bytes further up in memory and then jumps
// to the first location of the copy. The
// process is repeated 2 times.
bench3: PUSH(LP)
CMOVE(2,R2)
CMOVE(sbench3,R7)
b3Start:
BR(.+4,LP)
CMOVE(b3End-b3Start,R0)
MOVE(R7,R6)
b3Loop: LD(LP,-4,R1)
ST(R1,0,R7)
ADDC(LP,4,LP)
ADDC(R7,4,R7)
SUBC(R0,4,R0)
BNE(R0,b3Loop)
SUBC(R2,1,R2)
BEQ(R2,b3Done)
JMP(R6) // also enters user mode!
b3Done: POP(LP)
JMP(LP)
b3End:
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
////
//// Benchmark #4
////
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// This benchmark just performs a lot of register arithmetic
// and writes the result to memory -- should be a slam
// dunk for pipelined and superscalar machines.
bench4: CMOVE(0,R0) // initialize accumulators
CMOVE(0,R1)
CMOVE(20,R2) // loop counter
b4loop: ADDC(R0,1,R0)
ADDC(R1,3,R1)
ADD(R0,R1,R0)
ADD(R0,R1,R1)
SUBC(R2,1,R2)
BNE(R2,b4loop)
ADD(R1,R0,R0) // catch annullment problems
ST(R0,sbench4,R31) // should be 0x5D7BD920
JMP(LP)
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
////
//// Benchmark #5
////
//// This was put in just to make the cheap expedient of reducing main memory
//// not be sufficient to gain lots of points...
////
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
bench5:
CMOVE(4096, R0) // We'd better have 1024 words of RAM...
ST(LP, -4, R0)
LD(R0, -4, R0)
ST(R0, sbench5, R31)
JMP(LP)
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
////
//// Benchmark r/w storage
////
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
sbench0: // benchmark #1 results
. = . + (64*4) // one for each opcode
sbench0_bad:
LONG(0xEDEDEDED) // this one shouldn't be overwritten!
sbench1: // benchmark #1 results: 4 words
LONG(0xEDEDEDED) // should be overwritten...
LONG(0xEDEDEDED) // should be overwritten...
LONG(0xEDEDEDED) // should be overwritten...
LONG(0xEDEDEDED) // should be overwritten...
sbench2: // benchmark #2 results: 1 word + list
LONG(0xEDEDEDED)
list1x: LONG(1)
LONG(0)
list1i: LONG(10)
LONG(list1h)
list1b: LONG(3)
LONG(list1a)
list1h: LONG(9)
LONG(list1g)
list1d: LONG(5)
LONG(list1c)
list1f: LONG(7)
LONG(list1e)
list1e: LONG(6)
LONG(list1d)
list1c: LONG(4)
LONG(list1b)
list1g: LONG(8)
LONG(list1f)
list1a: LONG(2)
LONG(list1x)
list1: LONG(11)
LONG(list1i)
sbench3: // benchmark #3 results: 30 words
. = . + (4*30)
sbench4: // benchmark #4 results: 1 word
LONG(0xEDEDEDED) // should be overwritten...
sbench5:
LONG(0xBADBABE)
sdone: // finish marker
LONG(0xEDEDEDED) // should be overwritten...
tos: . = . + 0x100
. = 0x1000