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Add HIP backened to run on AMD hardware #12

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rcarson3 opened this issue May 11, 2020 · 1 comment · Fixed by #43
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Add HIP backened to run on AMD hardware #12

rcarson3 opened this issue May 11, 2020 · 1 comment · Fixed by #43
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enhancement New feature or request

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Add the necessary additions to ExaConstit to allow it to build with HIP
@rcarson3 rcarson3 added the enhancement New feature or request label May 11, 2020
@rcarson3 rcarson3 self-assigned this May 11, 2020
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An initial implementation should be fairly simple through the use of MFEM_FORALL's and RAJA. We will need to update our version of blt as seen in the LLNL/ExaCMech#5.

@rcarson3 rcarson3 linked a pull request Feb 11, 2022 that will close this issue
HIP implementation #43
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HIP implementation LLNL/ExaConstit
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