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lsm6dsv_reg.c
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/**
******************************************************************************
* @file lsm6dsv_reg.c
* @author Sensors Software Solution Team
* @brief LSM6DSV driver file
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2024 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#include "lsm6dsv_reg.h"
/**
* @defgroup LSM6DSV
* @brief This file provides a set of functions needed to drive the
* lsm6dsv enhanced inertial module.
* @{
*
*/
/**
* @defgroup Interfaces functions
* @brief This section provide a set of functions used to read and
* write a generic register of the device.
* MANDATORY: return 0 -> no Error.
* @{
*
*/
/**
* @brief Read generic device register
*
* @param ctx communication interface handler.(ptr)
* @param reg first register address to read.
* @param data buffer for data read.(ptr)
* @param len number of consecutive register to read.
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t __weak lsm6dsv_read_reg(const stmdev_ctx_t *ctx, uint8_t reg,
uint8_t *data,
uint16_t len)
{
int32_t ret;
if (ctx == NULL)
{
return -1;
}
ret = ctx->read_reg(ctx->handle, reg, data, len);
return ret;
}
/**
* @brief Write generic device register
*
* @param ctx communication interface handler.(ptr)
* @param reg first register address to write.
* @param data the buffer contains data to be written.(ptr)
* @param len number of consecutive register to write.
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t __weak lsm6dsv_write_reg(const stmdev_ctx_t *ctx, uint8_t reg,
uint8_t *data,
uint16_t len)
{
int32_t ret;
if (ctx == NULL)
{
return -1;
}
ret = ctx->write_reg(ctx->handle, reg, data, len);
return ret;
}
/**
* @}
*
*/
/**
* @defgroup Private functions
* @brief Section collect all the utility functions needed by APIs.
* @{
*
*/
static void bytecpy(uint8_t *target, uint8_t *source)
{
if ((target != NULL) && (source != NULL))
{
*target = *source;
}
}
/**
* @}
*
*/
/**
* @defgroup Sensitivity
* @brief These functions convert raw-data into engineering units.
* @{
*
*/
float_t lsm6dsv_from_sflp_to_mg(int16_t lsb)
{
return ((float_t)lsb) * 0.061f;
}
float_t lsm6dsv_from_fs2_to_mg(int16_t lsb)
{
return ((float_t)lsb) * 0.061f;
}
float_t lsm6dsv_from_fs4_to_mg(int16_t lsb)
{
return ((float_t)lsb) * 0.122f;
}
float_t lsm6dsv_from_fs8_to_mg(int16_t lsb)
{
return ((float_t)lsb) * 0.244f;
}
float_t lsm6dsv_from_fs16_to_mg(int16_t lsb)
{
return ((float_t)lsb) * 0.488f;
}
float_t lsm6dsv_from_fs125_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 4.375f;
}
float_t lsm6dsv_from_fs250_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 8.750f;
}
float_t lsm6dsv_from_fs500_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 17.50f;
}
float_t lsm6dsv_from_fs1000_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 35.0f;
}
float_t lsm6dsv_from_fs2000_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 70.0f;
}
float_t lsm6dsv_from_fs4000_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 140.0f;
}
float_t lsm6dsv_from_lsb_to_celsius(int16_t lsb)
{
return (((float_t)lsb / 256.0f) + 25.0f);
}
float_t lsm6dsv_from_lsb_to_nsec(uint32_t lsb)
{
return ((float_t)lsb * 21750.0f);
}
/*
* Original conversion routines taken from: https://github.com/numpy/numpy
*
* Converts from half-precision (16-bit) float number to single precision (32-bit).
*
* uint32_t static uint32_t ToFloatBits(uint16_t h);
* Released under BSD-3-Clause License
*/
static uint32_t ToFloatBits(uint16_t h)
{
uint16_t h_exp = (h & 0x7c00u);
uint32_t f_sgn = ((uint32_t)h & 0x8000u) << 16;
switch (h_exp)
{
case 0x0000u: // 0 or subnormal
{
uint16_t h_sig = (h & 0x03ffu);
// Signed zero
if (h_sig == 0)
{
return f_sgn;
}
// Subnormal
h_sig <<= 1;
while ((h_sig & 0x0400u) == 0)
{
h_sig <<= 1;
h_exp++;
}
uint32_t f_exp = ((uint32_t)(127 - 15 - h_exp)) << 23;
uint32_t f_sig = ((uint32_t)(h_sig & 0x03ffu)) << 13;
return f_sgn + f_exp + f_sig;
}
case 0x7c00u: // inf or NaN
// All-ones exponent and a copy of the significand
return f_sgn + 0x7f800000u + (((uint32_t)(h & 0x03ffu)) << 13);
default: // normalized
// Just need to adjust the exponent and shift
return f_sgn + (((uint32_t)(h & 0x7fffu) + 0x1c000u) << 13);
}
}
/**
* @brief Convert from 16-bit to 32-bit float number
*
* @param val Batching in FIFO buffer of SFLP values.
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
uint32_t lsm6dsv_from_f16_to_f32(uint16_t val)
{
return ToFloatBits(val);
}
/**
* @}
*
*/
/**
* @defgroup Accelerometer user offset correction
* @brief This section groups all the functions concerning the
* usage of Accelerometer user offset correction
* @{
*
*/
/**
* @brief Enables accelerometer user offset correction block; it is valid for the low-pass path.[set]
*
* @param ctx read / write interface definitions
* @param val Enables accelerometer user offset correction block; it is valid for the low-pass path.
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_xl_offset_on_out_set(const stmdev_ctx_t *ctx, uint8_t val)
{
lsm6dsv_ctrl9_t ctrl9;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL9, (uint8_t *)&ctrl9, 1);
if (ret == 0)
{
ctrl9.usr_off_on_out = val;
ret = lsm6dsv_write_reg(ctx, LSM6DSV_CTRL9, (uint8_t *)&ctrl9, 1);
}
return ret;
}
/**
* @brief Enables accelerometer user offset correction block; it is valid for the low-pass path.[get]
*
* @param ctx read / write interface definitions
* @param val Enables accelerometer user offset correction block; it is valid for the low-pass path.
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_xl_offset_on_out_get(const stmdev_ctx_t *ctx, uint8_t *val)
{
lsm6dsv_ctrl9_t ctrl9;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL9, (uint8_t *)&ctrl9, 1);
*val = ctrl9.usr_off_on_out;
return ret;
}
/**
* @brief Accelerometer user offset correction values in mg.[set]
*
* @param ctx read / write interface definitions
* @param val Accelerometer user offset correction values in mg.
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_xl_offset_mg_set(const stmdev_ctx_t *ctx,
lsm6dsv_xl_offset_mg_t val)
{
lsm6dsv_z_ofs_usr_t z_ofs_usr;
lsm6dsv_y_ofs_usr_t y_ofs_usr;
lsm6dsv_x_ofs_usr_t x_ofs_usr;
lsm6dsv_ctrl9_t ctrl9;
int32_t ret;
float_t tmp;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_Z_OFS_USR, (uint8_t *)&z_ofs_usr, 1);
ret += lsm6dsv_read_reg(ctx, LSM6DSV_Y_OFS_USR, (uint8_t *)&y_ofs_usr, 1);
ret += lsm6dsv_read_reg(ctx, LSM6DSV_X_OFS_USR, (uint8_t *)&x_ofs_usr, 1);
if (ret != 0)
{
return ret;
}
if ((val.x_mg < (0.0078125f * 127.0f)) && (val.x_mg > (0.0078125f * -127.0f)) &&
(val.y_mg < (0.0078125f * 127.0f)) && (val.y_mg > (0.0078125f * -127.0f)) &&
(val.z_mg < (0.0078125f * 127.0f)) && (val.z_mg > (0.0078125f * -127.0f)))
{
ctrl9.usr_off_w = 0;
tmp = val.z_mg / 0.0078125f;
z_ofs_usr.z_ofs_usr = (uint8_t)tmp;
tmp = val.y_mg / 0.0078125f;
y_ofs_usr.y_ofs_usr = (uint8_t)tmp;
tmp = val.x_mg / 0.0078125f;
x_ofs_usr.x_ofs_usr = (uint8_t)tmp;
}
else if ((val.x_mg < (0.125f * 127.0f)) && (val.x_mg > (0.125f * -127.0f)) &&
(val.y_mg < (0.125f * 127.0f)) && (val.y_mg > (0.125f * -127.0f)) &&
(val.z_mg < (0.125f * 127.0f)) && (val.z_mg > (0.125f * -127.0f)))
{
ctrl9.usr_off_w = 1;
tmp = val.z_mg / 0.125f;
z_ofs_usr.z_ofs_usr = (uint8_t)tmp;
tmp = val.y_mg / 0.125f;
y_ofs_usr.y_ofs_usr = (uint8_t)tmp;
tmp = val.x_mg / 0.125f;
x_ofs_usr.x_ofs_usr = (uint8_t)tmp;
}
else // out of limit
{
ctrl9.usr_off_w = 1;
z_ofs_usr.z_ofs_usr = 0xFFU;
y_ofs_usr.y_ofs_usr = 0xFFU;
x_ofs_usr.x_ofs_usr = 0xFFU;
}
ret = lsm6dsv_write_reg(ctx, LSM6DSV_Z_OFS_USR, (uint8_t *)&z_ofs_usr, 1);
ret += lsm6dsv_write_reg(ctx, LSM6DSV_Y_OFS_USR, (uint8_t *)&y_ofs_usr, 1);
ret += lsm6dsv_write_reg(ctx, LSM6DSV_X_OFS_USR, (uint8_t *)&x_ofs_usr, 1);
ret += lsm6dsv_write_reg(ctx, LSM6DSV_CTRL9, (uint8_t *)&ctrl9, 1);
return ret;
}
/**
* @brief Accelerometer user offset correction values in mg.[get]
*
* @param ctx read / write interface definitions
* @param val Accelerometer user offset correction values in mg.
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_xl_offset_mg_get(const stmdev_ctx_t *ctx,
lsm6dsv_xl_offset_mg_t *val)
{
lsm6dsv_z_ofs_usr_t z_ofs_usr;
lsm6dsv_y_ofs_usr_t y_ofs_usr;
lsm6dsv_x_ofs_usr_t x_ofs_usr;
lsm6dsv_ctrl9_t ctrl9;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL9, (uint8_t *)&ctrl9, 1);
ret += lsm6dsv_read_reg(ctx, LSM6DSV_Z_OFS_USR, (uint8_t *)&z_ofs_usr, 1);
ret += lsm6dsv_read_reg(ctx, LSM6DSV_Y_OFS_USR, (uint8_t *)&y_ofs_usr, 1);
ret += lsm6dsv_read_reg(ctx, LSM6DSV_X_OFS_USR, (uint8_t *)&x_ofs_usr, 1);
if (ret != 0)
{
return ret;
}
if (ctrl9.usr_off_w == PROPERTY_DISABLE)
{
val->z_mg = ((float_t)z_ofs_usr.z_ofs_usr * 0.0078125f);
val->y_mg = ((float_t)y_ofs_usr.y_ofs_usr * 0.0078125f);
val->x_mg = ((float_t)x_ofs_usr.x_ofs_usr * 0.0078125f);
}
else
{
val->z_mg = ((float_t)z_ofs_usr.z_ofs_usr * 0.125f);
val->y_mg = ((float_t)y_ofs_usr.y_ofs_usr * 0.125f);
val->x_mg = ((float_t)x_ofs_usr.x_ofs_usr * 0.125f);
}
return ret;
}
/**
* @}
*
*/
/**
* @brief Reset of the device.[set]
*
* @param ctx read / write interface definitions
* @param val Reset of the device.
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_reset_set(const stmdev_ctx_t *ctx, lsm6dsv_reset_t val)
{
lsm6dsv_func_cfg_access_t func_cfg_access;
lsm6dsv_ctrl3_t ctrl3;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL3, (uint8_t *)&ctrl3, 1);
ret += lsm6dsv_read_reg(ctx, LSM6DSV_FUNC_CFG_ACCESS, (uint8_t *)&func_cfg_access, 1);
if (ret != 0)
{
return ret;
}
ctrl3.boot = ((uint8_t)val & 0x04U) >> 2;
ctrl3.sw_reset = ((uint8_t)val & 0x02U) >> 1;
func_cfg_access.sw_por = (uint8_t)val & 0x01U;
ret = lsm6dsv_write_reg(ctx, LSM6DSV_CTRL3, (uint8_t *)&ctrl3, 1);
ret += lsm6dsv_write_reg(ctx, LSM6DSV_FUNC_CFG_ACCESS, (uint8_t *)&func_cfg_access, 1);
return ret;
}
/**
* @brief Global reset of the device.[get]
*
* @param ctx read / write interface definitions
* @param val Global reset of the device.
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_reset_get(const stmdev_ctx_t *ctx, lsm6dsv_reset_t *val)
{
lsm6dsv_func_cfg_access_t func_cfg_access;
lsm6dsv_ctrl3_t ctrl3;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL3, (uint8_t *)&ctrl3, 1);
ret += lsm6dsv_read_reg(ctx, LSM6DSV_FUNC_CFG_ACCESS, (uint8_t *)&func_cfg_access, 1);
if (ret != 0)
{
return ret;
}
switch ((ctrl3.sw_reset << 2) + (ctrl3.boot << 1) + func_cfg_access.sw_por)
{
case LSM6DSV_READY:
*val = LSM6DSV_READY;
break;
case LSM6DSV_GLOBAL_RST:
*val = LSM6DSV_GLOBAL_RST;
break;
case LSM6DSV_RESTORE_CAL_PARAM:
*val = LSM6DSV_RESTORE_CAL_PARAM;
break;
case LSM6DSV_RESTORE_CTRL_REGS:
*val = LSM6DSV_RESTORE_CTRL_REGS;
break;
default:
*val = LSM6DSV_GLOBAL_RST;
break;
}
return ret;
}
/**
* @brief Change memory bank.[set]
*
* @param ctx read / write interface definitions
* @param val MAIN_MEM_BANK, EMBED_FUNC_MEM_BANK,
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_mem_bank_set(const stmdev_ctx_t *ctx, lsm6dsv_mem_bank_t val)
{
lsm6dsv_func_cfg_access_t func_cfg_access;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_FUNC_CFG_ACCESS, (uint8_t *)&func_cfg_access, 1);
if (ret != 0)
{
return ret;
}
func_cfg_access.shub_reg_access = ((uint8_t)val & 0x02U) >> 1;
func_cfg_access.emb_func_reg_access = (uint8_t)val & 0x01U;
ret = lsm6dsv_write_reg(ctx, LSM6DSV_FUNC_CFG_ACCESS, (uint8_t *)&func_cfg_access, 1);
return ret;
}
/**
* @brief Change memory bank.[get]
*
* @param ctx read / write interface definitions
* @param val MAIN_MEM_BANK, SENSOR_HUB_MEM_BANK, EMBED_FUNC_MEM_BANK,
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_mem_bank_get(const stmdev_ctx_t *ctx, lsm6dsv_mem_bank_t *val)
{
lsm6dsv_func_cfg_access_t func_cfg_access;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_FUNC_CFG_ACCESS, (uint8_t *)&func_cfg_access, 1);
if (ret != 0)
{
return ret;
}
switch ((func_cfg_access.shub_reg_access << 1) + func_cfg_access.emb_func_reg_access)
{
case LSM6DSV_MAIN_MEM_BANK:
*val = LSM6DSV_MAIN_MEM_BANK;
break;
case LSM6DSV_EMBED_FUNC_MEM_BANK:
*val = LSM6DSV_EMBED_FUNC_MEM_BANK;
break;
case LSM6DSV_SENSOR_HUB_MEM_BANK:
*val = LSM6DSV_SENSOR_HUB_MEM_BANK;
break;
default:
*val = LSM6DSV_MAIN_MEM_BANK;
break;
}
return ret;
}
/**
* @brief Device ID.[get] THis function works also for OIS
* (WHO_AM_I and SPI2_WHO_AM_I have same address)
*
* @param ctx read / write interface definitions
* @param val Device ID.
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_device_id_get(const stmdev_ctx_t *ctx, uint8_t *val)
{
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_WHO_AM_I, val, 1);
return ret;
}
/**
* @brief Accelerometer output data rate (ODR) selection.[set]
*
* @param ctx read / write interface definitions
* @param val lsm6dsv_data_rate_t enum
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_xl_data_rate_set(const stmdev_ctx_t *ctx,
lsm6dsv_data_rate_t val)
{
lsm6dsv_ctrl1_t ctrl1;
lsm6dsv_haodr_cfg_t haodr;
uint8_t sel;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL1, (uint8_t *)&ctrl1, 1);
if (ret != 0)
{
return ret;
}
ctrl1.odr_xl = (uint8_t)val & 0x0Fu;
ret = lsm6dsv_write_reg(ctx, LSM6DSV_CTRL1, (uint8_t *)&ctrl1, 1);
if (ret != 0)
{
return ret;
}
sel = ((uint8_t)val >> 4) & 0xFU;
if (sel != 0U)
{
ret += lsm6dsv_read_reg(ctx, LSM6DSV_HAODR_CFG, (uint8_t *)&haodr, 1);
haodr.haodr_sel = sel;
ret += lsm6dsv_write_reg(ctx, LSM6DSV_HAODR_CFG, (uint8_t *)&haodr, 1);
}
return ret;
}
/**
* @brief Accelerometer output data rate (ODR) selection.[get]
*
* @param ctx read / write interface definitions
* @param val lsm6dsv_data_rate_t enum
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_xl_data_rate_get(const stmdev_ctx_t *ctx,
lsm6dsv_data_rate_t *val)
{
lsm6dsv_ctrl1_t ctrl1;
lsm6dsv_haodr_cfg_t haodr;
uint8_t sel;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL1, (uint8_t *)&ctrl1, 1);
ret += lsm6dsv_read_reg(ctx, LSM6DSV_HAODR_CFG, (uint8_t *)&haodr, 1);
if (ret != 0)
{
return ret;
}
sel = haodr.haodr_sel;
switch (ctrl1.odr_xl)
{
case LSM6DSV_ODR_OFF:
*val = LSM6DSV_ODR_OFF;
break;
case LSM6DSV_ODR_AT_1Hz875:
*val = LSM6DSV_ODR_AT_1Hz875;
break;
case LSM6DSV_ODR_AT_7Hz5:
*val = LSM6DSV_ODR_AT_7Hz5;
break;
case LSM6DSV_ODR_AT_15Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_15Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_15Hz625;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_12Hz5;
break;
}
break;
case LSM6DSV_ODR_AT_30Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_30Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_31Hz25;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_25Hz;
break;
}
break;
case LSM6DSV_ODR_AT_60Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_60Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_62Hz5;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_50Hz;
break;
}
break;
case LSM6DSV_ODR_AT_120Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_120Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_125Hz;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_100Hz;
break;
}
break;
case LSM6DSV_ODR_AT_240Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_240Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_250Hz;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_200Hz;
break;
}
break;
case LSM6DSV_ODR_AT_480Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_480Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_500Hz;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_400Hz;
break;
}
break;
case LSM6DSV_ODR_AT_960Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_960Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_1000Hz;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_800Hz;
break;
}
break;
case LSM6DSV_ODR_AT_1920Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_1920Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_2000Hz;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_1600Hz;
break;
}
break;
case LSM6DSV_ODR_AT_3840Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_3840Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_4000Hz;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_3200Hz;
break;
}
break;
case LSM6DSV_ODR_AT_7680Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_7680Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_8000Hz;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_6400Hz;
break;
}
break;
default:
*val = LSM6DSV_ODR_OFF;
break;
}
return ret;
}
/**
* @brief Accelerometer operating mode selection.[set]
*
* @param ctx read / write interface definitions
* @param val XL_HIGH_PERFORMANCE_MD, XL_HIGH_ACCURACY_ODR_MD, XL_LOW_POWER_2_AVG_MD, XL_LOW_POWER_4_AVG_MD, XL_LOW_POWER_8_AVG_MD, XL_NORMAL_MD,
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_xl_mode_set(const stmdev_ctx_t *ctx, lsm6dsv_xl_mode_t val)
{
lsm6dsv_ctrl1_t ctrl1;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL1, (uint8_t *)&ctrl1, 1);
if (ret == 0)
{
ctrl1.op_mode_xl = (uint8_t)val & 0x07U;
ret = lsm6dsv_write_reg(ctx, LSM6DSV_CTRL1, (uint8_t *)&ctrl1, 1);
}
return ret;
}
/**
* @brief Accelerometer operating mode selection.[get]
*
* @param ctx read / write interface definitions
* @param val XL_HIGH_PERFORMANCE_MD, XL_HIGH_ACCURACY_ODR_MD, XL_LOW_POWER_2_AVG_MD, XL_LOW_POWER_4_AVG_MD, XL_LOW_POWER_8_AVG_MD, XL_NORMAL_MD,
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_xl_mode_get(const stmdev_ctx_t *ctx, lsm6dsv_xl_mode_t *val)
{
lsm6dsv_ctrl1_t ctrl1;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL1, (uint8_t *)&ctrl1, 1);
if (ret != 0)
{
return ret;
}
switch (ctrl1.op_mode_xl)
{
case LSM6DSV_XL_HIGH_PERFORMANCE_MD:
*val = LSM6DSV_XL_HIGH_PERFORMANCE_MD;
break;
case LSM6DSV_XL_HIGH_ACCURACY_ODR_MD:
*val = LSM6DSV_XL_HIGH_ACCURACY_ODR_MD;
break;
case LSM6DSV_XL_ODR_TRIGGERED_MD:
*val = LSM6DSV_XL_ODR_TRIGGERED_MD;
break;
case LSM6DSV_XL_LOW_POWER_2_AVG_MD:
*val = LSM6DSV_XL_LOW_POWER_2_AVG_MD;
break;
case LSM6DSV_XL_LOW_POWER_4_AVG_MD:
*val = LSM6DSV_XL_LOW_POWER_4_AVG_MD;
break;
case LSM6DSV_XL_LOW_POWER_8_AVG_MD:
*val = LSM6DSV_XL_LOW_POWER_8_AVG_MD;
break;
case LSM6DSV_XL_NORMAL_MD:
*val = LSM6DSV_XL_NORMAL_MD;
break;
default:
*val = LSM6DSV_XL_HIGH_PERFORMANCE_MD;
break;
}
return ret;
}
/**
* @brief Gyroscope output data rate (ODR) selection.[set]
*
* @param ctx read / write interface definitions
* @param val lsm6dsv_data_rate_t enum
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_gy_data_rate_set(const stmdev_ctx_t *ctx,
lsm6dsv_data_rate_t val)
{
lsm6dsv_ctrl2_t ctrl2;
lsm6dsv_haodr_cfg_t haodr;
uint8_t sel;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL2, (uint8_t *)&ctrl2, 1);
ctrl2.odr_g = (uint8_t)val & 0x0Fu;
ret += lsm6dsv_write_reg(ctx, LSM6DSV_CTRL2, (uint8_t *)&ctrl2, 1);
if (ret != 0)
{
return ret;
}
sel = ((uint8_t)val >> 4) & 0xFU;
if (sel != 0U)
{
ret += lsm6dsv_read_reg(ctx, LSM6DSV_HAODR_CFG, (uint8_t *)&haodr, 1);
haodr.haodr_sel = sel;
ret += lsm6dsv_write_reg(ctx, LSM6DSV_HAODR_CFG, (uint8_t *)&haodr, 1);
}
return ret;
}
/**
* @brief Gyroscope output data rate (ODR) selection.[get]
*
* @param ctx read / write interface definitions
* @param val lsm6dsv_data_rate_t enum
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lsm6dsv_gy_data_rate_get(const stmdev_ctx_t *ctx,
lsm6dsv_data_rate_t *val)
{
lsm6dsv_ctrl2_t ctrl2;
lsm6dsv_haodr_cfg_t haodr;
uint8_t sel;
int32_t ret;
ret = lsm6dsv_read_reg(ctx, LSM6DSV_CTRL2, (uint8_t *)&ctrl2, 1);
ret += lsm6dsv_read_reg(ctx, LSM6DSV_HAODR_CFG, (uint8_t *)&haodr, 1);
if (ret != 0)
{
return ret;
}
sel = haodr.haodr_sel;
switch (ctrl2.odr_g)
{
case LSM6DSV_ODR_OFF:
*val = LSM6DSV_ODR_OFF;
break;
case LSM6DSV_ODR_AT_1Hz875:
*val = LSM6DSV_ODR_AT_1Hz875;
break;
case LSM6DSV_ODR_AT_7Hz5:
*val = LSM6DSV_ODR_AT_7Hz5;
break;
case LSM6DSV_ODR_AT_15Hz:
switch (sel)
{
default:
case 0:
*val = LSM6DSV_ODR_AT_15Hz;
break;
case 1:
*val = LSM6DSV_ODR_HA01_AT_15Hz625;
break;
case 2:
*val = LSM6DSV_ODR_HA02_AT_12Hz5;
break;
}
break;
case LSM6DSV_ODR_AT_30Hz:
switch (sel)
{