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dimms.txt
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# decode-dimms version 4.2
Memory Serial Presence Detect Decoder
By Philip Edelbrock, Christian Zuckschwerdt, Burkart Lingner,
Jean Delvare, Trent Piepho and others
Decoding EEPROM: /sys/bus/i2c/drivers/at24/0-0050
Guessing DIMM is in bank 1
Kernel driver used at24
---=== SPD EEPROM Information ===---
EEPROM Checksum of bytes 0-62 OK (0xDD)
# of bytes written to SDRAM EEPROM 128
Total number of bytes in EEPROM 256
Fundamental Memory type DDR2 SDRAM
SPD Revision 1.2
---=== Memory Characteristics ===---
Maximum module speed 800 MT/s (PC2-6400)
Size 2048 MB
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64
Ranks 2
SDRAM Device Width 8 bits
Module Height 30.0 mm
Module Type UDIMM (133.25 mm)
DRAM Package Planar
Voltage Interface Level SSTL 1.8V
Module Configuration Type No Parity
Refresh Rate Reduced (7.8 us) - Self Refresh
Supported Burst Lengths 4, 8
Supported CAS Latencies (tCL) 6T, 5T, 4T
tCL-tRCD-tRP-tRAS 6-6-6-18 as DDR2-800
5-5-5-15 as DDR2-666
4-4-4-12 as DDR2-533
Minimum Cycle Time 2.50 ns at CAS 6 (tCK min)
3.00 ns at CAS 5
3.75 ns at CAS 4
Maximum Access Time 0.40 ns at CAS 6 (tAC)
0.45 ns at CAS 5
0.50 ns at CAS 4
Maximum Cycle Time (tCK max) 8.00 ns (DDR2-250)
---=== Timings at Standard Speeds ===---
tCL-tRCD-tRP-tRAS as DDR2-800 6-6-6-18
tCL-tRCD-tRP-tRAS as DDR2-666 5-5-5-15
tCL-tRCD-tRP-tRAS as DDR2-533 4-4-4-12
tCL-tRCD-tRP-tRAS as DDR2-400 4-3-3-9
---=== Timing Parameters ===---
Address/Command Setup Time Before Clock (tIS) 0.17 ns
Address/Command Hold Time After Clock (tIH) 0.25 ns
Data Input Setup Time Before Strobe (tDS) 0.05 ns
Data Input Hold Time After Strobe (tDH) 0.12 ns
Minimum Row Precharge Delay (tRP) 15.00 ns
Minimum Row Active to Row Active Delay (tRRD) 7.50 ns
Minimum RAS# to CAS# Delay (tRCD) 15.00 ns
Minimum RAS# Pulse Width (tRAS) 45.00 ns
Write Recovery Time (tWR) 15.00 ns
Minimum Write to Read CMD Delay (tWTR) 7.50 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.50 ns
Minimum Active to Auto-refresh Delay (tRC) 60.00 ns
Minimum Recovery Delay (tRFC) 127.50 ns
Maximum DQS to DQ Skew (tDQSQ) 0.20 ns
Maximum Read Data Hold Skew (tQHS) 0.30 ns
---=== Manufacturing Information ===---
Manufacturer Kingston
Manufacturing Location Code 0x06
Part Number
Manufacturing Date 2010-W03
Assembly Serial Number 0x86296E1D
Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0052
Guessing DIMM is in bank 3
Kernel driver used eeprom
---=== SPD EEPROM Information ===---
EEPROM Checksum of bytes 0-62 OK (0xDD)
# of bytes written to SDRAM EEPROM 128
Total number of bytes in EEPROM 256
Fundamental Memory type DDR2 SDRAM
SPD Revision 1.2
---=== Memory Characteristics ===---
Maximum module speed 800 MT/s (PC2-6400)
Size 2048 MB
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64
Ranks 2
SDRAM Device Width 8 bits
Module Height 30.0 mm
Module Type UDIMM (133.25 mm)
DRAM Package Planar
Voltage Interface Level SSTL 1.8V
Module Configuration Type No Parity
Refresh Rate Reduced (7.8 us) - Self Refresh
Supported Burst Lengths 4, 8
Supported CAS Latencies (tCL) 6T, 5T, 4T
tCL-tRCD-tRP-tRAS 6-6-6-18 as DDR2-800
5-5-5-15 as DDR2-666
4-4-4-12 as DDR2-533
Minimum Cycle Time 2.50 ns at CAS 6 (tCK min)
3.00 ns at CAS 5
3.75 ns at CAS 4
Maximum Access Time 0.40 ns at CAS 6 (tAC)
0.45 ns at CAS 5
0.50 ns at CAS 4
Maximum Cycle Time (tCK max) 8.00 ns (DDR2-250)
---=== Timings at Standard Speeds ===---
tCL-tRCD-tRP-tRAS as DDR2-800 6-6-6-18
tCL-tRCD-tRP-tRAS as DDR2-666 5-5-5-15
tCL-tRCD-tRP-tRAS as DDR2-533 4-4-4-12
tCL-tRCD-tRP-tRAS as DDR2-400 4-3-3-9
---=== Timing Parameters ===---
Address/Command Setup Time Before Clock (tIS) 0.17 ns
Address/Command Hold Time After Clock (tIH) 0.25 ns
Data Input Setup Time Before Strobe (tDS) 0.05 ns
Data Input Hold Time After Strobe (tDH) 0.12 ns
Minimum Row Precharge Delay (tRP) 15.00 ns
Minimum Row Active to Row Active Delay (tRRD) 7.50 ns
Minimum RAS# to CAS# Delay (tRCD) 15.00 ns
Minimum RAS# Pulse Width (tRAS) 45.00 ns
Write Recovery Time (tWR) 15.00 ns
Minimum Write to Read CMD Delay (tWTR) 7.50 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.50 ns
Minimum Active to Auto-refresh Delay (tRC) 60.00 ns
Minimum Recovery Delay (tRFC) 127.50 ns
Maximum DQS to DQ Skew (tDQSQ) 0.20 ns
Maximum Read Data Hold Skew (tQHS) 0.30 ns
---=== Manufacturing Information ===---
Manufacturer Kingston
Manufacturing Location Code 0x06
Part Number
Manufacturing Date 2010-W01
Assembly Serial Number 0x750DBF7F
Number of SDRAM DIMMs detected and decoded: 2