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Using register retiming with yosys #3413

Answered by Ravenslofty
chidori430 asked this question in Q&A

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Are you synthesising for ASIC or FPGA? abc -dff -D 1 won't retime for FPGA.

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@chidori430

@Ravenslofty

@chidori430

@Ravenslofty

@chidori430

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