diff --git a/.gitignore b/.gitignore index bf5c80b9..c0e59a98 100644 --- a/.gitignore +++ b/.gitignore @@ -1,7 +1,9 @@ *.o *.u *.z +*.gcda gpsp.gpe tags cscope.out pandora/linux +bittboy/gpsp diff --git a/bittboy/Makefile b/bittboy/Makefile new file mode 100644 index 00000000..789b19ed --- /dev/null +++ b/bittboy/Makefile @@ -0,0 +1,41 @@ +# gpSP makefile +# Gilead Kutnick - Exophase +# pandora port - notaz +# respberry pi - DPR + +# Global definitions + +CC = /opt/bittboy-toolchain/usr/bin/arm-miyoo-linux-musleabi-gcc + +OBJS = main.o cpu.o memory.o video.o input.o sound.o gui.o \ + cheats.o zip.o arm_stub.o warm.o cpu_threaded.o video_blend.o + +BIN = gpsp + +# Platform specific definitions + +VPATH += .. ../arm +CFLAGS += -DARM_ARCH -DPC_BUILD -Wall +CFLAGS += -Ofast -fdata-sections -ffunction-sections -fno-PIC -fprofile-generate=/mnt/profile +CFLAGS += `/opt/bittboy-toolchain/arm-miyoo-linux-musleabi/sysroot/usr/bin/sdl-config --cflags` + +# expecting to have PATH set up to get correct sdl-config first + +LIBS += `sdl-config --libs` +LIBS += -ldl -lpthread -lz -lgcov -lasound -Wl,--as-needed -Wl,--gc-sections -flto -s + +# Compilation: + +all: $(BIN) + +%.o: %.S + $(CC) $(CFLAGS) -c -o $@ $< + + +cpu.o cpu_threaded.o: CFLAGS += -Wno-unused-variable -Wno-unused-label + +$(BIN): $(OBJS) + $(CC) $(OBJS) $(LIBS) -o $(BIN) + +clean: + rm -f *.o $(BIN) diff --git a/common.h b/common.h index fb7f31eb..406accb7 100644 --- a/common.h +++ b/common.h @@ -31,6 +31,10 @@ #define PATH_SEPARATOR_CHAR '/' #endif +#define prefetch(a,b) __builtin_prefetch(a,b) +#define likely(x) __builtin_expect((x),1) +#define unlikely(x) __builtin_expect((x),0) + // These includes must be used before SDL is included. #ifdef ARM_ARCH diff --git a/game_config.txt b/game_config.txt index 52c57845..6102344e 100644 --- a/game_config.txt +++ b/game_config.txt @@ -41,15 +41,6 @@ # you don't know what you're doing, it can break the game. Some games # will run miserably slowly without this option. -# translation_gate_target - tells the recompiler to put an indirect -# branch (gate) at this point, so artificially stop the current block. -# This is useful if the game performs self modifying code from within -# the same block it is currently executing - this can prevent it from -# causing SMC hits far more times than it should. This is also only a -# speed hack; you can have up to 8 of these. Don't use this if you don't -# know what you're doing, they'll just make the game slower and are -# rarely helpful (good for Camelot games). - # iwram_stack_optimize - set this to "no" to turn it off. By default this # is set on. It will turn off an optimization that assumes that the stack # is always in IWRAM, and thus makes ldm/stm relative to the stack much @@ -156,13 +147,6 @@ vender_code = 01 idle_loop_eliminate_target = 08000fae iwram_stack_optimize = no -# Hoshi no Kirby: Yume no Izumi Deluxe (J) -game_name = AGB KIRBY DX -game_code = A7KJ -vender_code = 01 -idle_loop_eliminate_target = 08000f92 -iwram_stack_optimize = no - # Kirby: Nightmare in Dreamland (E) game_name = AGB KIRBY DX game_code = A7KP @@ -170,6 +154,11 @@ vender_code = 01 idle_loop_eliminate_target = 08000fae iwram_stack_optimize = no +# Super Mario Advance (E) +game_name = SUPER MARIOA +game_code = AMAE +vender_code = 01 +idle_loop_eliminate_target = 08001cf2 # Super Mario Advance (U) game_name = SUPER MARIOA game_code = AMZE @@ -195,13 +184,6 @@ vender_code = 01 idle_loop_eliminate_target = 08000732 flash_rom_type = 128KB -# Super Mario Advance 4 (J) -game_name = SUPER MARIOD -game_code = AX4J -vender_code = 01 -idle_loop_eliminate_target = 08000732 -flash_rom_type = 128KB - # Super Mario Advance 4 (E) game_name = SUPER MARIOD game_code = AX4P @@ -225,13 +207,6 @@ vender_code = 01 idle_loop_eliminate_target = 080008ce flash_rom_type = 128KB -# Pokemon Emerald (J) -game_name = POKEMON EMER -game_code = BPEJ -vender_code = 01 -idle_loop_eliminate_target = 080008ce -flash_rom_type = 128KB - # Pokemon Emerald (G) game_name = POKEMON EMER game_code = BPED @@ -266,12 +241,6 @@ game_code = AXPE vender_code = 01 flash_rom_type = 128KB -# Pokemon Sapphire (J) -game_name = POKEMON SAPP -game_code = AXPJ -vender_code = 01 -flash_rom_type = 128KB - # Pokemon Sapphire (G) game_name = POKEMON SAPP game_code = AXPD @@ -302,12 +271,6 @@ game_code = AXVE vender_code = 01 flash_rom_type = 128KB -# Pokemon Ruby (J) -game_name = POKEMON RUBY -game_code = AXVJ -vender_code = 01 -flash_rom_type = 128KB - # Pokemon Ruby (G) game_name = POKEMON RUBY game_code = AXVD @@ -344,27 +307,6 @@ game_code = BM5E vender_code = 01 idle_loop_eliminate_target = 08033eec -# Pokemon: Sapphire (U) -game_name = POKEMON SAPP -game_code = AXPE -vender_code = 01 -flash_rom_type = 128KB - -# Pokemon: Sapphire (G) -game_name = POKEMON SAPP -game_code = AXPD -vender_code = 01 -flash_rom_type = 128KB - -# Pokemon: Fire Red (J) -game_name = POKEMON FIRE -game_code = BPRJ -vender_code = 01 -idle_loop_eliminate_target = 080008b2 -# If you have the European version try this instead. -#idle_loop_eliminate_target = 080008c6 -flash_rom_type = 128KB - # Pokemon: Fire Red (E/U) game_name = POKEMON FIRE game_code = BPRE @@ -395,7 +337,7 @@ flash_rom_type = 128KB # Pokemon: Fire Red (F) game_name = POKEMON FIRE -game_code = BPRE +game_code = BPRF vender_code = 01 idle_loop_eliminate_target = 080008c6 flash_rom_type = 128KB @@ -436,21 +378,15 @@ vender_code = 01 idle_loop_eliminate_target = 080008b6 flash_rom_type = 128KB -# Pokemon: Fushigi no Dungeon Aka no Kyuujotai (J) -game_name = POKE DUNGEON -game_code = B24J -vender_code = 01 -flash_rom_type = 128KB - -# Pokemon: Red Rescue Team (E/U) +# Pokemon: Red Rescue Team (U) game_name = POKE DUNGEON game_code = B24E vender_code = 01 flash_rom_type = 128KB -# F-Zero: Climax (J) -game_name = F-ZEROCLIMAX -game_code = BFTJ +# Pokemon: Red Rescue Team (E) +game_name = POKE DUNGEON +game_code = B24P vender_code = 01 flash_rom_type = 128KB @@ -477,28 +413,12 @@ game_code = BRLE vender_code = AF idle_loop_eliminate_target = 0800041a -# Golden Sun (U) -game_name = Golden_Sun_A -game_code = AGSE -vender_code = 01 -translation_gate_target = 03000820 -translation_gate_target = 030009ac -translation_gate_target = 03007dac - # Golden Sun: The Lost Age (U) # Probably the most horrifically coded GBA game in existence. game_name = GOLDEN_SUN_B game_code = AGFE vender_code = 01 idle_loop_eliminate_target = 08013542 -translation_gate_target = 030009ac -#translation_gate_target = 03007d70 - -# Nothing to see here :/ -# Mario & Luigi: Superstar Saga (U) -game_name = MARIO&LUIGIU -game_code = A88E -vender_code = 01 # Mario Party Advance (U) game_name = MARIOPARTYUS @@ -506,12 +426,6 @@ game_code = B8ME vender_code = 01 iwram_stack_optimize = no -# Mario Party Advance (J) -game_name = MARIOPARTYJA -game_code = B8MJ -vender_code = 01 -iwram_stack_optimize = no - # Mario Party Advance (E) game_name = MARIOPARTYEU game_code = B8MP @@ -524,17 +438,6 @@ game_code = BMGE vender_code = 01 iwram_stack_optimize = no idle_loop_eliminate_target = 08014e0a -translation_gate_target = 03000d00 -translation_gate_target = 03000a30 - -# Mario Golf: GBA Tour (J) -game_name = MARIOGOLFGBA -game_code = BMGJ -vender_code = 01 -iwram_stack_optimize = no -idle_loop_eliminate_target = 08014e0a -translation_gate_target = 03000d00 -translation_gate_target = 03000a30 # Mario Golf: Advance Tour (E) game_name = MARIOGOLFGBA @@ -542,8 +445,6 @@ game_code = BMGP vender_code = 01 iwram_stack_optimize = no idle_loop_eliminate_target = 08014e0a -translation_gate_target = 03000d00 -translation_gate_target = 03000a30 # Mario Golf: Advance Tour (S) game_name = MARIOGOLFGBA @@ -551,8 +452,6 @@ game_code = BMGS vender_code = 01 iwram_stack_optimize = no idle_loop_eliminate_target = 08014e0a -translation_gate_target = 03000d00 -translation_gate_target = 03000a30 # Mario Golf: Advance Tour (F) game_name = MARIOGOLFGBA @@ -560,8 +459,6 @@ game_code = BMGF vender_code = 01 iwram_stack_optimize = no idle_loop_eliminate_target = 08014e0a -translation_gate_target = 03000d00 -translation_gate_target = 03000a30 # Mario Golf: Advance Tour (I) game_name = MARIOGOLFGBA @@ -569,8 +466,6 @@ game_code = BMGI vender_code = 01 iwram_stack_optimize = no idle_loop_eliminate_target = 08014e0a -translation_gate_target = 03000d00 -translation_gate_target = 03000a30 # Mario Golf: Advance Tour (G) game_name = MARIOGOLFGBA @@ -578,8 +473,6 @@ game_code = BMGD vender_code = 01 iwram_stack_optimize = no idle_loop_eliminate_target = 08014e0a -translation_gate_target = 03000d00 -translation_gate_target = 03000a30 # Mario Golf: Advance Tour (A) game_name = MARIOGOLFGBA @@ -587,8 +480,6 @@ game_code = BMGU vender_code = 01 iwram_stack_optimize = no idle_loop_eliminate_target = 08014e0a -translation_gate_target = 03000d00 -translation_gate_target = 03000a30 # Tales of Phantasia (U) game_name = PHANTASIA @@ -596,12 +487,6 @@ game_code = AN8E vender_code = 01 iwram_stack_optimize = no -# Tales of Phantasia (J) -game_name = PHANTASIA -game_code = AN8J -vender_code = AF -iwram_stack_optimize = no - # Tales of Phantasia (E) game_name = PHANTASIA game_code = AN8P @@ -692,12 +577,6 @@ game_code = BPYE vender_code = 41 idle_loop_eliminate_target = 0808ff3a -# Rhythm Tengoku (J) -game_name = RHYTHMTENGOK -game_code = BRIJ -vender_code = 01 -idle_loop_eliminate_target = 080013d4 - # River City Ransom EX (U) game_name = RIVERCRANSOM game_code = BDTE @@ -868,31 +747,6 @@ game_code = ANXP vender_code = A4 iwram_stack_optimize = no -# Sennen Kazoku (J) -game_name = SENNENKAZOKU -game_code = BKAJ -vender_code = 01 -flash_rom_type = 128KB - -# Doom 2 (U) -game_name = DOOM II -game_code = A9DE -vender_code = 52 -translation_gate_target = 030041c8 -translation_gate_target = 03004fa0 - -# Bleach Advance (J) -game_name = BLEACH ADV1 -game_code = BLEJ -vender_code = 8P -iwram_stack_optimize = no - -# Shining Soul (J) -game_name = SHINING SOUL -game_code = AHUJ -vender_code = 8P -iwram_stack_optimize = no - # Shining Soul (U) game_name = SHINING SOUL game_code = AHUE @@ -905,12 +759,6 @@ game_code = AHUP vender_code = 8P iwram_stack_optimize = no -# Shining Soul 2 (J) -game_name = SHININGSOUL2 -game_code = AU2J -vender_code = 8P -iwram_stack_optimize = no - # Shining Soul 2 (U) game_name = SHININGSOUL2 game_code = AU2E @@ -943,10 +791,136 @@ idle_loop_eliminate_target = 080008a2 # This is needed to make the game work. # Another World (Homebrew) -game_name = FoxAnWorld -game_code = Home -vender_code = 00 -translation_gate_target = 03000f1c +# game_name = FoxAnWorld +# game_code = Home +# vender_code = 00 +# translation_gate_target = 03000f1c +# Nebuleon says: [2013-08-18] Translation gates have been totally disabled, +# but I'm not sure if this game works! + + +# 星のカービィ 夢の泉デラックス (J) +# Hoshi no Kirby: Yume no Izumi Deluxe (J) +game_name = AGB KIRBY DX +game_code = A7KJ +vender_code = 01 +idle_loop_eliminate_target = 08000f92 +iwram_stack_optimize = no + +# スーパーマリオアドバンス4 (J) +# Super Mario Advance 4 (J) +game_name = SUPER MARIOD +game_code = AX4J +vender_code = 01 +idle_loop_eliminate_target = 08000732 +flash_rom_type = 128KB + +# ポケットモンスター エメラルド (J) +# Pokemon Emerald (J) +game_name = POKEMON EMER +game_code = BPEJ +vender_code = 01 +idle_loop_eliminate_target = 080008ce +flash_rom_type = 128KB + +# ポケットモンスター サファイア (J) +# Pokemon Sapphire (J) +game_name = POKEMON SAPP +game_code = AXPJ +vender_code = 01 +flash_rom_type = 128KB + +# ポケットモンスター ルビー (J) +# Pokemon Ruby (J) +game_name = POKEMON RUBY +game_code = AXVJ +vender_code = 01 +flash_rom_type = 128KB + +# ポケットモンスター ファイアレッド (J) +# Pokemon: Fire Red (J) +game_name = POKEMON FIRE +game_code = BPRJ +vender_code = 01 +idle_loop_eliminate_target = 080008b2 +# If you have the European version try this instead. +#idle_loop_eliminate_target = 080008c6 +flash_rom_type = 128KB + +# ポケモン不思議のダンジョン 赤の救助隊 (J) +# Pokemon: Fushigi no Dungeon Aka no Kyuujotai (J) +# game_name = POKE DUNGEON +# game_code = B24J +# vender_code = 01 +# flash_rom_type = 128KB +# +# save type FLASH512_V131 64kB (512kbit), not 128kB (1024kbit) + +# F-ZERO クライマックス (J) +# F-Zero: Climax (J) +game_name = F-ZEROCLIMAX +game_code = BFTJ +vender_code = 01 +flash_rom_type = 128KB + +# マリオパーティアドバンス (J) +# Mario Party Advance (J) +game_name = MARIOPARTYJA +game_code = B8MJ +vender_code = 01 +iwram_stack_optimize = no + +# マリオゴルフGBAツアー (J) +# Mario Golf: GBA Tour (J) +game_name = MARIOGOLFGBA +game_code = BMGJ +vender_code = 01 +iwram_stack_optimize = no +idle_loop_eliminate_target = 08014e0a +translation_gate_target = 03000d00 +translation_gate_target = 03000a30 + +# テイルズ オブ ファンタジア (J) +# Tales of Phantasia (J) +game_name = PHANTASIA +game_code = AN8J +vender_code = AF +iwram_stack_optimize = no + +# リズム天国 (J) +# Rhythm Tengoku (J) +game_name = RHYTHMTENGOK +game_code = BRIJ +vender_code = 01 +idle_loop_eliminate_target = 080013d4 + +# 千年家族 (J) +# Sennen Kazoku (J) +game_name = SENNENKAZOKU +game_code = BKAJ +vender_code = 01 +flash_rom_type = 128KB + +# BLEACHアドバンス 紅に染まる尸魂界 (J) +# Bleach Advance (J) +game_name = BLEACH ADV1 +game_code = BLEJ +vender_code = 8P +iwram_stack_optimize = no + +# シャイニング・ソウル (J) +# Shining Soul (J) +game_name = SHINING SOUL +game_code = AHUJ +vender_code = 8P +iwram_stack_optimize = no + +# シャイニング・ソウル2 (J) +# Shining Soul 2 (J) +game_name = SHININGSOUL2 +game_code = AU2J +vender_code = 8P +iwram_stack_optimize = no # J.LEAGUE プロサッカークラブをつくろう！アドバンス (J) @@ -984,6 +958,13 @@ game_code = AORJ vender_code = 01 iwram_stack_optimize = no +# 黄金の太陽 失われし時代 (J) +# Ougon no Taiyo - Ushinawareshi Toki (J) +game_name = OUGONTAIYO_B +game_code = AGFJ +vender_code = 01 +idle_loop_eliminate_target = 08013542 + # カルチョビット (J) # Calciobit (J) game_name = CALCIOBIT01 @@ -1026,6 +1007,55 @@ game_code = ASMJ vender_code = AG iwram_stack_optimize = no +# 西原理恵子の殿堂麻雀 (J) +# Nishihara Rieko no Dendou Mahjong (J) +game_name = NishiharaDMJ +game_code = ASMJ +vender_code = AG +iwram_stack_optimize = no + +# ハドソンベストコレクションVol.1 ボンバーマンコレクション (J) +# Hudson Best Collection Vol.1 - Bomberman Collection (J) +game_name = HUBEST_VOL01 +game_code = B7IJ +vender_code = 18 +iwram_stack_optimize = no + +# ハドソンベストコレクションVol.2 ロードランナーコレクション (J) +# Hudson Best Collection Vol.2 - Lode Runner Collection (J) +game_name = HUBEST_VOL02 +game_code = B72J +vender_code = 18 +iwram_stack_optimize = no + +# ハドソンベストコレクションVol.3 アクションコレクション (J) +# Hudson Best Collection Vol.3 - Action Collection (J) +game_name = HUBEST_VOL03 +game_code = B73J +vender_code = 18 +iwram_stack_optimize = no + +# ハドソンベストコレクションVol.4 謎解きコレクション (J) +# Hudson Best Collection Vol.4 - Nazotoki Collection (J) +game_name = HUBEST_VOL04 +game_code = B74J +vender_code = 18 +iwram_stack_optimize = no + +# ハドソンベストコレクションVol.5 シューティングコレクション (J) +# Hudson Best Collection Vol.5 - Shooting Collection (J) +game_name = HUBEST_VOL05 +game_code = B75J +vender_code = 18 +iwram_stack_optimize = no + +# ハドソンベストコレクションVol.6 冒険島コレクション (J) +# Hudson Best Collection Vol.6 - Bouken Jima Collection (J) +game_name = HUBEST_VOL06 +game_code = B76J +vender_code = 18 +iwram_stack_optimize = no + # ボンバーマンジェッターズ ゲームコレクション (J) # Bomberman Jetters Game Collection (J) game_name = BOMBERMANJGC @@ -1047,6 +1077,13 @@ game_code = AJOJ vender_code = C8 iwram_stack_optimize = no +# マリオテニスアドバンス (J) +# Mario Tennis Advance (J) +game_name = MARIOTENNISA +game_code = BTMJ +vender_code = 01 +idle_loop_eliminate_target = 08013888 + # メダル オブ オナー (J) # Medal of Honor (J) game_name = INFILTRATOR @@ -1106,3 +1143,306 @@ game_name = ALADDIN game_code = BADE vender_code = 08 iwram_stack_optimize = no + +# set backup media +# savetype - "sram", "flash", "eeprom" + +# でじこミュニケーション2 〜打倒！ブラックゲマゲマ団〜 (J) +# Digi Communication 2 - Datou! Black Gemagema Dan (J) +game_name = DC2 +game_code = BDKJ +vender_code = G7 +save_type = eeprom + +# ドラゴンボールZ - THE LEGACY OF GOKU 2 INTERNATIONAL (J) +# Dragon Ball Z - The Legacy of Goku II International (J) +game_name = DBZLGCYGOKU2 +game_code = ALFJ +vender_code = D9 +save_type = eeprom + +# Castlevania: Circle of the Moon (E) +game_name = DRACULA AGB1 +game_code = AAMP +vender_code = A4 +idle_loop_eliminate_target = 080003d2 + +# Megaman Battle Network (E) +game_name = MEGAMAN_BN +game_code = AREP +vender_code = 08 +idle_loop_eliminate_target = 08000338 + +# Megaman Battle Network 2 (E) +game_name = MEGAMAN_EXE2 +game_code = AE2P +vender_code = 08 +idle_loop_eliminate_target = 08000358 + +# Megaman Battle Network 3 White (E) +game_name = MEGA_EXE3_WH +game_code = A6BP +vender_code = 08 +idle_loop_eliminate_target = 0800036c + +# Megaman Battle Network 3 Blue (E) +game_name = MEGA_EXE3_BL +game_code = A3XP +vender_code = 08 +idle_loop_eliminate_target = 0800036c + +# Megaman Battle Network 4 Red Sun (E) +game_name = MEGAMANBN4RS +game_code = B4WP +vender_code = 08 +idle_loop_eliminate_target = 080003a6 + +# Megaman Battle Network 4 Blue Moon (E) +game_name = MEGAMANBN4BM +game_code = B4BP +vender_code = 08 +idle_loop_eliminate_target = 080003a6 + +# Megaman Battle Network 5 Team Protoman (E) +game_name = MEGAMAN5_TP_ +game_code = BRBP +vender_code = 08 +idle_loop_eliminate_target = 080003ca + +# Megaman Battle Network 5 Team Colonel (E) +game_name = MEGAMAN5_TC_ +game_code = BRKP +vender_code = 08 +idle_loop_eliminate_target = 080003ca + +# Megaman Battle Network 6 Cybeast Gregar (E) +game_name = MEGAMAN6_GXX +game_code = BR5P +vender_code = 08 +idle_loop_eliminate_target = 080003da + +# Megaman Zero 2 (E) +game_name = MEGAMANZERO2 +game_code = A62P +vender_code = 08 +idle_loop_eliminate_target = 08000664 + +# Megaman Zero 3 (E) +game_name = MEGAMANZERO3 +game_code = BZ3P +vender_code = 08 +idle_loop_eliminate_target = 08001a08 + +# Megaman Zero 4 (E) +game_name = MEGAMANZERO4 +game_code = B4ZP +vender_code = 08 +idle_loop_eliminate_target = 0800090c + +# Super Mario Advance (U/E) +game_name = SUPER MARIOA +game_code = AMAE +vender_code = 01 +idle_loop_eliminate_target = 08001cf2 + +# Super Mario Advance 2 (E) +game_name = SUPER MARIOB +game_code = AA2P +vender_code = 01 +idle_loop_eliminate_target = 08000534 + +# Super Mario Advance 3 (E) +game_name = SUPER MARIOC +game_code = A3AP +vender_code = 01 +idle_loop_eliminate_target = 08002ba4 + +# Advance Wars (E) +# This one was really annoying to find, I hope it's okay.. there +# might be a better one somewhere. +game_name = ADVANCEWARS +game_code = AWRP +vender_code = 01 +idle_loop_eliminate_target = 0803880a + +# Mario Vs Donkey Kong (E) +game_name = MARIOVSDK +game_code = BM5P +vender_code = 01 +idle_loop_eliminate_target = 08033eec + +# Final Fantasy Tactics Advance (E) +game_name = FFTA_USVER. +game_code = AFXP +vender_code = 01 +idle_loop_eliminate_target = 0800041e + +# Gradius Galaxies (E) +# Badly coded game with several idle loops. This one works for level +# one at least. +game_name = GRADIUSGALAX +game_code = AGAP +vender_code = A4 +idle_loop_eliminate_target = 08013844 + +# Rebelstar: Tactical Command (E) +# Badly coded game with several idle loops. I don't think any are +# even close to dominant, and it jumps around too much when things +# matter.... +game_name = REBELSTAR +game_code = BRLP +vender_code = AF +idle_loop_eliminate_target = 0800041a + +# Golden Sun: The Lost Age (S) +# Probably the most horrifically coded GBA game in existence. +game_name = GOLDEN_SUN_B +game_code = AGFS +vender_code = 01 +idle_loop_eliminate_target = 08013542 + +# Broken Sword - The Shadow of the Templars (E) +game_name = BROKENSWORD +game_code = ABJP +vender_code = 6L +idle_loop_eliminate_target = 08000a26 + +# Defender of The Crown (E) +game_name = DOTC +game_code = ADHP +vender_code = 5N +idle_loop_eliminate_target = 080007ec + +# Metal Slug Advance (E) +game_name = METAL SLUG +game_code = BSMP +vender_code = B7 +idle_loop_eliminate_target = 08000298 + +# Magical Quest 2 Starring Mickey & Minnie (E) +game_name = M&M MAGICAL2 +game_code = AQMP +vender_code = 08 +idle_loop_eliminate_target = 0801d340 + +# Magical Quest 3 Starring Mickey & Donald (E) +game_name = M&D MAGICAL3 +game_code = BMQP +vender_code = 08 +idle_loop_eliminate_target = 08016064 + +# Prince of Persia - The Sands of Time (E) +game_name = PRINCEPERSIA +game_code = BPYP +vender_code = 41 +idle_loop_eliminate_target = 0808ff3a + +# Super Puzzle Fighter II Turbo (E) +game_name = PUZZLEFIGHT2 +game_code = AZ8P +vender_code = 08 +idle_loop_eliminate_target = 08002b5e + +# Yu-Gi-Oh! - Dungeon Dice Monsters (E) +game_name = YU-GI-OH DDM +game_code = AYDP +vender_code = A4 +idle_loop_eliminate_target = 0802cc6a + +# Yu-Gi-Oh! - The Sacred Cards (E) +game_name = YUGIOH DM7 +game_code = AY7P +vender_code = A4 +idle_loop_eliminate_target = 08003bd6 + +# Yu-Gi-Oh! - World Championship Tournament 2004 (E) +game_name = YWCT2004USA +game_code = BYWP +vender_code = A4 +idle_loop_eliminate_target = 080831da + +# Yu-Gi-Oh! - Worldwide Edition - Stairway to the Destined Duel (E) +game_name = YUGIOHWWE +game_code = AYWP +vender_code = A4 +idle_loop_eliminate_target = 08089792 + +# Wario Ware, Inc. Mega Microgames (E) +game_name = WARIOWAREINC +game_code = AZWP +vender_code = 01 +idle_loop_eliminate_target = 08000f66 + +# Tom Clancy's Splinter Cell (E) +game_name = SPLINTERCELL +game_code = AO4P +vender_code = 41 +idle_loop_eliminate_target = 0807a0c4 + +# Tom Clancy's Splinter Cell - Pandora Tomorrow (E) +game_name = TOM CLANCY'S +game_code = BSLP +vender_code = 41 +idle_loop_eliminate_target = 0807785e + +# Final Fantasy IV Advance (E) +game_name = FF4ADVANCE +game_code = BZ4P +vender_code = 01 +idle_loop_eliminate_target = 0800fabe +# or try 00000430 + +# Digimon Battle Spirit (E) +game_name = DIGIMON BTSP +game_code = A8SP +vender_code = B2 +idle_loop_eliminate_target = 08011208 + +# Digimon Battle Spirit 2 (E) +game_name = DIGIMON BS2 +game_code = BDSP +vender_code = B2 +idle_loop_eliminate_target = 08010eb0 + +# Donald Duck Advance (E) +game_name = DISNEY'S DON +game_code = ADKP +vender_code = 41 +idle_loop_eliminate_target = 08002f30 + +# Final Fight One (E) +game_name = FINAL FIGHT +game_code = AFFP +vender_code = 08 +idle_loop_eliminate_target = 0800b428 + +# Megaman Battle Chip Challenge (E) +game_name = BATTLECHIPGP +game_code = A89P +vender_code = 08 +idle_loop_eliminate_target = 08000544 + +# Monster Force (E) +game_name = MONSTERFORCE +game_code = AM8P +vender_code = 7D +idle_loop_eliminate_target = 08000b00 + +# The Pinball of The Dead (E) +game_name = PINBALL DEAD +game_code = APDP +vender_code = 78 +idle_loop_eliminate_target = 08000300 + +# Tringo (E) +game_name = TRINGO +game_code = BTJP +vender_code = 4Z +idle_loop_eliminate_target = 080009a4 + +# Virtual Kasparov (E) +game_name = VIRTKASPAROV +game_code = AVKP +vender_code = 60 +idle_loop_eliminate_target = 0800093a + diff --git a/gui.c b/gui.c index 17796562..e3e0dec0 100644 --- a/gui.c +++ b/gui.c @@ -769,7 +769,7 @@ static const char *scale_options[] = #elif defined(RPI_BUILD) "fullscreen" #else - "unscaled 3:2" + "unscaled 3:2", "scaled 3:2", "fullscreen" #endif }; @@ -1653,7 +1653,7 @@ u32 menu(u16 *original_screen) clear_screen(COLOR_BG); #ifndef GP2X_BUILD - blit_to_screen(original_screen, 240, 160, 230, 40); + //blit_to_screen(original_screen, 240, 160, 80, 40); #endif current_menu = new_menu; diff --git a/input.c b/input.c index f01c53d1..818d6d38 100644 --- a/input.c +++ b/input.c @@ -21,6 +21,8 @@ // Special thanks to psp298 for the analog->dpad code! +extern uint16_t io_registers[1024 * 16]; + void trigger_key(u32 key) { u32 p1_cnt = io_registers[REG_P1CNT]; @@ -606,7 +608,7 @@ u32 key_map(SDLKey key_sym) case SDLK_LSHIFT: return BUTTON_L; - case SDLK_x: + case SDLK_SPACE: return BUTTON_R; case SDLK_DOWN: @@ -624,7 +626,7 @@ u32 key_map(SDLKey key_sym) case SDLK_RETURN: return BUTTON_START; - case SDLK_RSHIFT: + case SDLK_RCTRL: return BUTTON_SELECT; case SDLK_LCTRL: @@ -706,10 +708,11 @@ gui_action_type get_gui_input() break; case SDLK_RETURN: + case SDLK_LCTRL: gui_action = CURSOR_SELECT; break; - case SDLK_BACKSPACE: + case SDLK_LALT: gui_action = CURSOR_BACK; break; default: @@ -761,22 +764,26 @@ gui_action_type get_gui_input() u32 update_input() { SDL_Event event; - + + io_registers[REG_P1] = (~key) & 0x3FF; + while(SDL_PollEvent(&event)) { switch(event.type) { case SDL_QUIT: + { quit(); - + } case SDL_KEYDOWN: { - if(event.key.keysym.sym == SDLK_ESCAPE) + /* Disable Exiting for the bittboy, we will quit from the menu instead */ + /*if(event.key.keysym.sym == SDLK_ESCAPE) { quit(); - } + }*/ #ifdef PC_BUILD - if(event.key.keysym.sym == SDLK_BACKSPACE) + if(event.key.keysym.sym == SDLK_RCTRL) #else if(event.key.keysym.sym == SDLK_F10) #endif @@ -862,39 +869,10 @@ u32 update_input() key &= ~(key_map(event.key.keysym.sym)); break; } - - case SDL_JOYBUTTONDOWN: - { - key |= joy_map(event.jbutton.button); - trigger_key(key); - break; - } - - case SDL_JOYBUTTONUP: - { - key &= ~(joy_map(event.jbutton.button)); - break; - } -#ifdef RPI_BUILD - case SDL_JOYAXISMOTION: - { - if (event.jaxis.axis==0) { //Left-Right - key &= ~(BUTTON_LEFT|BUTTON_RIGHT); - if (event.jaxis.value < -3200) key |= BUTTON_LEFT; - else if (event.jaxis.value > 3200) key |= BUTTON_RIGHT; - } - if (event.jaxis.axis==1) { //Up-Down - key &= ~(BUTTON_UP|BUTTON_DOWN); - if (event.jaxis.value < -3200) key |= BUTTON_UP; - else if (event.jaxis.value > 3200) key |= BUTTON_DOWN; - } - break; -#endif - } } } - io_registers[REG_P1] = (~key) & 0x3FF; + return 0; } diff --git a/pandora/Makefile b/pandora/Makefile deleted file mode 100644 index 32333d86..00000000 --- a/pandora/Makefile +++ /dev/null @@ -1,53 +0,0 @@ -# gpSP makefile -# Gilead Kutnick - Exophase -# pandora port - notaz - -# Global definitions - -CC = $(CROSS_COMPILE)gcc - -OBJS = pnd.o main.o cpu.o memory.o video.o input.o sound.o gui.o \ - cheats.o zip.o cpu_threaded.o arm_stub.o video_blend.o warm.o \ - neon_scale2x.o neon_scale3x.o neon_eagle2x.o \ - linux/fbdev.o linux/xenv.o -BIN = gpsp - -# Platform specific definitions - -VPATH += .. ../arm -CFLAGS += -DARM_ARCH -DPND_BUILD -Wall -CFLAGS += -mcpu=cortex-a8 -mtune=cortex-a8 -mfloat-abi=softfp -mfpu=neon -ffast-math -CFLAGS += -ggdb -ifndef DEBUG -CFLAGS += -O2 -endif - -# expecting to have PATH set up to get correct sdl-config first -CFLAGS += `sdl-config --cflags` -LIBS += `sdl-config --libs` -LIBS += -ldl -lpthread -lz - -# Compilation: - -all: $(BIN) picorestore - -%.o: %.S - $(CC) $(CFLAGS) -c -o $@ $< - -cpu.o cpu_threaded.o: CFLAGS += -Wno-unused-variable -Wno-unused-label - -$(BIN): $(OBJS) - $(CC) $(OBJS) $(LIBS) -o $(BIN) - -clean: - rm -f *.o $(BIN) picorestore - -# ----------- release ----------- - -PND_MAKE ?= $(HOME)/dev/pnd/src/pandora-libraries/testdata/scripts/pnd_make.sh - -rel: gpsp gpsp.sh gpsp.pxml gba_icon.png picorestore readme.txt ../game_config.txt ../COPYING.DOC - rm -rf out - mkdir out - cp $^ out/ - $(PND_MAKE) -p gpsp.pnd -d out -x out/gpsp.pxml -i out/gba_icon.png -c diff --git a/pandora/gba_icon.png b/pandora/gba_icon.png deleted file mode 100644 index 30466fdb..00000000 Binary files a/pandora/gba_icon.png and /dev/null differ diff --git a/pandora/gpsp.pxml b/pandora/gpsp.pxml deleted file mode 100644 index da2d150b..00000000 --- a/pandora/gpsp.pxml +++ /dev/null @@ -1,40 +0,0 @@ - - - - - gpSP - - - - - - - gpSP - - gpSP - - - An optimized GBA emulator. - - - - - - - - - - - - - - - - - - - - - - - diff --git a/pandora/gpsp.sh b/pandora/gpsp.sh deleted file mode 100755 index 76bdf3b1..00000000 --- a/pandora/gpsp.sh +++ /dev/null @@ -1,11 +0,0 @@ -#!/bin/sh - -if [ ! -f romdir.txt ]; then - echo -n "/media/" > romdir.txt -fi -sudo -n /usr/pandora/scripts/op_lcdrate.sh 60 - -./gpsp "$@" - -# restore stuff in case of crash -./picorestore diff --git a/pandora/linux/fbdev.c b/pandora/linux/fbdev.c deleted file mode 100644 index 9d532a53..00000000 --- a/pandora/linux/fbdev.c +++ /dev/null @@ -1,255 +0,0 @@ -/* - * (C) Graﾅｾvydas "notaz" Ignotas, 2009-2010 - * - * This work is licensed under the terms of any of these licenses - * (at your option): - * - GNU GPL, version 2 or later. - * - GNU LGPL, version 2.1 or later. - * See the COPYING file in the top-level directory. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "fbdev.h" - -struct vout_fbdev { - int fd; - void *mem; - size_t mem_size; - struct fb_var_screeninfo fbvar_old; - struct fb_var_screeninfo fbvar_new; - int buffer_write; - int fb_size; - int buffer_count; - int top_border, bottom_border; -}; - -void *vout_fbdev_flip(struct vout_fbdev *fbdev) -{ - int draw_buf; - - if (fbdev->buffer_count < 2) - return fbdev->mem; - - draw_buf = fbdev->buffer_write; - fbdev->buffer_write++; - if (fbdev->buffer_write >= fbdev->buffer_count) - fbdev->buffer_write = 0; - - fbdev->fbvar_new.yoffset = - (fbdev->top_border + fbdev->fbvar_new.yres + fbdev->bottom_border) * draw_buf + - fbdev->top_border; - - ioctl(fbdev->fd, FBIOPAN_DISPLAY, &fbdev->fbvar_new); - - return (char *)fbdev->mem + fbdev->fb_size * fbdev->buffer_write; -} - -void vout_fbdev_wait_vsync(struct vout_fbdev *fbdev) -{ - int arg = 0; - ioctl(fbdev->fd, FBIO_WAITFORVSYNC, &arg); -} - -/* it is recommended to call vout_fbdev_clear() before this */ -void *vout_fbdev_resize(struct vout_fbdev *fbdev, int w, int h, int bpp, - int left_border, int right_border, int top_border, int bottom_border, int buffer_cnt) -{ - int w_total = left_border + w + right_border; - int h_total = top_border + h + bottom_border; - size_t mem_size; - int ret; - - // unblank to be sure the mode is really accepted - ioctl(fbdev->fd, FBIOBLANK, FB_BLANK_UNBLANK); - - if (fbdev->fbvar_new.bits_per_pixel != bpp || - fbdev->fbvar_new.xres != w || - fbdev->fbvar_new.yres != h || - fbdev->fbvar_new.xres_virtual != w_total|| - fbdev->fbvar_new.yres_virtual < h_total || - fbdev->fbvar_new.xoffset != left_border || - fbdev->buffer_count != buffer_cnt) - { - if (fbdev->fbvar_new.bits_per_pixel != bpp || - w != fbdev->fbvar_new.xres || h != fbdev->fbvar_new.yres) - printf(" switching to %dx%d@%d\n", w, h, bpp); - - fbdev->fbvar_new.xres = w; - fbdev->fbvar_new.yres = h; - fbdev->fbvar_new.xres_virtual = w_total; - fbdev->fbvar_new.yres_virtual = h_total * buffer_cnt; - fbdev->fbvar_new.xoffset = left_border; - fbdev->fbvar_new.yoffset = top_border; - fbdev->fbvar_new.bits_per_pixel = bpp; - fbdev->fbvar_new.nonstd = 0; // can set YUV here on omapfb - fbdev->buffer_count = buffer_cnt; - fbdev->buffer_write = 1; - - // seems to help a bit to avoid glitches - vout_fbdev_wait_vsync(fbdev); - - ret = ioctl(fbdev->fd, FBIOPUT_VSCREENINFO, &fbdev->fbvar_new); - if (ret == -1) { - // retry with no multibuffering - fbdev->fbvar_new.yres_virtual = h_total; - ret = ioctl(fbdev->fd, FBIOPUT_VSCREENINFO, &fbdev->fbvar_new); - if (ret == -1) { - perror("FBIOPUT_VSCREENINFO ioctl"); - return NULL; - } - fbdev->buffer_count = 1; - fbdev->buffer_write = 0; - fprintf(stderr, "Warning: failed to increase virtual resolution, " - "multibuffering disabled\n"); - } - - } - - fbdev->fb_size = w_total * h_total * bpp / 8; - fbdev->top_border = top_border; - fbdev->bottom_border = bottom_border; - - mem_size = fbdev->fb_size * fbdev->buffer_count; - if (fbdev->mem_size >= mem_size) - goto out; - - if (fbdev->mem != NULL) - munmap(fbdev->mem, fbdev->mem_size); - - fbdev->mem = mmap(0, mem_size, PROT_WRITE|PROT_READ, MAP_SHARED, fbdev->fd, 0); - if (fbdev->mem == MAP_FAILED && fbdev->buffer_count > 1) { - fprintf(stderr, "Warning: can't map %zd bytes, doublebuffering disabled\n", mem_size); - fbdev->buffer_count = 1; - fbdev->buffer_write = 0; - mem_size = fbdev->fb_size; - fbdev->mem = mmap(0, mem_size, PROT_WRITE|PROT_READ, MAP_SHARED, fbdev->fd, 0); - } - if (fbdev->mem == MAP_FAILED) { - fbdev->mem = NULL; - fbdev->mem_size = 0; - perror("mmap framebuffer"); - return NULL; - } - - fbdev->mem_size = mem_size; - -out: - return (char *)fbdev->mem + fbdev->fb_size * fbdev->buffer_write; -} - -void vout_fbdev_clear(struct vout_fbdev *fbdev) -{ - memset(fbdev->mem, 0, fbdev->mem_size); -} - -void vout_fbdev_clear_lines(struct vout_fbdev *fbdev, int y, int count) -{ - int stride = fbdev->fbvar_new.xres_virtual * fbdev->fbvar_new.bits_per_pixel / 8; - int i; - - if (y + count > fbdev->top_border + fbdev->fbvar_new.yres) - count = fbdev->top_border + fbdev->fbvar_new.yres - y; - - if (y >= 0 && count > 0) - for (i = 0; i < fbdev->buffer_count; i++) - memset((char *)fbdev->mem + fbdev->fb_size * i + y * stride, 0, stride * count); -} - -int vout_fbdev_get_fd(struct vout_fbdev *fbdev) -{ - return fbdev->fd; -} - -struct vout_fbdev *vout_fbdev_init(const char *fbdev_name, int *w, int *h, int bpp, int buffer_cnt) -{ - struct vout_fbdev *fbdev; - int req_w, req_h; - void *pret; - int ret; - - fbdev = calloc(1, sizeof(*fbdev)); - if (fbdev == NULL) - return NULL; - - fbdev->fd = open(fbdev_name, O_RDWR); - if (fbdev->fd == -1) { - fprintf(stderr, "%s: ", fbdev_name); - perror("open"); - goto fail_open; - } - - ret = ioctl(fbdev->fd, FBIOGET_VSCREENINFO, &fbdev->fbvar_old); - if (ret == -1) { - perror("FBIOGET_VSCREENINFO ioctl"); - goto fail; - } - - fbdev->fbvar_new = fbdev->fbvar_old; - - req_w = fbdev->fbvar_new.xres; - if (*w != 0) - req_w = *w; - req_h = fbdev->fbvar_new.yres; - if (*h != 0) - req_h = *h; - - pret = vout_fbdev_resize(fbdev, req_w, req_h, bpp, 0, 0, 0, 0, buffer_cnt); - if (pret == NULL) - goto fail; - - printf("%s: %ix%i@%d\n", fbdev_name, fbdev->fbvar_new.xres, fbdev->fbvar_new.yres, - fbdev->fbvar_new.bits_per_pixel); - *w = fbdev->fbvar_new.xres; - *h = fbdev->fbvar_new.yres; - - memset(fbdev->mem, 0, fbdev->mem_size); - - // some checks - ret = 0; - ret = ioctl(fbdev->fd, FBIO_WAITFORVSYNC, &ret); - if (ret != 0) - fprintf(stderr, "Warning: vsync doesn't seem to be supported\n"); - - if (fbdev->buffer_count > 1) { - fbdev->buffer_write = 0; - fbdev->fbvar_new.yoffset = fbdev->fbvar_new.yres * (fbdev->buffer_count - 1); - ret = ioctl(fbdev->fd, FBIOPAN_DISPLAY, &fbdev->fbvar_new); - if (ret != 0) { - fbdev->buffer_count = 1; - fprintf(stderr, "Warning: can't pan display, doublebuffering disabled\n"); - } - } - - printf("fbdev initialized.\n"); - return fbdev; - -fail: - close(fbdev->fd); -fail_open: - free(fbdev); - return NULL; -} - -void vout_fbdev_finish(struct vout_fbdev *fbdev) -{ - ioctl(fbdev->fd, FBIOPUT_VSCREENINFO, &fbdev->fbvar_old); - if (fbdev->mem != MAP_FAILED) - munmap(fbdev->mem, fbdev->mem_size); - if (fbdev->fd >= 0) - close(fbdev->fd); - fbdev->mem = NULL; - fbdev->fd = -1; - free(fbdev); -} - diff --git a/pandora/linux/fbdev.h b/pandora/linux/fbdev.h deleted file mode 100644 index 2db91631..00000000 --- a/pandora/linux/fbdev.h +++ /dev/null @@ -1,12 +0,0 @@ -struct vout_fbdev; - -struct vout_fbdev *vout_fbdev_init(const char *fbdev_name, int *w, int *h, int bpp, int buffer_count); -void *vout_fbdev_flip(struct vout_fbdev *fbdev); -void vout_fbdev_wait_vsync(struct vout_fbdev *fbdev); -void *vout_fbdev_resize(struct vout_fbdev *fbdev, int w, int h, int bpp, - int left_border, int right_border, int top_border, int bottom_border, - int buffer_count); -void vout_fbdev_clear(struct vout_fbdev *fbdev); -void vout_fbdev_clear_lines(struct vout_fbdev *fbdev, int y, int count); -int vout_fbdev_get_fd(struct vout_fbdev *fbdev); -void vout_fbdev_finish(struct vout_fbdev *fbdev); diff --git a/pandora/linux/omapfb.h b/pandora/linux/omapfb.h deleted file mode 100644 index f156e3a1..00000000 --- a/pandora/linux/omapfb.h +++ /dev/null @@ -1,427 +0,0 @@ -/* - * File: arch/arm/plat-omap/include/mach/omapfb.h - * - * Framebuffer driver for TI OMAP boards - * - * Copyright (C) 2004 Nokia Corporation - * Author: Imre Deak - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#ifndef __OMAPFB_H -#define __OMAPFB_H - -#include -#include - -/* IOCTL commands. */ - -#define OMAP_IOW(num, dtype) _IOW('O', num, dtype) -#define OMAP_IOR(num, dtype) _IOR('O', num, dtype) -#define OMAP_IOWR(num, dtype) _IOWR('O', num, dtype) -#define OMAP_IO(num) _IO('O', num) - -#define OMAPFB_MIRROR OMAP_IOW(31, int) -#define OMAPFB_SYNC_GFX OMAP_IO(37) -#define OMAPFB_VSYNC OMAP_IO(38) -#define OMAPFB_SET_UPDATE_MODE OMAP_IOW(40, int) -#define OMAPFB_GET_CAPS OMAP_IOR(42, struct omapfb_caps) -#define OMAPFB_GET_UPDATE_MODE OMAP_IOW(43, int) -#define OMAPFB_LCD_TEST OMAP_IOW(45, int) -#define OMAPFB_CTRL_TEST OMAP_IOW(46, int) -#define OMAPFB_UPDATE_WINDOW_OLD OMAP_IOW(47, struct omapfb_update_window_old) -#define OMAPFB_SET_COLOR_KEY OMAP_IOW(50, struct omapfb_color_key) -#define OMAPFB_GET_COLOR_KEY OMAP_IOW(51, struct omapfb_color_key) -#define OMAPFB_SETUP_PLANE OMAP_IOW(52, struct omapfb_plane_info) -#define OMAPFB_QUERY_PLANE OMAP_IOW(53, struct omapfb_plane_info) -#define OMAPFB_UPDATE_WINDOW OMAP_IOW(54, struct omapfb_update_window) -#define OMAPFB_SETUP_MEM OMAP_IOW(55, struct omapfb_mem_info) -#define OMAPFB_QUERY_MEM OMAP_IOW(56, struct omapfb_mem_info) -#define OMAPFB_WAITFORVSYNC OMAP_IO(57) -#define OMAPFB_MEMORY_READ OMAP_IOR(58, struct omapfb_memory_read) - -#ifndef FBIO_WAITFORVSYNC -#define FBIO_WAITFORVSYNC _IOW('F', 0x20, u_int32_t) -#endif - -#define OMAPFB_CAPS_GENERIC_MASK 0x00000fff -#define OMAPFB_CAPS_LCDC_MASK 0x00fff000 -#define OMAPFB_CAPS_PANEL_MASK 0xff000000 - -#define OMAPFB_CAPS_MANUAL_UPDATE 0x00001000 -#define OMAPFB_CAPS_TEARSYNC 0x00002000 -#define OMAPFB_CAPS_PLANE_RELOCATE_MEM 0x00004000 -#define OMAPFB_CAPS_PLANE_SCALE 0x00008000 -#define OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE 0x00010000 -#define OMAPFB_CAPS_WINDOW_SCALE 0x00020000 -#define OMAPFB_CAPS_WINDOW_OVERLAY 0x00040000 -#define OMAPFB_CAPS_WINDOW_ROTATE 0x00080000 -#define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000 - -/* Values from DSP must map to lower 16-bits */ -#define OMAPFB_FORMAT_MASK 0x00ff -#define OMAPFB_FORMAT_FLAG_DOUBLE 0x0100 -#define OMAPFB_FORMAT_FLAG_TEARSYNC 0x0200 -#define OMAPFB_FORMAT_FLAG_FORCE_VSYNC 0x0400 -#define OMAPFB_FORMAT_FLAG_ENABLE_OVERLAY 0x0800 -#define OMAPFB_FORMAT_FLAG_DISABLE_OVERLAY 0x1000 - -#define OMAPFB_EVENT_READY 1 -#define OMAPFB_EVENT_DISABLED 2 - -#define OMAPFB_MEMTYPE_SDRAM 0 -#define OMAPFB_MEMTYPE_SRAM 1 -#define OMAPFB_MEMTYPE_MAX 1 - -enum omapfb_color_format { - OMAPFB_COLOR_RGB565 = 0, - OMAPFB_COLOR_YUV422, - OMAPFB_COLOR_YUV420, - OMAPFB_COLOR_CLUT_8BPP, - OMAPFB_COLOR_CLUT_4BPP, - OMAPFB_COLOR_CLUT_2BPP, - OMAPFB_COLOR_CLUT_1BPP, - OMAPFB_COLOR_RGB444, - OMAPFB_COLOR_YUY422, - - OMAPFB_COLOR_ARGB16, - OMAPFB_COLOR_RGB24U, /* RGB24, 32-bit container */ - OMAPFB_COLOR_RGB24P, /* RGB24, 24-bit container */ - OMAPFB_COLOR_ARGB32, - OMAPFB_COLOR_RGBA32, - OMAPFB_COLOR_RGBX32, -}; - -struct omapfb_update_window { - __u32 x, y; - __u32 width, height; - __u32 format; - __u32 out_x, out_y; - __u32 out_width, out_height; - __u32 reserved[8]; -}; - -struct omapfb_update_window_old { - __u32 x, y; - __u32 width, height; - __u32 format; -}; - -enum omapfb_plane { - OMAPFB_PLANE_GFX = 0, - OMAPFB_PLANE_VID1, - OMAPFB_PLANE_VID2, -}; - -enum omapfb_channel_out { - OMAPFB_CHANNEL_OUT_LCD = 0, - OMAPFB_CHANNEL_OUT_DIGIT, -}; - -struct omapfb_plane_info { - __u32 pos_x; - __u32 pos_y; - __u8 enabled; - __u8 channel_out; - __u8 mirror; - __u8 reserved1; - __u32 out_width; - __u32 out_height; - __u32 reserved2[12]; -}; - -struct omapfb_mem_info { - __u32 size; - __u8 type; - __u8 reserved[3]; -}; - -struct omapfb_caps { - __u32 ctrl; - __u32 plane_color; - __u32 wnd_color; -}; - -enum omapfb_color_key_type { - OMAPFB_COLOR_KEY_DISABLED = 0, - OMAPFB_COLOR_KEY_GFX_DST, - OMAPFB_COLOR_KEY_VID_SRC, -}; - -struct omapfb_color_key { - __u8 channel_out; - __u32 background; - __u32 trans_key; - __u8 key_type; -}; - -enum omapfb_update_mode { - OMAPFB_UPDATE_DISABLED = 0, - OMAPFB_AUTO_UPDATE, - OMAPFB_MANUAL_UPDATE -}; - -struct omapfb_memory_read { - __u16 x; - __u16 y; - __u16 w; - __u16 h; - size_t buffer_size; - void *buffer; -}; - -#ifdef __KERNEL__ - -#include -#include -#include -#include - -#include - -#define OMAP_LCDC_INV_VSYNC 0x0001 -#define OMAP_LCDC_INV_HSYNC 0x0002 -#define OMAP_LCDC_INV_PIX_CLOCK 0x0004 -#define OMAP_LCDC_INV_OUTPUT_EN 0x0008 -#define OMAP_LCDC_HSVS_RISING_EDGE 0x0010 -#define OMAP_LCDC_HSVS_OPPOSITE 0x0020 - -#define OMAP_LCDC_SIGNAL_MASK 0x003f - -#define OMAP_LCDC_PANEL_TFT 0x0100 - -#define OMAPFB_PLANE_XRES_MIN 8 -#define OMAPFB_PLANE_YRES_MIN 8 - -#ifdef CONFIG_ARCH_OMAP1 -#define OMAPFB_PLANE_NUM 1 -#else -#define OMAPFB_PLANE_NUM 3 -#endif - -struct omapfb_device; - -struct lcd_panel { - const char *name; - int config; /* TFT/STN, signal inversion */ - int bpp; /* Pixel format in fb mem */ - int data_lines; /* Lines on LCD HW interface */ - - int x_res, y_res; - int pixel_clock; /* In kHz */ - int hsw; /* Horizontal synchronization - pulse width */ - int hfp; /* Horizontal front porch */ - int hbp; /* Horizontal back porch */ - int vsw; /* Vertical synchronization - pulse width */ - int vfp; /* Vertical front porch */ - int vbp; /* Vertical back porch */ - int acb; /* ac-bias pin frequency */ - int pcd; /* pixel clock divider. - Obsolete use pixel_clock instead */ - - int (*init) (struct lcd_panel *panel, - struct omapfb_device *fbdev); - void (*cleanup) (struct lcd_panel *panel); - int (*enable) (struct lcd_panel *panel); - void (*disable) (struct lcd_panel *panel); - unsigned long (*get_caps) (struct lcd_panel *panel); - int (*set_bklight_level)(struct lcd_panel *panel, - unsigned int level); - unsigned int (*get_bklight_level)(struct lcd_panel *panel); - unsigned int (*get_bklight_max) (struct lcd_panel *panel); - int (*run_test) (struct lcd_panel *panel, int test_num); -}; - -struct extif_timings { - int cs_on_time; - int cs_off_time; - int we_on_time; - int we_off_time; - int re_on_time; - int re_off_time; - int we_cycle_time; - int re_cycle_time; - int cs_pulse_width; - int access_time; - - int clk_div; - - u32 tim[5]; /* set by extif->convert_timings */ - - int converted; -}; - -struct lcd_ctrl_extif { - int (*init) (struct omapfb_device *fbdev); - void (*cleanup) (void); - void (*get_clk_info) (u32 *clk_period, u32 *max_clk_div); - unsigned long (*get_max_tx_rate)(void); - int (*convert_timings) (struct extif_timings *timings); - void (*set_timings) (const struct extif_timings *timings); - void (*set_bits_per_cycle)(int bpc); - void (*write_command) (const void *buf, unsigned int len); - void (*read_data) (void *buf, unsigned int len); - void (*write_data) (const void *buf, unsigned int len); - void (*transfer_area) (int width, int height, - void (callback)(void * data), void *data); - int (*setup_tearsync) (unsigned pin_cnt, - unsigned hs_pulse_time, unsigned vs_pulse_time, - int hs_pol_inv, int vs_pol_inv, int div); - int (*enable_tearsync) (int enable, unsigned line); - - unsigned long max_transmit_size; -}; - -struct omapfb_notifier_block { - struct notifier_block nb; - void *data; - int plane_idx; -}; - -typedef int (*omapfb_notifier_callback_t)(struct notifier_block *, - unsigned long event, - void *fbi); - -struct omapfb_mem_region { - u32 paddr; - void __iomem *vaddr; - unsigned long size; - u8 type; /* OMAPFB_PLANE_MEM_* */ - enum omapfb_color_format format;/* OMAPFB_COLOR_* */ - unsigned format_used:1; /* Must be set when format is set. - * Needed b/c of the badly chosen 0 - * base for OMAPFB_COLOR_* values - */ - unsigned alloc:1; /* allocated by the driver */ - unsigned map:1; /* kernel mapped by the driver */ -}; - -struct omapfb_mem_desc { - int region_cnt; - struct omapfb_mem_region region[OMAPFB_PLANE_NUM]; -}; - -struct lcd_ctrl { - const char *name; - void *data; - - int (*init) (struct omapfb_device *fbdev, - int ext_mode, - struct omapfb_mem_desc *req_md); - void (*cleanup) (void); - void (*bind_client) (struct omapfb_notifier_block *nb); - void (*get_caps) (int plane, struct omapfb_caps *caps); - int (*set_update_mode)(enum omapfb_update_mode mode); - enum omapfb_update_mode (*get_update_mode)(void); - int (*setup_plane) (int plane, int channel_out, - unsigned long offset, - int screen_width, - int pos_x, int pos_y, int width, - int height, int color_mode); - int (*set_rotate) (int angle); - int (*setup_mem) (int plane, size_t size, - int mem_type, unsigned long *paddr); - int (*mmap) (struct fb_info *info, - struct vm_area_struct *vma); - int (*set_scale) (int plane, - int orig_width, int orig_height, - int out_width, int out_height); - int (*enable_plane) (int plane, int enable); - int (*update_window) (struct fb_info *fbi, - struct omapfb_update_window *win, - void (*callback)(void *), - void *callback_data); - void (*sync) (void); - void (*suspend) (void); - void (*resume) (void); - int (*run_test) (int test_num); - int (*setcolreg) (u_int regno, u16 red, u16 green, - u16 blue, u16 transp, - int update_hw_mem); - int (*set_color_key) (struct omapfb_color_key *ck); - int (*get_color_key) (struct omapfb_color_key *ck); -}; - -enum omapfb_state { - OMAPFB_DISABLED = 0, - OMAPFB_SUSPENDED= 99, - OMAPFB_ACTIVE = 100 -}; - -struct omapfb_plane_struct { - int idx; - struct omapfb_plane_info info; - enum omapfb_color_format color_mode; - struct omapfb_device *fbdev; -}; - -struct omapfb_device { - int state; - int ext_lcdc; /* Using external - LCD controller */ - struct mutex rqueue_mutex; - - int palette_size; - u32 pseudo_palette[17]; - - struct lcd_panel *panel; /* LCD panel */ - const struct lcd_ctrl *ctrl; /* LCD controller */ - const struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ - struct lcd_ctrl_extif *ext_if; /* LCD ctrl external - interface */ - struct device *dev; - struct fb_var_screeninfo new_var; /* for mode changes */ - - struct omapfb_mem_desc mem_desc; - struct fb_info *fb_info[OMAPFB_PLANE_NUM]; -}; - -struct omapfb_platform_data { - struct omap_lcd_config lcd; - struct omapfb_mem_desc mem_desc; - void *ctrl_platform_data; -}; - -#ifdef CONFIG_ARCH_OMAP1 -extern struct lcd_ctrl omap1_lcd_ctrl; -#else -extern struct lcd_ctrl omap2_disp_ctrl; -#endif - -extern void omapfb_set_platform_data(struct omapfb_platform_data *data); - -extern void omapfb_reserve_sdram(void); -extern void omapfb_register_panel(struct lcd_panel *panel); -extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval); -extern void omapfb_notify_clients(struct omapfb_device *fbdev, - unsigned long event); -extern int omapfb_register_client(struct omapfb_notifier_block *nb, - omapfb_notifier_callback_t callback, - void *callback_data); -extern int omapfb_unregister_client(struct omapfb_notifier_block *nb); -extern int omapfb_update_window_async(struct fb_info *fbi, - struct omapfb_update_window *win, - void (*callback)(void *), - void *callback_data); - -/* in arch/arm/plat-omap/fb.c */ -extern void omapfb_set_ctrl_platform_data(void *pdata); - -#endif /* __KERNEL__ */ - -#endif /* __OMAPFB_H */ diff --git a/pandora/linux/xenv.c b/pandora/linux/xenv.c deleted file mode 100644 index 8295b2c6..00000000 --- a/pandora/linux/xenv.c +++ /dev/null @@ -1,281 +0,0 @@ -/* - * (C) Graﾅｾvydas "notaz" Ignotas, 2009-2011 - * - * This work is licensed under the terms of any of these licenses - * (at your option): - * - GNU GPL, version 2 or later. - * - GNU LGPL, version 2.1 or later. - * See the COPYING file in the top-level directory. - */ - -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#define PFX "xenv: " - -#define FPTR(f) typeof(f) * p##f -#define FPTR_LINK(xf, dl, f) { \ - xf.p##f = dlsym(dl, #f); \ - if (xf.p##f == NULL) { \ - fprintf(stderr, "missing symbol: %s\n", #f); \ - goto fail; \ - } \ -} - -struct xstuff { - Display *display; - FPTR(XCreateBitmapFromData); - FPTR(XCreatePixmapCursor); - FPTR(XFreePixmap); - FPTR(XOpenDisplay); - FPTR(XDisplayName); - FPTR(XCloseDisplay); - FPTR(XCreateSimpleWindow); - FPTR(XChangeWindowAttributes); - FPTR(XSelectInput); - FPTR(XMapWindow); - FPTR(XNextEvent); - FPTR(XCheckTypedEvent); - FPTR(XUnmapWindow); - FPTR(XGrabKeyboard); - FPTR(XPending); - FPTR(XLookupKeysym); - FPTR(XkbSetDetectableAutoRepeat); -}; - -static struct xstuff g_xstuff; - -static Cursor transparent_cursor(struct xstuff *xf, Display *display, Window win) -{ - Cursor cursor; - Pixmap pix; - XColor dummy; - char d = 0; - - memset(&dummy, 0, sizeof(dummy)); - pix = xf->pXCreateBitmapFromData(display, win, &d, 1, 1); - cursor = xf->pXCreatePixmapCursor(display, pix, pix, - &dummy, &dummy, 0, 0); - xf->pXFreePixmap(display, pix); - return cursor; -} - -static int x11h_init(void) -{ - unsigned int display_width, display_height; - Display *display; - XSetWindowAttributes attributes; - Window win; - Visual *visual; - void *x11lib; - int screen; - - memset(&g_xstuff, 0, sizeof(g_xstuff)); - x11lib = dlopen("libX11.so.6", RTLD_LAZY); - if (x11lib == NULL) { - fprintf(stderr, "libX11.so load failed:\n%s\n", dlerror()); - goto fail; - } - FPTR_LINK(g_xstuff, x11lib, XCreateBitmapFromData); - FPTR_LINK(g_xstuff, x11lib, XCreatePixmapCursor); - FPTR_LINK(g_xstuff, x11lib, XFreePixmap); - FPTR_LINK(g_xstuff, x11lib, XOpenDisplay); - FPTR_LINK(g_xstuff, x11lib, XDisplayName); - FPTR_LINK(g_xstuff, x11lib, XCloseDisplay); - FPTR_LINK(g_xstuff, x11lib, XCreateSimpleWindow); - FPTR_LINK(g_xstuff, x11lib, XChangeWindowAttributes); - FPTR_LINK(g_xstuff, x11lib, XSelectInput); - FPTR_LINK(g_xstuff, x11lib, XMapWindow); - FPTR_LINK(g_xstuff, x11lib, XNextEvent); - FPTR_LINK(g_xstuff, x11lib, XCheckTypedEvent); - FPTR_LINK(g_xstuff, x11lib, XUnmapWindow); - FPTR_LINK(g_xstuff, x11lib, XGrabKeyboard); - FPTR_LINK(g_xstuff, x11lib, XPending); - FPTR_LINK(g_xstuff, x11lib, XLookupKeysym); - FPTR_LINK(g_xstuff, x11lib, XkbSetDetectableAutoRepeat); - - //XInitThreads(); - - g_xstuff.display = display = g_xstuff.pXOpenDisplay(NULL); - if (display == NULL) - { - fprintf(stderr, "cannot connect to X server %s, X handling disabled.\n", - g_xstuff.pXDisplayName(NULL)); - goto fail2; - } - - visual = DefaultVisual(display, 0); - if (visual->class != TrueColor) - fprintf(stderr, PFX "warning: non true color visual\n"); - - printf(PFX "X vendor: %s, rel: %d, display: %s, protocol ver: %d.%d\n", ServerVendor(display), - VendorRelease(display), DisplayString(display), ProtocolVersion(display), - ProtocolRevision(display)); - - screen = DefaultScreen(display); - - display_width = DisplayWidth(display, screen); - display_height = DisplayHeight(display, screen); - printf(PFX "display is %dx%d\n", display_width, display_height); - - win = g_xstuff.pXCreateSimpleWindow(display, - RootWindow(display, screen), - 0, 0, display_width, display_height, 0, - BlackPixel(display, screen), - BlackPixel(display, screen)); - - attributes.override_redirect = True; - attributes.cursor = transparent_cursor(&g_xstuff, display, win); - g_xstuff.pXChangeWindowAttributes(display, win, CWOverrideRedirect | CWCursor, &attributes); - - g_xstuff.pXSelectInput(display, win, ExposureMask | FocusChangeMask | KeyPressMask | KeyReleaseMask); - g_xstuff.pXMapWindow(display, win); - g_xstuff.pXGrabKeyboard(display, win, False, GrabModeAsync, GrabModeAsync, CurrentTime); - g_xstuff.pXkbSetDetectableAutoRepeat(display, 1, NULL); - // XSetIOErrorHandler - - return 0; -fail2: - dlclose(x11lib); -fail: - g_xstuff.display = NULL; - fprintf(stderr, "x11 handling disabled.\n"); - return -1; -} - -static int x11h_update(int *is_down) -{ - XEvent evt; - - while (g_xstuff.pXPending(g_xstuff.display)) - { - g_xstuff.pXNextEvent(g_xstuff.display, &evt); - switch (evt.type) - { - case Expose: - while (g_xstuff.pXCheckTypedEvent(g_xstuff.display, Expose, &evt)) - ; - break; - - case KeyPress: - *is_down = 1; - return g_xstuff.pXLookupKeysym(&evt.xkey, 0); - - case KeyRelease: - *is_down = 0; - return g_xstuff.pXLookupKeysym(&evt.xkey, 0); - // printf("press %d\n", evt.xkey.keycode); - } - } - - return NoSymbol; -} - -static struct termios g_kbd_termios_saved; -static int g_kbdfd; - -static int tty_init(void) -{ - struct termios kbd_termios; - int mode; - - g_kbdfd = open("/dev/tty", O_RDWR); - if (g_kbdfd == -1) { - perror(PFX "open /dev/tty"); - return -1; - } - - if (ioctl(g_kbdfd, KDGETMODE, &mode) == -1) { - perror(PFX "(not hiding FB): KDGETMODE"); - goto fail; - } - - if (tcgetattr(g_kbdfd, &kbd_termios) == -1) { - perror(PFX "tcgetattr"); - goto fail; - } - - g_kbd_termios_saved = kbd_termios; - kbd_termios.c_lflag &= ~(ICANON | ECHO); // | ISIG); - kbd_termios.c_iflag &= ~(ISTRIP | IGNCR | ICRNL | INLCR | IXOFF | IXON); - kbd_termios.c_cc[VMIN] = 0; - kbd_termios.c_cc[VTIME] = 0; - - if (tcsetattr(g_kbdfd, TCSAFLUSH, &kbd_termios) == -1) { - perror(PFX "tcsetattr"); - goto fail; - } - - if (ioctl(g_kbdfd, KDSETMODE, KD_GRAPHICS) == -1) { - perror(PFX "KDSETMODE KD_GRAPHICS"); - tcsetattr(g_kbdfd, TCSAFLUSH, &g_kbd_termios_saved); - goto fail; - } - - return 0; - -fail: - close(g_kbdfd); - g_kbdfd = -1; - return -1; -} - -static void tty_end(void) -{ - if (g_kbdfd <= 0) - return; - - if (ioctl(g_kbdfd, KDSETMODE, KD_TEXT) == -1) - perror(PFX "KDSETMODE KD_TEXT"); - - if (tcsetattr(g_kbdfd, TCSAFLUSH, &g_kbd_termios_saved) == -1) - perror(PFX "tcsetattr"); - - close(g_kbdfd); - g_kbdfd = -1; -} - -int xenv_init(void) -{ - int ret; - - ret = x11h_init(); - if (ret == 0) - return 0; - - ret = tty_init(); - if (ret == 0) - return 0; - - fprintf(stderr, PFX "error: both x11h_init and tty_init failed\n"); - return -1; -} - -int xenv_update(int *is_down) -{ - if (g_xstuff.display) - return x11h_update(is_down); - - // TODO: read tty? - return -1; -} - -void xenv_finish(void) -{ - // TODO: cleanup X? - tty_end(); -} diff --git a/pandora/linux/xenv.h b/pandora/linux/xenv.h deleted file mode 100644 index 948381e5..00000000 --- a/pandora/linux/xenv.h +++ /dev/null @@ -1,5 +0,0 @@ - -int xenv_init(void); -int xenv_update(int *is_down); -void xenv_finish(void); - diff --git a/pandora/picorestore.c b/pandora/picorestore.c deleted file mode 100644 index 77f57202..00000000 --- a/pandora/picorestore.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * picorestore - clean up after an omapfb program crash - * - * Copyright (c) Graﾅｾvydas "notaz" Ignotas, 2010 - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of the organization nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -int main() -{ - struct fb_var_screeninfo fbvar; - struct omapfb_plane_info pi; - struct omapfb_mem_info mi; - int ret, fbdev, kbdfd; - - fbdev = open("/dev/fb0", O_RDWR); - if (fbdev == -1) { - perror("open fb0"); - goto end_fb0; - } - - ret = ioctl(fbdev, FBIOGET_VSCREENINFO, &fbvar); - if (ret == -1) { - perror("FBIOGET_VSCREENINFO ioctl"); - goto end_fb0; - } - - if (fbvar.yoffset != 0) { - printf("fixing yoffset.. "); - fbvar.yoffset = 0; - ret = ioctl(fbdev, FBIOPAN_DISPLAY, &fbvar); - if (ret < 0) - perror("ioctl FBIOPAN_DISPLAY"); - else - printf("ok\n"); - } - -end_fb0: - if (fbdev >= 0) - close(fbdev); - - fbdev = open("/dev/fb1", O_RDWR); - if (fbdev == -1) { - perror("open fb1"); - goto end_fb1; - } - - ret = ioctl(fbdev, OMAPFB_QUERY_PLANE, &pi); - ret |= ioctl(fbdev, OMAPFB_QUERY_MEM, &mi); - if (ret != 0) - perror("QUERY_*"); - - pi.enabled = 0; - ret = ioctl(fbdev, OMAPFB_SETUP_PLANE, &pi); - if (ret != 0) - perror("SETUP_PLANE"); - - mi.size = 0; - ret = ioctl(fbdev, OMAPFB_SETUP_MEM, &mi); - if (ret != 0) - perror("SETUP_MEM"); - -end_fb1: - if (fbdev >= 0) - close(fbdev); - - kbdfd = open("/dev/tty", O_RDWR); - if (kbdfd == -1) { - perror("open /dev/tty"); - return 1; - } - - if (ioctl(kbdfd, KDSETMODE, KD_TEXT) == -1) - perror("KDSETMODE KD_TEXT"); - - close(kbdfd); - - return 0; -} diff --git a/pandora/pnd.c b/pandora/pnd.c deleted file mode 100644 index 3464eba0..00000000 --- a/pandora/pnd.c +++ /dev/null @@ -1,381 +0,0 @@ -/* gameplaySP - pandora backend - * - * Copyright (C) 2011 notaz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "../common.h" -#include -#include "linux/omapfb.h" // -#include -#include -#include -#include - -#include "../arm/neon_scale2x.h" -#include "../arm/neon_scale3x.h" -#include "../arm/neon_eagle2x.h" -#include "linux/fbdev.h" -#include "linux/xenv.h" - -enum gpsp_key { - GKEY_UP = 1 << 0, - GKEY_LEFT = 1 << 1, - GKEY_DOWN = 1 << 2, - GKEY_RIGHT = 1 << 3, - GKEY_START = 1 << 4, - GKEY_SELECT = 1 << 5, - GKEY_L = 1 << 6, - GKEY_R = 1 << 7, - GKEY_A = 1 << 8, - GKEY_B = 1 << 9, - GKEY_X = 1 << 10, - GKEY_Y = 1 << 11, - GKEY_1 = 1 << 12, - GKEY_2 = 1 << 13, - GKEY_3 = 1 << 14, - GKEY_4 = 1 << 15, - GKEY_MENU = 1 << 16, -}; - -u32 button_plat_mask_to_config[PLAT_BUTTON_COUNT] = -{ - GKEY_UP, - GKEY_LEFT, - GKEY_DOWN, - GKEY_RIGHT, - GKEY_START, - GKEY_SELECT, - GKEY_L, - GKEY_R, - GKEY_A, - GKEY_B, - GKEY_X, - GKEY_Y, - GKEY_1, - GKEY_2, - GKEY_3, - GKEY_4, - GKEY_MENU, -}; - -u32 gamepad_config_map[PLAT_BUTTON_COUNT] = -{ - BUTTON_ID_UP, // Up - BUTTON_ID_LEFT, // Left - BUTTON_ID_DOWN, // Down - BUTTON_ID_RIGHT, // Right - BUTTON_ID_START, // Start - BUTTON_ID_SELECT, // Select - BUTTON_ID_L, // Ltrigger - BUTTON_ID_R, // Rtrigger - BUTTON_ID_FPS, // A - BUTTON_ID_A, // B - BUTTON_ID_B, // X - BUTTON_ID_MENU, // Y - BUTTON_ID_SAVESTATE, // 1 - BUTTON_ID_LOADSTATE, // 2 - BUTTON_ID_FASTFORWARD, // 3 - BUTTON_ID_NONE, // 4 - BUTTON_ID_MENU // Space -}; - -static const u32 xk_to_gkey[] = { - XK_Up, XK_Left, XK_Down, XK_Right, XK_Alt_L, XK_Control_L, - XK_Shift_R, XK_Control_R, XK_Home, XK_End, XK_Page_Down, XK_Page_Up, - XK_1, XK_2, XK_3, XK_4, XK_space, -}; - -static const u8 gkey_to_cursor[32] = { - [0 ... 31] = CURSOR_NONE, - [0] = CURSOR_UP, CURSOR_LEFT, CURSOR_DOWN, CURSOR_RIGHT, CURSOR_NONE, CURSOR_NONE, - CURSOR_L, CURSOR_R, CURSOR_SELECT, CURSOR_SELECT, CURSOR_EXIT, CURSOR_BACK, -}; - -struct vout_fbdev *fb; -static void *fb_current; -static int bounce_buf[400 * 272 * 2 / 4]; -static int src_w = 240, src_h = 160; -static enum software_filter { - SWFILTER_NONE = 0, - SWFILTER_SCALE2X, - SWFILTER_SCALE3X, - SWFILTER_EAGLE2X, -} sw_filter; - -// (240*3 * 160*3 * 2 * 3) -#define MAX_VRAM_SIZE (400*2 * 272*2 * 2 * 3) - - -static int omap_setup_layer(int fd, int enabled, int x, int y, int w, int h) -{ - struct omapfb_plane_info pi = { 0, }; - struct omapfb_mem_info mi = { 0, }; - int ret; - - ret = ioctl(fd, OMAPFB_QUERY_PLANE, &pi); - if (ret != 0) { - perror("QUERY_PLANE"); - return -1; - } - - ret = ioctl(fd, OMAPFB_QUERY_MEM, &mi); - if (ret != 0) { - perror("QUERY_MEM"); - return -1; - } - - /* must disable when changing stuff */ - if (pi.enabled) { - pi.enabled = 0; - ret = ioctl(fd, OMAPFB_SETUP_PLANE, &pi); - if (ret != 0) - perror("SETUP_PLANE"); - } - - /* alloc enough for 3x scaled tripple buffering */ - if (mi.size < MAX_VRAM_SIZE) { - mi.size = MAX_VRAM_SIZE; - ret = ioctl(fd, OMAPFB_SETUP_MEM, &mi); - if (ret != 0) { - perror("SETUP_MEM"); - return -1; - } - } - - pi.pos_x = x; - pi.pos_y = y; - pi.out_width = w; - pi.out_height = h; - pi.enabled = enabled; - - ret = ioctl(fd, OMAPFB_SETUP_PLANE, &pi); - if (ret != 0) { - perror("SETUP_PLANE"); - return -1; - } - - return 0; -} - -void gpsp_plat_init(void) -{ - int ret, w, h, fd; - const char *layer_fb_name; - - ret = SDL_Init(SDL_INIT_AUDIO | SDL_INIT_NOPARACHUTE); - if (ret != 0) { - fprintf(stderr, "SDL_Init failed: %s\n", SDL_GetError()); - exit(1); - } - - layer_fb_name = getenv("FBDEV_LAYER"); - if (layer_fb_name == NULL) - layer_fb_name = "/dev/fb1"; - - ret = xenv_init(); - if (ret != 0) { - fprintf(stderr, "xenv_init failed with %d\n", ret); - exit(1); - } - - // must set the layer up first to be able to use it - fd = open(layer_fb_name, O_RDWR); - if (fd == -1) { - fprintf(stderr, "%s: ", layer_fb_name); - perror("open"); - exit(1); - } - - ret = omap_setup_layer(fd, 0, 0, 0, 400, 272); - close(fd); - if (ret != 0) { - fprintf(stderr, "failed to set up layer, exiting.\n"); - exit(1); - } - - // double of original menu size - w = 400*2; - h = 272*2; - fb = vout_fbdev_init("/dev/fb1", &w, &h, 16, 3); - if (fb == NULL) { - fprintf(stderr, "vout_fbdev_init failed\n"); - exit(1); - } - - // default to 3x scale - screen_scale = 2; -} - -void gpsp_plat_quit(void) -{ - xenv_finish(); - omap_setup_layer(vout_fbdev_get_fd(fb), 0, 0, 0, 0, 0); - vout_fbdev_finish(fb); - SDL_Quit(); -} - -u32 gpsp_plat_joystick_read(void) -{ - static int gkeystate; - int key, is_down, i; - int gkey = -1; - - key = xenv_update(&is_down); - for (i = 0; i < sizeof(xk_to_gkey) / sizeof(xk_to_gkey[0]); i++) { - if (key == xk_to_gkey[i]) { - gkey = i; - break; - } - } - - if (gkey >= 0) { - if (is_down) - gkeystate |= 1 << gkey; - else - gkeystate &= ~(1 << gkey); - } - - return gkeystate; -} - -u32 gpsp_plat_buttons_to_cursor(u32 buttons) -{ - int i; - - if (buttons == 0) - return CURSOR_NONE; - - for (i = 0; (buttons & 1) == 0; i++, buttons >>= 1) - ; - - return gkey_to_cursor[i]; -} - -static void set_filter(int is_filtered) -{ - static int was_filtered = -1; - char buf[128]; - - if (is_filtered == was_filtered) - return; - - snprintf(buf, sizeof(buf), "sudo -n /usr/pandora/scripts/op_videofir.sh %s", - is_filtered ? "default" : "none"); - system(buf); - was_filtered = is_filtered; -} - -void *fb_flip_screen(void) -{ - void *ret = bounce_buf; - void *s = bounce_buf; - - switch (sw_filter) { - case SWFILTER_SCALE2X: - neon_scale2x_16_16(s, fb_current, src_w, src_w*2, src_w*2*2, src_h); - break; - case SWFILTER_SCALE3X: - neon_scale3x_16_16(s, fb_current, src_w, src_w*2, src_w*3*2, src_h); - break; - case SWFILTER_EAGLE2X: - neon_eagle2x_16_16(s, fb_current, src_w, src_w*2, src_w*2*2, src_h); - break; - case SWFILTER_NONE: - default: - break; - } - - fb_current = vout_fbdev_flip(fb); - if (sw_filter == SWFILTER_NONE) - ret = fb_current; - - return ret; -} - -void fb_wait_vsync(void) -{ - vout_fbdev_wait_vsync(fb); -} - -void fb_set_mode(int w, int h, int buffers, int scale, - int filter, int filter2) -{ - int lx, ly, lw = w, lh = h; - int multiplier; - - switch (scale) { - case 0: - lw = w; - lh = h; - break; - case 1: - lw = w * 2; - lh = h * 2; - break; - case 2: - lw = w * 3; - lh = h * 3; - break; - case 3: - lw = 800; - lh = 480; - break; - case 15: - lw = 800; - lh = 480; - break; - default: - fprintf(stderr, "unknown scale: %d\n", scale); - break; - } - if (lw > 800) - lw = 800; - if (lh > 480) - lh = 480; - lx = 800 / 2 - lw / 2; - ly = 480 / 2 - lh / 2; - - omap_setup_layer(vout_fbdev_get_fd(fb), 1, lx, ly, lw, lh); - set_filter(filter); - - sw_filter = filter2; - if (w != 240) // menu - sw_filter = SWFILTER_SCALE2X; - - switch (sw_filter) { - case SWFILTER_SCALE2X: - multiplier = 2; - break; - case SWFILTER_SCALE3X: - multiplier = 3; - break; - case SWFILTER_EAGLE2X: - multiplier = 2; - break; - case SWFILTER_NONE: - default: - multiplier = 1; - break; - } - - fb_current = vout_fbdev_resize(fb, w * multiplier, h * multiplier, - 16, 0, 0, 0, 0, buffers); - src_w = w; - src_h = h; -} - -// vim:shiftwidth=2:expandtab diff --git a/pandora/pnd.h b/pandora/pnd.h deleted file mode 100644 index c7c8289a..00000000 --- a/pandora/pnd.h +++ /dev/null @@ -1,14 +0,0 @@ -void gpsp_plat_init(void); -void gpsp_plat_quit(void); - -u32 gpsp_plat_joystick_read(void); -u32 gpsp_plat_buttons_to_cursor(u32 buttons); - -#define PLAT_BUTTON_COUNT 17 -#define PLAT_MENU_BUTTON -1 // have one hardcoded -extern u32 button_plat_mask_to_config[PLAT_BUTTON_COUNT]; - -void *fb_flip_screen(void); -void fb_set_mode(int w, int h, int buffers, int scale, - int filter, int filter2); -void fb_wait_vsync(void); diff --git a/pandora/readme.txt b/pandora/readme.txt deleted file mode 100644 index 68ef578c..00000000 --- a/pandora/readme.txt +++ /dev/null @@ -1,1223 +0,0 @@ --- porter's foreword -- - -This is a Pandora port of Exophase's impressive GBA emulator, gpSP. -Since nobody has released a functional port for more than a year after -pandora's release, and the GINGE'd version doesn't do this emulator -justice, I've decided to take this task. This version also includes -my own tweaks from GP2X/Wiz version. In case anyone wonders, this -release was done with author's consent. - -To use it, you'll first need to copy authentic GBA BIOS to gpSP -appdata directory, which usually is /pandora/appdata/gpsp/ . -It must be named gba_bios.bin and should be 16kB in size. - -I've appended the original gpSP GP2X and PSP readme files as they -contain lots of information that is still relevant for this version, -as well as development history of this project. - -- notaz - -Changelog: - -0.9-2xb u8 -- fixed tv-out -- integrated M-HT's neon scalers -- merged an assorment of calc84maniac's bugfixes - -0.9-2xb u7 -- Pandora port, using hardware scaler for video output. -- Fixed a few portablility issues in ARM asm and sound code. -- Tweaked timing to suit pandora's LCD refresh nicely. -- Maybe fixed GBC/digital sound channel desync over time. -- Some other not-that-relevant cleanups and tweaks. - -Source code should be available at: -http://notaz.gp2x.de/cgi-bin/gitweb.cgi - - - --- gameplaySP2X Gameboy Advance emulator for GP2X -- - -gpSP2X is a version of my (Exophase)'s emulator originally for Sony PSP. -A large amount of effort has been done to make it more optimized for the -ARM CPU present in the GP2X, however it is still very much a work in -progress. - -See readme.txt for the PSP version readme, which contains a lot of -information relevant to the GP2X version (note that some of it does -not apply however). - - -Changelog: - -0.9-2xb u6 -- Fixed clock and scaling config saving. -- Fixed occasional crash on first ROM load on 1.1 firmware. -- Added LCD timing setup code, which can be controlled through - 'pollux_dpc_set' environment vatiable (see gpsp.gpe wrapper script). - -0.9-2xb u5 -- Added portrait drawing modes. They eliminate tearing but are slightly - slower. -- Added page scrolling in ROM browser with L/R. -- 32MB ROM support fixed. - -0.9-2xb u4 (unofficial notaz release, done on Exophase's request) -- Wiz port. No emulation related changes. -- Wiz: dropped SDL for video and hitting hardware directly (GPH SDL can't - be trusted, it doesn't do double buffering as of firmware 1.0). -- Added new optimized software scaler with interpolation. -- gpSP is now saving ROM dir on exit. Delete romdir.txt if you don't - want that. -- gpSP now comes with wARM, new kernel module+lib for ARM cache control - (replaces mmuhack). -- gpSP no longer invalidates whole icache after recompilation, might - cause minor speedup. - -0.9-2xb u3 (unofficial notaz release, released with permission): -- Removed built-in CPU/LCD/RAM-Tweaker. -- Improved usability of volume control. -- Removed PSP-specific GUI options, adjusted help text. -- Overclocking from menu now works, keep it at 200 if you don't want that - (if you want to overclock using launcher, for example). -- Fixed centering-on-first-run problem. -- 3:2 scaled option now does what it says. - -0.9-2xb u2 (unofficial notaz release): -- Replaced non-working mmuhack.o with proper one, added cache flush calls - to avoid artifacts. - -0.9-2xb u1 (unofficial notaz release): -- Fixed a problen in thread synchronization which caused deadlock after - some time. - -0.9-2xb: --- IMPORTANT-- If you're overwriting an old version, be sure to delete the - gpsp.cfg file first, or be prepared to have a bunch of weird button - settings that would require fixing. - -- Fixed some bugs stunting compatability. -- Optimized alpha blends in renderer. -- Some more optimizations to dynarec output. -- Savestates should work better now. -- Cheat/misc menu won't crash the emulator. -- Main button config window works (not all buttons are in yet) - -0.9-2Xa: (Exophase release) -- Redid autoframeskip. Should work more reliably. -- Rewrote dynamic recompiler from x86 source (arm_emit.h, arm_stub.S). - Has some more sophisticated behavior than the last version, more is - still to come... Should notice a slight speed improvement over the - last version. -- Tweaked GUI to be a little more useable. Buttons are now mirroring the - PSP version's. -- Code unification + cleanup amongst versions. - - -v9008: (zodttd release) -- Updated the way autoframeskip works. Should be better now. Still has a max - frameskip value. -- Added a slight performance increase to the dynarec. -- Added sync() to make sure files such as savestates and in-game saves are - saved properly to the GP2X. - -v9006: (zodttd release) -- Initial public release - - -Installation: - -1. Place the "gpsp.gpe" and "game_config.txt" file in a directory on your SD - card used with the GP2X. - -2. Place your GBA BIOS in the directory from step 1. This file must be named - "gba_bios.bin" in all lowercase as shown, so rename it if needed. - - -- NOTE -- - - There are two commonly available BIOSes - one is the correct one used in - production GBA's worldwide and the other is a prototype BIOS. The latter - will not cause some games to not work correctly or crash. If you attempt - to use this BIOS you will be presented with a warning before being - allowed to continue. This screen will give you a checksum of the real - BIOS image (see readme.txt for further information). - -3. Place your GBA games in the directory from step 1. These files should have - a ".gba" or ".bin" file extension. Zip compressed games should be supported - and are recognized with the ".zip" file extension. Note that 32MB ROMs will - probably not run if zipped. 16MB and smaller should be OK. - -4. Done. Run gpsp.gpe. - - -Controls: - -How to use gpSP on the GP2X: -Buttons are mapped as follows (GBA/ingame buttons can be changed in the menu): - -GP2X--------------------GBA -X -> A -B -> B -L TRIG -> L TRIG -R TRIG -> R TRIG -START -> START -SELECT -> SELECT - -GP2X--------------------------------gpSP - --- IN-GAME -- - -VOL MIDDLE (UP + DOWN) -> menu -PUSH STICK -> fps display toggle (second number is - frames actually drawn) - --- IN-MENU -- -B -> select option -X -> cancel/exit menu -A -> escape (up one director level in the - file selector) - -When gpSP is started, you are presented with the option to overclock your -GP2X. Use the L/R TRIG to change the CPU clockspeed and press START to -continue. You may also change RAM timings here - experiment with what -works well. Note that going too high on overclocking or low on RAM -timings can cause the game to crash or the GP2X to outright freeze up. - -If you do not want to overclock, press START without using L/R. -You will now be presented with a menu to choose a game. Press the IN-MENU -"SELECT" button shown above to pick a game to load. - -If you would like to test gpSP for the GP2X with a homebrew (free public -domain) game, a game by Russ Prince works very well with gpSP. It is called -Bust-A-Move and is a remake of the classic game it's named after. - - -How to build from source: - -The makefile included in the source is geared towards the Open2x toolchain. -If you use Open2x and installed it in the way recommended then it should -work okay, assuming you also have up to date HW-SDL (and have -arm-linux-sdl-config installed in the right place). The makefile is in the -gp2x directory, so go there first then just type make to build gpsp.gpe. -Might need a little tweaking if your setup is different. If you need help -you can ask me, but I'll probably nag you about why you want to build it in -the first place. - - -GP2X version FAQ: - -Q) Help! This game doesn't work. Am I using a bad version of the ROM? - -A) First, make sure you're using the correct BIOS version. If you aren't - gpSP should tell you. Other than that, there are some games that are - known to not work now (and will probably work later), and perhaps - many more games that I don't know about that don't work. I haven't - launched a full scale compatability test at this version, so it might - take a while before the compatability levels are high. - - -Q) Why is this version slower than the PSP version? - -A) gpSP is still a work in progress. It might be possible to obtain more - speed from both this version and the PSP one too (and others in the - future). With that in mind, know that even a very agressively overclocked - GP2X is still less powerful than a PSP, generally speaking. Still, I - have a lot of ideas. It's unlikely that the GP2X version will ever be as - fast/faster than the PSP version for anyone but anything's possible. - - -Q) How high does my GP2X have to overclock to enjoy gpSP? - -A) That depends on you. Higher overclocking will mean less frames skipped - on autoframeskip, or less frameskip needed if on manual. Or it can - make the difference between whether or not virtual 60fps can be reached. - For some games no GP2X in the world will be able to run them fullspeed, - with any amount of frameskip. A few might run well with no overclocking - and a generous level of frameskip (probably manual). If you don't care - about battery life (or you're plugged into an outlet) you should push - it as high as you can while still maintaining stability, because - chances are high that whatever you play will benefit from it. Right now - you'll probably want 260MHz if you can achieve it, but with a lot of - luck this number will lower slightly in the future (and is just a vague - ballpark figure anyway). I don't want to scare anyone off from using the - emulator, you should give it a try and see how it plays for you - regardless of how high you can overclock. Just note that this is far - from a locked smooth experience for everyone on every game. - - -Q) GBA has an ARM processor, GP2X has an ARM processor. GP2X is more - powerful than GBA. This emulator should run great without overclocking, - so therefore you're doing it wrong. - -A) That's not a question, but I'll field it anyway. Two things: first, - "virtualization", or running the GBA code "natively" on the GP2X is - probably not possible, at least not with the way I want to do things. - For reasons why go read my blog (see below). So yes, you actually - do need more than 16.7MHz of ARM9 power to emulate the GBA's CPU. - Second: there is a whole lot of work behind emulating the pretty 2D - graphics on the GBA, something it can do in hardware a lot better than - this platform can. - End result: GBA emulation on GP2X isn't as easy as you think it is. - - -Q) What are you working on now? When will you release the next version? - -A) See the gpSP development blog: - - http://gpsp-dev.blogspot.com/ - - Note that I don't give release dates, ever, unless I'm right on the verge - of releasing. Be grateful that I've decided to be much more open about - the development of the emulator now. - - -Q) Thanks to your blog I heard that you made some improvement. Can I have - a copy of the new code? - -A) No. Builds in transition often have a lot of problems, and I like for - releases to be relatively substantial. I can probably be bribed out of - them with donations though. :P - - -Q) Why do the menu suck so much? Why do half the options not work or not - make any sense? - -A) Sorry, the menu still hasn't been modified very much to fit the GP2X - version instead of the PSP version.. hopefully this will improve in the - future. - - -Q) Who's in charge of the GP2X version anyway? - -A) Originally, zodttd was. I, Exophase, have basically usurped control of it - now to encourage zodttd to work more on his PS1 emulator (that and I'm - possessive of gpSP and get nervous when people work on it too heavily). - zodttd will most likely still be around to work on things though. - - -Q) I'm a super nice person and would like to donate some of my hard earned - money to this one-off GBA emulator. Where do I send my money to? - -A) Exophase: exophase@gmail.com on PayPal - zodttd: https://www.paypal.com/cgi-bin/webscr?cmd=_xclick&business=heirloomer - %40pobox%2ecom&item_number=1&no_shipping=1&no_note=1&tax=0&cy_code=USD&bn= - PP%2dDonationsBF&charset=UTF%2d8 - ^ Click there for donating on PayPal (remove whitespace/linebreaks). - - GP2X people have already donated a lot more to me than PSP people have, - even though there's an order of magnitude or two less users. And they've - donated far more to zodttd than they have to me. So I'm not going to ask - people to donate.. - - However I won't lie: donating ups the chances of me actually working on the - next version (for which I have a lot of ideas, but not necessarily time to - dedicate to.. that time might need more incentive to be allotted from other - things). This could change depending on my employment situation, but right - now I feel guilty doing anything that doesn't help guarantee that I'll be - able to buy food a year from now. - - -Q) Tell me all of your personal information. - -A) Again not a question, but why not. I'm Exophase, real name: Gilead Kutnick, - male, 23 years old, current residence Bloomington, IN; straight/single/not - actively looking, almost have an MS in Computer Science (do have a BS - underneath it), likes PSP more than GP2X, will not write a Nintendo DS - emulator for either, am currently looking for a job for after I graduate. - - -Q) You said you're looking for a job. - -A) Yes. If you have one or know someone who needs a low level oriented - programmer then I'm up for grabs. And this is my resume: - http://exophase.devzero.co.uk/resume.pdf - - -Credits: - -Original codebase: Exophase (exophase@gmail.com) -Foundation gp2x code: zodttd -GP2X dynarec/stubs + current code maintainance: Exophase - - - --- gameplaySP Gameboy Advance emulator for Playstation Portable -- - - --- Release log -- - -v0.91 (minor cleanup release) - -NOTE: I don't usually do minor releases but I rewrote a ton of -things in gpSP 0.9, much of it during the last few days, and although -I spent a lot of time debugging a few bugs inevitably crept in. - -# Fixed some issues in the new memory handlers that crept up, hopefully - should fix the problems between 0.8 and 0.9. -# Fixed a bug introduced in 0.9 that could cause crashes when selecting - things in the menu (I hope, at least). -# Fixed a bug with a certain invalid opcode causing a jump to be scanned - when there isn't one (fixes Sabre Wulf). -# Removed 2048 option for audio buffer. - -v0.9 (yes, it's still beta) - -NOTE: As some of you may be aware I'm pretty much tired of these -unofficial releases by people (okay, mostly single person) who -don't wish to follow my wishes. I'm in the process of asking this -person to stop, in his own language. However, I want to make -something clear. Look at the last six new features in this -changelog. I added these TODAY. I could have done them at any -time. But I didn't, because I spent many (dozens, quite possibly -hundreds) hours debugging games that people want to play. I have -always believed that this is far more important than spending time -on new features. Frankly, I'm tired of my emulator being hacked on -by other people, and if it doesn't stop I'm going to make this -project closed source. - -Since I know this information is most visible when updated on the -major sites, note that it is the news posters I am especially -talking to. Next time you upload unofficial releases of my -emulator (without even knowing what's changed) bear in mind that -you're only encouraging me to stop working on this. If you want -to pick sides between me and unofficial devs, be my guest. I'll -let you decide by the contents of this release who's doing more -for my emulator. - -Oh, and if you downloaded a version of gpSP that has more than -"gpSP" in its name then you're using one of their versions. Shame -on them for not even removing this threatening message, and shame -on you. Unless you're using a port I endorse (GP2X, Dreamcast, etc), -in which case everything's good. - - -# Fixed stereo output being reversed. -# Fixed a bug causing misaligned errors on 8bit writes to the gbc - audio channel 3 wave data (fixes various Super Robot Wars games) -# Fixed DMA with garbage in their upper 4 bits (fixes a crash in - Zelda: Minish Cap) -# Added double buffering to the rendering, removes line artifacts. - Big thanks to Brunni for the idea. -# Fixed a bug preventing some SRAM based games from saving (fixes - MMBN4-6) -# Fixed a bug causing part of EWRAM to potentially get corrupted if - code segments loaded in EWRAM cross 32KB boundaries (fixes - Phantasy Star 2) -# Fixed a bug causing games using movs pc in user mode (very bad - behavior) to crash. Fixes Colin McRae Rally 2.0. -# Improved timing a bit more. Fixes GTA Advance. -# Fixed a sprite clipping bug (fixes crash in third boss of Zelda: - Minish cap) -# Increased translation buffer size significantly (fixes Donkey Kong: - King of Swing) -# Fixed a dynarec bug causing add pc, reg to not work in Thumb code - (fixes crash in DBZ:LoZ, seems to fix crashes in battle in Golden - Sun, probably fixes other games) -# Made sprites using tiles < 512 not display in modes 3-5 (fixes - a couple minor graphical bugs) -# Removed abort on instruction 0x00000000 hack, was breaking a - certain bugged up game (Scurge) -# Fixed bug in flags generating variable logical shifts (fixes - SD Gundam Force) -# Fixed unaligned 16bit reads (fixes DBZ:LoZ in game) -# Redid contiguous block flag modification checking AGAIN and - hopefully got it right this time (fixes Mario vs. Donkey Kong) -# Redid ldm/stm instructions, fixing some cases (along with the - timing improvements fixes Mario & Luigi) -# Fixed 14bit EEPROM addressing (hopefully fixes saving in a lot - of games) -# Completely redid memory handlers, accurately emulates open and - BIOS reads now. Fixes Zelda: Minish Cap (roll bug, last dungeon), - Rayman, MMBN 1 (last dungeon), probably others. -# Fixed a minor graphical glitch on the edges of the screen - (thanks Brunni and hlide for the help!) -# Fixed crash on loading savestates from files of games not currently - loaded, but be sure you have the exact file you loaded it from or - gpSP will exit. -@ New memory handlers should provide performance boost for games - that access VRAM significantly (ie 3D games) -@ Added dead flag elimination checking for logical shifts, probably - doesn't make a noticeable difference but should have been there - anyway. -+ Added rapidfire to the button mappings. -+ Added auto frameskip. Removed fractional frameskip (don't think - it's very useful with auto anyway). Select auto in the graphics/ - sound menu to activate it; frameskip value will act as the - maximum (auto is by default on). Thanks again to Brunni for some - help with this. Frameskip options are game specific. -+ Added vsync to the rendering. Only occurs when frames aren't - skipped. Seems to reduce tearing at least some of the time. -+ Added non-filtered video option. -+ Cheat support (Gameshark/Pro Action Replay v1-v3 only), still - in early stages, doesn't support everything; codes may cause - the game to crash, haven't determined yet if the codes are bad - or the implementation is. See cheat section for more information. -+ Added ability to change audio buffer size. Does not take affect - until you restart the game. -+ Added analog config options. -+ Added ability to set analog sensitivity and turn off analog. -+ Added ability to change the clock speed. This is a game specific - option. Try lower speeds w/auto frameskip to save battery life. -+ Fixed savestate speed on crappy Sony sticks. - -(legend: # bug fix, + feature addition, @ optimization) - -v0.8 - ("unlocked" beta) - -NOTE 1: It has come to my attention that there are actually BIOSes -out there that are being used that cause some games to not work. -The BIOS md5sum listed here is for the BIOS actually in GBAs and -is as accurate as you'll get, (if you have a GBA and a flashcart -you can dump it yourself, see http://wiki.pocketheaven.com/GBA_BIOS) - -NOTE 2: Since I know this is as far as a lot of people here I have a -little request. Please, please, (I'd italicize this if I could) -please stop constantly asking me when the next release will be, -what it'll have, etc. And while you're at it, please stop asking me -to implement wi-fi multiplayer, cheat support, or fix all of your -games. Some things will happen in due time, other things might not -ever happen. I devote about as much time as I can to this emulator -and I carefully include as much as I can in releases to try to -minimize the number of people who will nag me next time (erm, I -mean, to make the most people happy), so I don't release every other -day or anything like that. Sorry that I can't release once a week, -but I'm a lot busier now than I was when I was first developing this -emulator. Good thing I got the first version out before that, wasn't -it? - -Congratulations, you made it this far! Now read the rest of the this -thing. *_* - - -# Fixed bug in dead flag elimination, "alt" version no longer needed. -# Fixed EEPROM saves being saved as 32kb instead of 512bytes/8kb -+ 32MB ROM support has been added. ROMS are "demand loaded" as - necessary and page swapped out; there might be a small loading lag, - but I have yet to ever really notice anything. - NOTE: 32MB ROM support only works for unzipped ROMs. -+ Save states have been added. See the save state menu for save/load - options. -+ Support for the real-time clock (RTC) chip in Pokemon cartridegs - and other games. The implementation is based off of VBA's, whatever - notes on gbadev I could find, and some of my own reverse engineering - of what the games do... it might not be totally correct. Also, - setting the time does not work. -+ Per-game configuration. Currently this only saves frameskip and - frameskip variation options. -+ Removed the flash type option from the menu and instead added it - to game_config.txt. Hopefully got everything - let me know if you - find something that isn't there. It's pretty easy to add them if you - have to. -+ Added a display in the upper left-hand corner to indicate when - fast-forward is on. -+ Added button bindings for save/load state. -@ Found a fix of StrmnNrmn proportion: far too much unnecessary mutex - synchronization was going on. Removing the two offending lines of - code gave a massive speed boost for free. Enjoy. - -v0.7 - (beta than ever) - -# Fixed a dynarec bug involving flags generating functions in - contiguous conditional blocks. Fixes music in Super Mario - Advance 2-4. -# Fixed a dynarec bug where Thumb mov imm instructions wouldn't - set flags. Fixes Zelda: Minish Cap, Megaman Battle Network, - probably others. Comes at a slight speed cost. -# Fixed a MIPS dynarec bug where some delay slots might not - get filled rarely, causing chaos. Don't know if it improves - any games. -# Improved self-modifying code detection. Makes Golden Sun, - Golden Sun 2, and Madden 2007 sorta work but excrutiatingly - slowly. Looking for a game-specific workaround for this - if you - want to play these games you'll have to wait for now :( -# Fixed a bug causing the interrupt disable flag to go down - when SWIs are entered, causing crashes/resets. Fixes - Super Mario Advance 2-4. -# Fixed menu crashing when strings with certain characters are - printed (for instance going to the menu after loading the - BIOS) -# Accidentally forgot to render win0 + win1 + objwin when all - active at the same time, many weeks ago. Added that, should fix - some parts in games that had frozen screens. -# Fixed some issues with gpsp.cfg needing to be present and - corrupting, hopefully. At the very least sanity checks are - performed on the config file. -# Made it so assigning the frameskip button to something besides - triangle actually worked as expected. -# Fixed ability to restart current game if nothing is loaded - (ie, crash) -# Added interrupt on cpsr modification support to the dynarec - (fixes backgrounds in Castlevania: Harmony of Dissonance) -# Added open addressing for ldm/stm instructions (fixes - Super Mario Advance 3) -# Improved cycle accuracy a little. Don't know of anything this - fixes, but games with idle loops will run a little better w/o - idle loop elimination (but should still be added when possible) -# Fixed some bugs causing sound to play sometimes when it shouldn't. -@ Added dead flag elimination for Thumb code. May possibly have - noticeable performance increases (Thumb emited coded size can - have a reduction of 20% or more) -@ Added code generation for divide SWI. May have a small speed - increase in some games. -+ Added analog nub support (special thanks to psp298 for the - code) -+ Added fractional frameskip. Go below 0 to get them. A frameskip - of 1/2 for instance means render 2 out of every 3 frames, 2/3 - means render 3 out of every 4 frames, etc. Possibly useful for - games that are not quite fast enough at fs0 but fullspeed at - fs1... - -v0.6 - (still beta quality, look out for new bugs) - -NOTE: Please include gpsp.cfg with EBOOT.PBP, this shouldn't be - necessary but I think it is right now. - -# Fixed a nasty bug that shouldn't have made it into the initial - release; a lot of games that TECM.. erm.. crash won't anymore. - NOTE: This doesn't mean that no game will ever crash, freeze, - otherwise not work. -# Fixed some crashes in the GUI and the ability to "go up" past - ms0:/PSP. Made the "go up" button square like it was supposed to - be (instead of cross). -+ There's now a menu that you can access, by default press right - while holding down triangle for the frameskip bar. -+ Menu option: resize screen aspect ratio, the default is now - "scaled 3:2" which makes it look more like a normal GBA. You - can use "fullscreen" (what it was like before) or "unscaled 3:2" - (tiny but pixel for pixel like a GBA) -+ Menu option: You can now load new games while the current one - is running. -+ Menu option: You can now restart the currently running game. -+ Menu option: Frameskip variation - this defaults to "uniform" - whereas it defaulted to "random" last release. Basically, turn - it on random if you find that frameskip causes flickering - animations to make things disappear. Other than that it will - generally look better on uniform. -+ GUI and file loading now have "auto repeat" on the buttons so - they're not such a pain to navigate. -+ Menu option: Added support for 128KB flash ROM, some games - require it (Pokemon Firered/Leaf Green, Super Mario Advance 4), - turn it on before running the game to make sure it works. - NOTE: There are some versions of these ROMs that have been - hacked to get around their 128KB flash, and may not even work - properly at all. Look out for them, these games should save - 128KB save files after you set the setting to it, IF they use - 128KB flash. -+ Menu option: Added ability to make the .sav files only update - when you exit the emulator, use with extreme caution (in other - words, it's not a good idea to use something like this in beta - quality software if you care about your saves). Does NOT update - if you exit through the home button, don't use the home button - if you can help it. -+ Zip support thanks to SiberianSTAR. It will load the first file - with the extension .gba or .bin that it finds. -+ Menu options are saved to gpsp.cfg. Note that it does not save - frameskip options or flash ROM options because these are very - per game particular. -+ The emulator will now try to save backup files to something - more matching the backup size than a fixed 64KB. -@ Loading ROMs and the auto save of the .sav files is MUCH faster - now. Thanks for the heads up on how to improve this from pollux! -@ While coding for the screen resize code I found that SDL just - wasn't cutting it and had to code for the GU myself. Turns out - the new code is faster (but because it is render code any - improvement will be diminished to nothing as frameskip is - increased). Special thanks to Zx-81 for the tips on this one - and for his GU code in the PSPVBA source as an example. -@ Added some games to game_config.txt. Note that not all versions - of these ROMs will work with these options, try to use the USA - version if possible. - -8-19-2006 v0.5 - Initial release (public beta quality) - - --- About -- - -gameplaySP (gpSP for short) is a GBA emulator written completely from -scratch. It is still pretty young (only having started a 3 months prior -to the first release) and thus rather immature, but it does a decent -job of playing a number of games, and is being improved upon somewhat -regularly. It is currently somewhat minimalistic, in the sourcecode, -presentation, and features. Its number one focus is to deliver a GBA -gaming experience in the most playable way that PSP can manage, with -frills being secondary (although still a consideration, at least for -some of them). - -Having said that, optimization was the important way in achieving this -goal, with overall compatability being a near second. Because of this -some games may not run at the favor of running more games significantly -better. Of course, the compatability will improve with time. The -compatability in the current version (0.8) is perhaps around 80% -(assuming the correct BIOS image is used). - -Many games will run at their best out of the box, but some games will -run very slowly unless idle loops are taken care of. There is a supplied -ROM database, game_config.txt, that gives idle loop targets and other -settings that may help a game to run better (or at all) on a per-game -basis. Currently (as of version 0.8) a few dozen games are on this list, -mostly only USA versions. This list will continue to be updated; there's -no real telling exactly how many of the ~2500 GBA games will need to -appear here. - -gpSP currently requires an authentic GBA BIOS image file to run. It will -make no effort to run without one present; this file is 16kb and should -be called gba_bios.bin and present in the same location as the EBOOT.PBP -file. Please do not ask me where to obtain this, you'll have to look -online or grab it from a GBA. Note that it is not legal to have this file -unless you own a GBA, and even then it's rather gray area. - - - --- Features -- - -gpSP mostly emulates the core Gameboy Advance system. As of right now it -does not emulate any special hardware present on various GBA cartridges. - - -What it emulates: - -GBA CPU: All ARM7TDMI ARM and Thumb mode opcodes except block memory w/ - s-bit (probably aren't used in GBA games) -Video: Modes 0, 1, 2 almost completely, basic 3-5 support, sprites, - windows/OBJ windows -Interrupts: HBlank, VBlank, all timers, all DMA channels, keypad -DMA: Immediate, HBlank, VBlank, sound timer triggered -Sound: Both DirectSound channels and all 4 GBC audio channels -Input: Basic GBA input delivered through PSP controls -Cartridges: Currently supports ROMs up to 32MB in size (the maximum for -GBA) with the technique of ROM page swapping to fit within PSP's RAM. -Backup: 32/64kb SRAM, 64/128kb flash, 512bit/8kb EEPROM -RTC: The real-time clock present in cartridges such as most of the - Pokemon games and some others. - - -What it lacks: - -Video: No mosaic, bitmap modes lack color effects (alpha, fades), - there might be some minor inaccuracies in blending... -Cycle accuracy: Very cycle innacurate; CPU is effectively somewhat - overclocked, meaning games with rampant idle loops will probably run - rather poorly. DMA transfers effectively happen for free (0 cycle). - Please do NOT use gpSP as a first source for developing GBA homebrew, - try No$GBA instead. - - -Additional features it has: -- The ability to attempt to run games at faster than GBA speed (sometimes - they can end up a lot faster, other times not so much) -- Savestates: the ability to save a game's state to a file and resume - playing where you left off later. -- Mild cheat support - - -Features that it doesn't have (please don't ask me to implement these!) -- Wi-fi multiplayer - - --- Controls -- - -The default control scheme is very simple. If you don't like it you can -change it in the configuration menu. - -At the ROM selection screen: - -Up/down: navigate current selection window. -Left/right: switch between file window and directory window. -Circle/start: select current entry. -Square: go one directory up. - -In game: - -Up/down/left/right: GBA d-pad -Circle: GBA A button -Cross: GBA B button -Square/start: GBA start button -Select: GBA select button -Left trigger: GBA left trigger -Right trigger: GBA right trigger -Triangle: Adjust frameksip - -In frameskip adjustment: - -Hold down triangle to keep up, press up/down to increase/decrease -frameskip, respectively. Press down at 0 to change to auto, and up -at auto to change to 0. - -In the menu: - -Up/down: navigate current menu. -Left/right: change value in current menu selection (if a value is present) -Circle/start: select current entry (see help for entry to see what this means) -Square: exit the current menu. - - --- Frameskip -- - -The purpose behind frameskip is to cause the emulator to not render every -frame of graphics to make the emulation closer to fullspeed. Many games will -run fullspeed without skipping any frames, however, some (particularly more -graphically demanding ones) will require this. - -Frameskip can be set to two forms, either auto or manual. Auto will attempt -to skip only as many frames as necessary to make the game full speed, and -will not skip more than 4 in a row no matter what speed the game runs at -(at this point the benefits of frameskip yield diminishing returns). - -It is recommended that you keep frameskip on auto, but manual is maintained -as an option if you want it and works as follows: - -Manual frameskip will only render one out of every (n + 1) frames, where n -is the current frameskip value (so 0 will render everything). Increasing -the frameskip can improve speed, especially with very graphically -intensive games. - - --- Cheats -- - -Currently, gpSP supports some functionality of Gameshark/Pro Action Replay -cheat codes. To use these, you must first make a file with the same name -as the ROM you want the cheat code to apply to, but with the extension .cht. -Put this file in the same directory as the ROM. To make it use a normal -text editor like notepad or wordpad if you're on Windows. - -To write a code, write the type of model it is, gameshark_v1, gameshark_v3, -PAR_v1, or PAR_v3. gameshark_v1/PAR_v1 and gameshark_v3/PAR_v3 respectively -are interchangeable, but v1 and v3 are not! So if you don't know which -version it is, try both to see if it'll work. - -Then, after that, put a space and put the name you'd like to give the cheat. - -On the next several lines, put each cheat code pair, which should look like -this: - -AAAAAAAA BBBBBBBB - -Then put a blank line when you're done with that code, and start a new code -immediately after it. Here's an example of what a cheat file should look -like: - - -gameshark_v3 MarioInfHP -995fa0d9 0c6720d2 - -gameshark_v3 MarioMaxHP -21d58888 c5d0e432 - -gameshark_v3 InfHlthBat -6f4feadb 0581b00e -79af5dc6 5ce0d2b1 -dbbd5995 44b801c9 -65f8924d 2fbcd3c4 - -gameshark_v3 StopTimer -2b399ca4 ec81f071 - - -After you have written the .cht file, you have to enable the cheats -individually in the game menu. Go to the Cheats/Misc menu, and you will -see the cheats; turn them on here. You may turn them on and off as you -please, but note that some cheats may still hold after you turn them off, -due to the nature of the system. Restart to completely get rid of them. - -IMPORTANT NOTES: - -This is still very work in progress! I basically added this in only 1.5 -or so hours, and I don't have a lot of time right now to work on it -before releasing. So I'll probably improve it later. - -Not all of gameshark's features are supported, especially for v3. Only -basic cheats will work, more or less. - -Cheats may be unstable and may crash your game. If you're having problems -turn the cheats off. - -Really, there's no guarantee that ANY cheats will work; I tried a few and -some seem to work, others are questionable. Try for yourself, but don't -expect anything to actually work right now. Do expect this feature to -improve in future versions. - - - --- Frequently Asked Questions -- - -Q) How do I run this on my PSP? - -A) Provided is an EBOOT.PBP which will run as is on a 1.0 firmware - PSP or custom firmware that can run unsigned EBOOTs. On 1.5 firmwares - you must use a kxploit tool to run it (try SeiPSPtool). On 2.0 - firmwares and higher further exploits must be used - see - http://pspupdates.qj.net/ for more information. Note that I have NOT - tested this emulator on any firmware version besides 1.5, and it's - very possible that it doesn't run well, or at all on higher versions. - Therefore I strongly recommend you downgrade if possible, and use - Devhook to run games that require > 1.5 version firmwares. - - Be sure to include in the same directory as the EBOOT.PBP file the - game_config.txt file included and the gba_bios.bin file which you - must provide yourself. - - gpSP does not run on PSPs with version 2.71 or higher firmware yet, - nor does any other homebrew executable. - - -Q) What is a BIOS image file? Why do I need it to run gpSP? Other GBA - emulators don't require this... - -A) The GBA BIOS image file is a copy of a ROM on the GBA system that - has code for starting up the GBA (it shows the logo), verifying the - game, and most importantly, providing utility functions for the games - to use. It is the latter that gpSP needs the BIOS present for. It's - possible to replace all of these functions with equivilent code, but - this will take time - in the future gpSP may not require a BIOS image. - - -Q) I can't find this BIOS image.. please send it to me. - -A) Sorry, but you're on your own. I won't send you a BIOS or tell you - where to get one (unless you want to rip it from a GBA yourself, in - which case I'll just give you the same link at the top). I can't do - this because it's not legal to send it around and I don't want to - get a reputation for illegally distributing BIOS images. - - -Q) How do I know I have the right BIOS? - -A) If you have md5sum you can check if it has this hash: - a860e8c0b6d573d191e4ec7db1b1e4f6 - That BIOS should work fine. I think that some others work fine too, - although I haven't confirmed this with absolute certainty. It's also - theoretically possible to use custom (and free) BIOS replacements, - but I don't know of any publically availablone ones. - - As far as I'm aware there are two BIOSes floating around, I doubt - you'll get one that isn't one of those two. There's a very easy way - to determine which one you have - just look at the very first byte in - a hex editor. The correct BIOS begins with 0x18, the buggy BIOS begins - with 0x14. - - -Q) My favorite game won't run. - -A) There probably isn't anything you can do about this, although a - change to game_config.txt might help. gpSP is still an emulator in - its infancy so the compatability is not superb. I don't have time - to test too many games so I'm releasing it as a public beta to get - a feel for some things that don't work. The next version could - perhaps fix it, or it might never run. There are always other - emulators of course, please try one. - - However, before nagging me there is one thing I recommend you try, - and that is to add the option "iwram_stack_optimize = no" for the - game in game_config.txt. See the file itself for more information - on how to do this. If this fixes your game (and it's not already - in the game_config.txt) please tell me about it. - - -Q) My favorite game is very slow. - -A) Emulating GBA takes a number of resources and getting it done well - on PSP is no simple task by any means. Some games are just going to - overwhelm the emulator completely. Of course, there is one special - case of game (a lot of early generation games fall under this - category) that can be made much faster by a simple addition to the - game_config.txt file. Wait for a new version of this file or the - next version of the emulator and the game may be improved. - - That aside, there are still numerous optimizations that can be done, - and I sure you future versions will be faster (I just can't tell you - how much) - - Also, a lot of games will be sped up considerably by adding an - idle_loop_eliminate_target line for it in game_config.txt. There - are some more obscurer options there that can improve speed too. If - the game is VERY slow there might be something wrong with its - emulation that can be improved. For instance, if you can't get a game - to run fullspeed on any frameskip you should e-mail me about it. - - -Q) Some games run fullspeed but the sound is messed up. Why? - -A) At least 9 out of 10 times it means the game isn't really running - full speed, but just that you can't notice the difference. Increasing - frameskip will almost always improve sound quality in these - situations, to a certain point (after around frameskip 3 you - probably won't be seeing many more returns if it isn't already - fullspeed). The rest of the time it means there's a bug somewhere else - in the emulator, probably in the CPU core. Chances are that all you - can do is wait for it to be fixed in a later release. - - -Q) The emulator crashed! - -A) Most games that don't run will probably take the emulator down with - it, or it could be an emulator bug completely unrelated to the game - (but unlikely). Press home and wait for the next version. - - There is some information that comes up when the game crashes. This - information may be slightly useful to me, but chances are it - usually won't be all that interesting. - - These days games are more likely to exit with a "bad crash" error. - This number is possibly useful to me, but to debug a game I'll have - to reproduce the crash anyway. When this happens it's probably due to - a bug in the CPU core that hasn't been fixed yet. - - -Q) Why won't my game save? - -A) The game might need 128KB flash turned on and might not be listed in - game_config.txt. See game_config.txt for more information regarding - this. Be sure to include game_config.txt with the EBOOT.PBP file. - - Other games might simply have bugs in the save support. For now, use - savestates as an alternative if you can't save. - - -Q) How do I change sound quality? - -A) Right now, you can't. For those wondering, sound is locked at 44.1KHz - (sounds a bit high? It is, but it's currently necessary to play - everything correctly). I don't have any plans to allow changing this - right now, because I don't think there's really much reason to be - able to (it'd be a tiny speed boost at best and I don't think SDL even - allows for anything besides this sampling rate on PSP) - - -Q) What is this emulator's name? - -A) Um.. what? It's gameplaySP, isn't it? You call it gpSP for short. - Somehow the name can't have the acronyms gbSP, gbapSP, or really - just about anything else you feel like giving it. Oh, and if you - really want to make me happy get the capitalization right too. - That's gpSP, not gPSP, GPsp.. you get the idea. - - -Q) Does gpSP run Gameboy/Gameboy Color games? Will it later? - -A) No. Even though GBA can run these games it uses separate hardware - that proper GBA games have no access to (save for the audio chip), - and thus there's no point including it in a GBA emulator (it - doesn't help run GBA games). I recommend using a GB/GBC emulator - like Rin for playing these games. It'll probably give you a lot - more options anyway. gpSP will never actually emulate GB/GBC - games. You'd may as well be waiting for it to emulate PS2 games... - (that was an analogy. gpSP won't ever emulate PS2 games. >_>) - - -Q) Other emulators use the PSP's graphical hardware to accelerate the - video emulation. Is this possible for gpSP? - -A) I'm honestly not too sure at this point. It's definitely a rather - complicated procedure, and I don't think it'll be possible to - accurately accelerate alpha blending. On the other hand, affine - transformations could perhaps receive a speed boost this way. Any - solution would have to be hybrid hardware/software, which might be - possible due to the nature of the PSP's VRAM. Maybe someone will - be willing to help me think of possibilities here? - - But don't bother of you're just going to tell me to render a list - of quads... - - -Q) Other emulators use the PSP's second CPU to offload the sound - emulation. Is this possible for gpSP? - -A) Yes, but it wouldn't improve it nearly as much as say, SNES9x TYL. - This is because most of the processing that goes into sound on a GBA - game is done in the CPU, not in dedicated audio hardware. It could - help a little, but probably not a lot. Maybe enough to be worthwhile. - It might also be possible to split the video rendering to the main - CPU and the main emulation to the secondary one, but there are a lot - of coherency issues involved. - - -Q) I heard gpSP can only load games 16MB or smaller in size. Is this - true? What about zipped games? - -A) As of version 0.8 gpSP can play 32MB ROMs. However, they must be - unzipped. The reason for this is that parts of the ROM are constantly - loaded to memory as needed, and for this to be as fast as possible the - ROM has to be present on the memory stick in raw format. - - You might be wondering, why not just have gpSP unzip the ROM to a file - then delete the file when it is done? The reason why is because this - would impose a "hidden" requirement of 32MB on the user that very - likely may not be there. Furthermore, there are only a few 32MB games - that anyone actually wants to play. If you only have one 32MB game on - your memstick then it'd actually require signifnicantly more free space - to hold both the ROM and the 32MB raw file. With 2 32MB ROMs you only - gain a around 10-25MB of free space, depending on how effective the - compression is. - - -Q) Savestates? From other emulators?? - -A) See the savestates option in main menu. gpSP will probably never - support savestates from other emulators, there's just too much in the - way of emulator specific data in them. - - Savestates are currently 506,943 bytes. They would be a little smaller - without the snapshot, but I find that very useful and it wouldn't help - size immensely. Compression would help, but I wanted the size to be - constant so you knew exactly how much you could hold and to improve - save/load speed. - - -Q) What's with the zip support? - -A) I hear stories that some games work unzipped and not zipped, so you - might want to try unzipping them if it gives you problems. You also - might want to try making fresh zips with WinRAR - users have - reported some higher success rates doing this. - - -Q) What's with the config file? Should I make it read only? - -A) There was a bug in version 0.6 that caused the config file to not - get updated or get corrupted sometimes. Hopefully this is fixed now, - but if it DOES get corrupted making it read only can prevent this - from happening in the future. - - -Q) So when WILL the next version be released? - -A) Sorry, but I almost never announce release dates. Furthermore, I'll - probably be pretty hush hush on internal development, just to keep - people from nagging me about it and building too much suspense. - - -Q) I don't like this emulator. Are there other alternatives? - -A) Yes. Try PSPVBA by Zx-81 (http://zx81.dcemu.co.uk/). Overall I doubt - the compatability is significantly higher than gpSP's anymore, but - I'm sure there are some games it runs that gpSP doesn't. - - -Q) I heard there was a version of gpSP for PCs. Is that true? - -A) I developed this emulator internally on PC. It might have a speed - advantage over other PC GBA emulators, although the PSP version has - more sophisticated optimizations. Most people have fast enough - computers to run better GBA emulators for PC and gpSP lacks some - important features (screen resizing) that the PSP version kinda - hides. Even though gpSP spent a majority of its development - gestation as a PC app it was always developed with the PSP in mind, - so the PC version will probably not see the light of the day unless - I get overwhelming demand for it. It is, however, possible to - build it from the source. But I request that you don't distribute - such builds. If you happen to find one, bear in mind that I don't - offer any support for it, and as far as I'm concerned it won't - exist. - - -Q) I hear there's a version of gpSP for other platforms too, like - Dreamcast. And I hear they're slow! What gives? - - These are ports, done by other people (or maybe myself?). This is - possible because gpSP is open source and its base version is fairly - portable, but to run fast enough on anything but platforms quite a - bit faster than PSP it at least needs a CPU specific dynarec backend. - - I don't (necessarily) maintain all builds of gpSP, so you'll have to - contact the authors of these ports for more information. That - notwithstanding, I try to get as involved in other ports of gpSP as - I can. - - -Q) I want to modify gpSP. How can I do this, and am I at liberty to do - so? - -A) Yes, you are, under the terms of the GPL (see the included - COPYING.DOC). You can download the sourcecode from whereever you - downloaded this; if you can't find it please e-mail me and I'll give - you a link to it. I would vastly appreciate it if you contacted me first - before forking my project, especially if you're just looking to gain - recognition without adding much to it. It's better to keep all changes - tidy in one branch of development. - - I would like to stress this a little more seriously (hopefully those - interested are reading this). Although you are legally entitled to - release your own forks of gpSP it would be much more benficial to me, - to you, and to the users of this program if you instead tried working - with me to get your changes incorporated into the next version. I - really don't feel like competing with other builds of my source - anymore, so please do me a big favor and send me an e-mail if you want - to work with gpSP. - - -Q) How do I build gpSP? - -A) make will build it. You need to have SDL for PSP installed, as well - as the standard PSP toolchain/PSPSDK and zlib. gpSP isn't much of a - "build it yourself" program so please don't bother me much about how to - build it unless you have a good reason for wanting to do so. - - -Q) What is with the version numbers? - -A) Anything less than 1.0 means beta. Beta means that I still have major - plans for working on it, and that I don't fully back it as being - stable or reliable software. Of course, if it does hit 1.0, that doesn't - mean it'll be perfect. It just means I'll have spent a lot of cumulative - time working things out. The closer it gets to 0.9, the happier I am with - it overall. - - -Q) Donations? - -A) Very appreciated. exophase@gmail.com on PayPal. <3 - - -Q) How can I contact you? - -A) exophase@gmail.com, Exophase on AIM, exophase@adelphia.net on MSN. I - welcome IMs, but if you nag me a lot you'll make me sad inside. And - don't ask me for ROMs or the GBA BIOS. I figured this was common sense - but apparently not. - - --- Credits -- - -Exophase: main developer -siberianSTAR: zip support -psp298: analog nub code - -Beta testers for 0.7: -theohsoawesome1 -thisnamesucks837 -blackdragonwave9 -dagreatpeewee -xsgenji - -Beta testers for 0.8: -Runaway_prisoner -theohsoawesome1 -tanyareimyoko -spynghotoh2020 - -Beta testers for 0.9: -RunawayPrisoner (my right hand man) -Veskgar (my left hand man) -qasim - --- Special thanks -- - -Quasar84: He's helped me in so many ways with this. We both kinda learned -GBA together, he did little demos for me and I got them emulated. It was -great trying out your more advanced code for your own projects once you -got to them, it was equally rewarding to see your work and to be able to -run it at the same time. Least of all I wouldn't have been able to do any -of this without your constant support and presence. I really owe this -release to you. - -gladius: You are an amazing GBA coder. I wouldn't have been able to get -through some tough parts without your help. Its been good talking about -ideas with you.. I'm sure you're glad to see that there's finally a GBA -emulator with dynarec ;) - - -Many, many others of course, probably too many to name, and I don't want -to make anyone feel bad by putting others above them (well, except those -two, heh) so if you think you should be on here, you probably should be! -Just pretend you are for now, and maybe I'll put you here next time. - diff --git a/psp/Makefile b/psp/Makefile deleted file mode 100644 index 9906e6f0..00000000 --- a/psp/Makefile +++ /dev/null @@ -1,26 +0,0 @@ -# -x assembler-with-cpp -# gpSP makefile -# Gilead Kutnick - Exophase - -# Global definitions - -PSPSDK = ${shell psp-config --pspsdk-path} -PREFIX = ${shell psp-config --psp-prefix} - -OBJS = main.o cpu.o video.o memory.o sound.o input.o \ - cpu_threaded.o gui.o zip.o cheats.o mips_stub.o - -TARGET = gpSP - -VPATH += .. -CFLAGS += -O3 -DPSP_BUILD -G0 -funsigned-char -CFLAGS += ${shell ${PREFIX}/bin/sdl-config --cflags} -ASFLAGS = ${CFLAGS} -PSP_EBOOT_TITLE = gpSP -EXTRA_TARGETS = EBOOT.PBP - -LIBS += ${shell ${PREFIX}/bin/sdl-config --libs} -lpsppower \ - -lz - -include ${PSPSDK}/lib/build.mak - diff --git a/psp/mips_emit.h b/psp/mips_emit.h deleted file mode 100644 index 8fc95e8a..00000000 --- a/psp/mips_emit.h +++ /dev/null @@ -1,2531 +0,0 @@ -/* gameplaySP - * - * Copyright (C) 2006 Exophase - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef MIPS_EMIT_H -#define MIPS_EMIT_H - -u32 mips_update_gba(u32 pc); - -// Although these are defined as a function, don't call them as -// such (jump to it instead) -void mips_indirect_branch_arm(u32 address); -void mips_indirect_branch_thumb(u32 address); -void mips_indirect_branch_dual(u32 address); - -u32 execute_read_cpsr(); -u32 execute_read_spsr(); -void execute_swi(u32 pc); - -u32 execute_spsr_restore(u32 address); -void execute_store_cpsr(u32 new_cpsr, u32 store_mask); -void execute_store_spsr(u32 new_spsr, u32 store_mask); - -u32 execute_spsr_restore_body(u32 address); -u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address); - -u32 execute_lsl_flags_reg(u32 value, u32 shift); -u32 execute_lsr_flags_reg(u32 value, u32 shift); -u32 execute_asr_flags_reg(u32 value, u32 shift); -u32 execute_ror_flags_reg(u32 value, u32 shift); - -void execute_aligned_store32(u32 address, u32 value); -u32 execute_aligned_load32(u32 address); - -void step_debug_mips(u32 pc); - -void reg_check(); - -typedef enum -{ - mips_reg_zero, - mips_reg_at, - mips_reg_v0, - mips_reg_v1, - mips_reg_a0, - mips_reg_a1, - mips_reg_a2, - mips_reg_a3, - mips_reg_t0, - mips_reg_t1, - mips_reg_t2, - mips_reg_t3, - mips_reg_t4, - mips_reg_t5, - mips_reg_t6, - mips_reg_t7, - mips_reg_s0, - mips_reg_s1, - mips_reg_s2, - mips_reg_s3, - mips_reg_s4, - mips_reg_s5, - mips_reg_s6, - mips_reg_s7, - mips_reg_t8, - mips_reg_t9, - mips_reg_k0, - mips_reg_k1, - mips_reg_gp, - mips_reg_sp, - mips_reg_fp, - mips_reg_ra -} mips_reg_number; - -typedef enum -{ - mips_special_sll = 0x00, - mips_special_srl = 0x02, - mips_special_sra = 0x03, - mips_special_sllv = 0x04, - mips_special_srlv = 0x06, - mips_special_srav = 0x07, - mips_special_jr = 0x08, - mips_special_jalr = 0x09, - mips_special_movz = 0x0A, - mips_special_movn = 0x0B, - mips_special_mfhi = 0x10, - mips_special_mthi = 0x11, - mips_special_mflo = 0x12, - mips_special_mtlo = 0x13, - mips_special_mult = 0x18, - mips_special_multu = 0x19, - mips_special_div = 0x1A, - mips_special_divu = 0x1B, - mips_special_madd = 0x1C, - mips_special_maddu = 0x1D, - mips_special_add = 0x20, - mips_special_addu = 0x21, - mips_special_sub = 0x22, - mips_special_subu = 0x23, - mips_special_and = 0x24, - mips_special_or = 0x25, - mips_special_xor = 0x26, - mips_special_nor = 0x27, - mips_special_slt = 0x2A, - mips_special_sltu = 0x2B -} mips_function_special; - -typedef enum -{ - mips_special3_ext = 0x00, - mips_special3_ins = 0x04, - mips_special3_bshfl = 0x20 -} mips_function_special3; - -typedef enum -{ - mips_regimm_bltz = 0x00, - mips_regimm_bltzal = 0x10 -} mips_function_regimm; - -typedef enum -{ - mips_opcode_special = 0x00, - mips_opcode_regimm = 0x01, - mips_opcode_j = 0x02, - mips_opcode_jal = 0x03, - mips_opcode_beq = 0x04, - mips_opcode_bne = 0x05, - mips_opcode_blez = 0x06, - mips_opcode_bgtz = 0x07, - mips_opcode_addi = 0x08, - mips_opcode_addiu = 0x09, - mips_opcode_slti = 0x0A, - mips_opcode_sltiu = 0x0B, - mips_opcode_andi = 0x0C, - mips_opcode_ori = 0x0D, - mips_opcode_xori = 0x0E, - mips_opcode_lui = 0x0F, - mips_opcode_llo = 0x18, - mips_opcode_lhi = 0x19, - mips_opcode_trap = 0x1A, - mips_opcode_special2 = 0x1C, - mips_opcode_special3 = 0x1F, - mips_opcode_lb = 0x20, - mips_opcode_lh = 0x21, - mips_opcode_lw = 0x23, - mips_opcode_lbu = 0x24, - mips_opcode_lhu = 0x25, - mips_opcode_sb = 0x28, - mips_opcode_sh = 0x29, - mips_opcode_sw = 0x2B, -} mips_opcode; - -#define mips_emit_reg(opcode, rs, rt, rd, shift, function) \ - *((u32 *)translation_ptr) = (mips_opcode_##opcode << 26) | \ - (rs << 21) | (rt << 16) | (rd << 11) | (shift << 6) | function; \ - translation_ptr += 4 \ - -#define mips_emit_special(function, rs, rt, rd, shift) \ - *((u32 *)translation_ptr) = (mips_opcode_special << 26) | \ - (rs << 21) | (rt << 16) | (rd << 11) | (shift << 6) | \ - mips_special_##function; \ - translation_ptr += 4 \ - -#define mips_emit_special3(function, rs, rt, imm_a, imm_b) \ - *((u32 *)translation_ptr) = (mips_opcode_special3 << 26) | \ - (rs << 21) | (rt << 16) | (imm_a << 11) | (imm_b << 6) | \ - mips_special3_##function; \ - translation_ptr += 4 \ - -#define mips_emit_imm(opcode, rs, rt, immediate) \ - *((u32 *)translation_ptr) = (mips_opcode_##opcode << 26) | \ - (rs << 21) | (rt << 16) | (immediate & 0xFFFF); \ - translation_ptr += 4 \ - -#define mips_emit_regimm(function, rs, immediate) \ - *((u32 *)translation_ptr) = (mips_opcode_regimm << 26) | \ - (rs << 21) | (mips_regimm_##function << 16) | (immediate & 0xFFFF); \ - translation_ptr += 4 \ - -#define mips_emit_jump(opcode, offset) \ - *((u32 *)translation_ptr) = (mips_opcode_##opcode << 26) | \ - (offset & 0x3FFFFFF); \ - translation_ptr += 4 \ - -#define mips_relative_offset(source, offset) \ - (((u32)offset - ((u32)source + 4)) / 4) \ - -#define mips_absolute_offset(offset) \ - ((u32)offset / 4) \ - -#define mips_emit_addu(rd, rs, rt) \ - mips_emit_special(addu, rs, rt, rd, 0) \ - -#define mips_emit_subu(rd, rs, rt) \ - mips_emit_special(subu, rs, rt, rd, 0) \ - -#define mips_emit_xor(rd, rs, rt) \ - mips_emit_special(xor, rs, rt, rd, 0) \ - -#define mips_emit_add(rd, rs, rt) \ - mips_emit_special(and, rs, rt, rd, 0) \ - -#define mips_emit_sub(rd, rs, rt) \ - mips_emit_special(sub, rs, rt, rd, 0) \ - -#define mips_emit_and(rd, rs, rt) \ - mips_emit_special(and, rs, rt, rd, 0) \ - -#define mips_emit_or(rd, rs, rt) \ - mips_emit_special(or, rs, rt, rd, 0) \ - -#define mips_emit_nor(rd, rs, rt) \ - mips_emit_special(nor, rs, rt, rd, 0) \ - -#define mips_emit_slt(rd, rs, rt) \ - mips_emit_special(slt, rs, rt, rd, 0) \ - -#define mips_emit_sltu(rd, rs, rt) \ - mips_emit_special(sltu, rs, rt, rd, 0) \ - -#define mips_emit_sllv(rd, rt, rs) \ - mips_emit_special(sllv, rs, rt, rd, 0) \ - -#define mips_emit_srlv(rd, rt, rs) \ - mips_emit_special(srlv, rs, rt, rd, 0) \ - -#define mips_emit_srav(rd, rt, rs) \ - mips_emit_special(srav, rs, rt, rd, 0) \ - -#define mips_emit_rotrv(rd, rt, rs) \ - mips_emit_special(srlv, rs, rt, rd, 1) \ - -#define mips_emit_sll(rd, rt, shift) \ - mips_emit_special(sll, 0, rt, rd, shift) \ - -#define mips_emit_srl(rd, rt, shift) \ - mips_emit_special(srl, 0, rt, rd, shift) \ - -#define mips_emit_sra(rd, rt, shift) \ - mips_emit_special(sra, 0, rt, rd, shift) \ - -#define mips_emit_rotr(rd, rt, shift) \ - mips_emit_special(srl, 1, rt, rd, shift) \ - -#define mips_emit_mfhi(rd) \ - mips_emit_special(mfhi, 0, 0, rd, 0) \ - -#define mips_emit_mflo(rd) \ - mips_emit_special(mflo, 0, 0, rd, 0) \ - -#define mips_emit_mthi(rs) \ - mips_emit_special(mthi, rs, 0, 0, 0) \ - -#define mips_emit_mtlo(rs) \ - mips_emit_special(mtlo, rs, 0, 0, 0) \ - -#define mips_emit_mult(rs, rt) \ - mips_emit_special(mult, rs, rt, 0, 0) \ - -#define mips_emit_multu(rs, rt) \ - mips_emit_special(multu, rs, rt, 0, 0) \ - -#define mips_emit_div(rs, rt) \ - mips_emit_special(div, rs, rt, 0, 0) \ - -#define mips_emit_divu(rs, rt) \ - mips_emit_special(divu, rs, rt, 0, 0) \ - -#define mips_emit_madd(rs, rt) \ - mips_emit_special(madd, rs, rt, 0, 0) \ - -#define mips_emit_maddu(rs, rt) \ - mips_emit_special(maddu, rs, rt, 0, 0) \ - -#define mips_emit_movn(rd, rs, rt) \ - mips_emit_special(movn, rs, rt, rd, 0) \ - -#define mips_emit_movz(rd, rs, rt) \ - mips_emit_special(movz, rs, rt, rd, 0) \ - -#define mips_emit_lb(rt, rs, offset) \ - mips_emit_imm(lb, rs, rt, offset) \ - -#define mips_emit_lbu(rt, rs, offset) \ - mips_emit_imm(lbu, rs, rt, offset) \ - -#define mips_emit_lh(rt, rs, offset) \ - mips_emit_imm(lh, rs, rt, offset) \ - -#define mips_emit_lhu(rt, rs, offset) \ - mips_emit_imm(lhu, rs, rt, offset) \ - -#define mips_emit_lw(rt, rs, offset) \ - mips_emit_imm(lw, rs, rt, offset) \ - -#define mips_emit_sb(rt, rs, offset) \ - mips_emit_imm(sb, rs, rt, offset) \ - -#define mips_emit_sh(rt, rs, offset) \ - mips_emit_imm(sh, rs, rt, offset) \ - -#define mips_emit_sw(rt, rs, offset) \ - mips_emit_imm(sw, rs, rt, offset) \ - -#define mips_emit_lui(rt, imm) \ - mips_emit_imm(lui, 0, rt, imm) \ - -#define mips_emit_addiu(rt, rs, imm) \ - mips_emit_imm(addiu, rs, rt, imm) \ - -#define mips_emit_xori(rt, rs, imm) \ - mips_emit_imm(xori, rs, rt, imm) \ - -#define mips_emit_ori(rt, rs, imm) \ - mips_emit_imm(ori, rs, rt, imm) \ - -#define mips_emit_andi(rt, rs, imm) \ - mips_emit_imm(andi, rs, rt, imm) \ - -#define mips_emit_slti(rt, rs, imm) \ - mips_emit_imm(slti, rs, rt, imm) \ - -#define mips_emit_sltiu(rt, rs, imm) \ - mips_emit_imm(sltiu, rs, rt, imm) \ - -#define mips_emit_ext(rt, rs, pos, size) \ - mips_emit_special3(ext, rs, rt, (size - 1), pos) \ - -#define mips_emit_ins(rt, rs, pos, size) \ - mips_emit_special3(ins, rs, rt, (pos + size - 1), pos) \ - -// Breaks down if the backpatch offset is greater than 16bits, take care -// when using (should be okay if limited to conditional instructions) - -#define mips_emit_b_filler(type, rs, rt, writeback_location) \ - (writeback_location) = translation_ptr; \ - mips_emit_imm(type, rs, rt, 0) \ - -// The backpatch code for this has to be handled differently than the above - -#define mips_emit_j_filler(writeback_location) \ - (writeback_location) = translation_ptr; \ - mips_emit_jump(j, 0) \ - -#define mips_emit_b(type, rs, rt, offset) \ - mips_emit_imm(type, rs, rt, offset) \ - -#define mips_emit_j(offset) \ - mips_emit_jump(j, offset) \ - -#define mips_emit_jal(offset) \ - mips_emit_jump(jal, offset) \ - -#define mips_emit_jr(rs) \ - mips_emit_special(jr, rs, 0, 0, 0) \ - -#define mips_emit_bltzal(rs, offset) \ - mips_emit_regimm(bltzal, rs, offset) \ - -#define mips_emit_nop() \ - mips_emit_sll(reg_zero, reg_zero, 0) \ - -#define reg_base mips_reg_s0 -#define reg_cycles mips_reg_s1 -#define reg_a0 mips_reg_a0 -#define reg_a1 mips_reg_a1 -#define reg_a2 mips_reg_a2 -#define reg_rv mips_reg_v0 -#define reg_pc mips_reg_s3 -#define reg_temp mips_reg_at -#define reg_zero mips_reg_zero - -#define reg_n_cache mips_reg_s4 -#define reg_z_cache mips_reg_s5 -#define reg_c_cache mips_reg_s6 -#define reg_v_cache mips_reg_s7 - -#define reg_r0 mips_reg_v1 -#define reg_r1 mips_reg_a3 -#define reg_r2 mips_reg_t0 -#define reg_r3 mips_reg_t1 -#define reg_r4 mips_reg_t2 -#define reg_r5 mips_reg_t3 -#define reg_r6 mips_reg_t4 -#define reg_r7 mips_reg_t5 -#define reg_r8 mips_reg_t6 -#define reg_r9 mips_reg_t7 -#define reg_r10 mips_reg_s2 -#define reg_r11 mips_reg_t8 -#define reg_r12 mips_reg_t9 -#define reg_r13 mips_reg_gp -#define reg_r14 mips_reg_fp - -// Writing to r15 goes straight to a0, to be chained with other ops - -u32 arm_to_mips_reg[] = -{ - reg_r0, - reg_r1, - reg_r2, - reg_r3, - reg_r4, - reg_r5, - reg_r6, - reg_r7, - reg_r8, - reg_r9, - reg_r10, - reg_r11, - reg_r12, - reg_r13, - reg_r14, - reg_a0, - reg_a1, - reg_a2, - reg_temp -}; - -#define arm_reg_a0 15 -#define arm_reg_a1 16 -#define arm_reg_a2 17 -#define arm_reg_temp 18 - -#define generate_load_reg(ireg, reg_index) \ - mips_emit_addu(ireg, arm_to_mips_reg[reg_index], reg_zero) \ - -#define generate_load_imm(ireg, imm) \ - if(((s32)imm >= -32768) && ((s32)imm <= 32767)) \ - { \ - mips_emit_addiu(ireg, reg_zero, imm); \ - } \ - else \ - { \ - if(((u32)imm >> 16) == 0x0000) \ - { \ - mips_emit_ori(ireg, reg_zero, imm); \ - } \ - else \ - { \ - mips_emit_lui(ireg, imm >> 16); \ - \ - if(((u32)imm & 0x0000FFFF) != 0x00000000) \ - { \ - mips_emit_ori(ireg, ireg, imm & 0xFFFF); \ - } \ - } \ - } \ - -#define generate_load_pc(ireg, new_pc) \ -{ \ - s32 pc_delta = new_pc - stored_pc; \ - if((pc_delta >= -32768) && (pc_delta <= 32767)) \ - { \ - mips_emit_addiu(ireg, reg_pc, pc_delta); \ - } \ - else \ - { \ - generate_load_imm(ireg, new_pc); \ - } \ -} \ - -#define generate_store_reg(ireg, reg_index) \ - mips_emit_addu(arm_to_mips_reg[reg_index], ireg, reg_zero) \ - -#define generate_shift_left(ireg, imm) \ - mips_emit_sll(ireg, ireg, imm) \ - -#define generate_shift_right(ireg, imm) \ - mips_emit_srl(ireg, ireg, imm) \ - -#define generate_shift_right_arithmetic(ireg, imm) \ - mips_emit_sra(ireg, ireg, imm) \ - -#define generate_rotate_right(ireg, imm) \ - mips_emit_rotr(ireg, ireg, imm) \ - -#define generate_add(ireg_dest, ireg_src) \ - mips_emit_addu(ireg_dest, ireg_dest, ireg_src) \ - -#define generate_sub(ireg_dest, ireg_src) \ - mips_emit_subu(ireg_dest, ireg_dest, ireg_src) \ - -#define generate_or(ireg_dest, ireg_src) \ - mips_emit_or(ireg_dest, ireg_dest, ireg_src) \ - -#define generate_xor(ireg_dest, ireg_src) \ - mips_emit_xor(ireg_dest, ireg_dest, ireg_src) \ - -#define generate_alu_imm(imm_type, reg_type, ireg_dest, ireg_src, imm) \ - if(((s32)imm >= -32768) && ((s32)imm <= 32767)) \ - { \ - mips_emit_##imm_type(ireg_dest, ireg_src, imm); \ - } \ - else \ - { \ - generate_load_imm(reg_temp, imm); \ - mips_emit_##reg_type(ireg_dest, ireg_src, reg_temp); \ - } \ - -#define generate_alu_immu(imm_type, reg_type, ireg_dest, ireg_src, imm) \ - if(((u32)imm >= 0) && ((u32)imm <= 65535)) \ - { \ - mips_emit_##imm_type(ireg_dest, ireg_src, imm); \ - } \ - else \ - { \ - generate_load_imm(reg_temp, imm); \ - mips_emit_##reg_type(ireg_dest, ireg_src, reg_temp); \ - } \ - -#define generate_add_imm(ireg, imm) \ - generate_alu_imm(addiu, add, ireg, ireg, imm) \ - -#define generate_sub_imm(ireg, imm) \ - generate_alu_imm(addiu, add, ireg, ireg, -imm) \ - -#define generate_xor_imm(ireg, imm) \ - generate_alu_immu(xori, xor, ireg, ireg, imm) \ - -#define generate_add_reg_reg_imm(ireg_dest, ireg_src, imm) \ - generate_alu_imm(addiu, add, ireg_dest, ireg_src, imm) \ - -#define generate_and_imm(ireg, imm) \ - generate_alu_immu(andi, and, ireg, ireg, imm) \ - -#define generate_mov(ireg_dest, ireg_src) \ - mips_emit_addu(ireg_dest, ireg_src, reg_zero) \ - -#define generate_multiply_s64() \ - mips_emit_mult(arm_to_mips_reg[rm], arm_to_mips_reg[rs]) \ - -#define generate_multiply_u64() \ - mips_emit_multu(arm_to_mips_reg[rm], arm_to_mips_reg[rs]) \ - -#define generate_multiply_s64_add() \ - mips_emit_madd(arm_to_mips_reg[rm], arm_to_mips_reg[rs]) \ - -#define generate_multiply_u64_add() \ - mips_emit_maddu(arm_to_mips_reg[rm], arm_to_mips_reg[rs]) \ - -#define generate_function_call(function_location) \ - mips_emit_jal(mips_absolute_offset(function_location)); \ - mips_emit_nop() \ - -#define generate_function_call_swap_delay(function_location) \ -{ \ - u32 delay_instruction = address32(translation_ptr, -4); \ - translation_ptr -= 4; \ - mips_emit_jal(mips_absolute_offset(function_location)); \ - address32(translation_ptr, 0) = delay_instruction; \ - translation_ptr += 4; \ -} \ - -#define generate_swap_delay() \ -{ \ - u32 delay_instruction = address32(translation_ptr, -8); \ - u32 branch_instruction = address32(translation_ptr, -4); \ - branch_instruction = (branch_instruction & 0xFFFF0000) | \ - (((branch_instruction & 0x0000FFFF) + 1) & 0x0000FFFF); \ - address32(translation_ptr, -8) = branch_instruction; \ - address32(translation_ptr, -4) = delay_instruction; \ -} \ - -#define generate_cycle_update() \ - if(cycle_count != 0) \ - { \ - mips_emit_addiu(reg_cycles, reg_cycles, -cycle_count); \ - cycle_count = 0; \ - } \ - -#define generate_cycle_update_force() \ - mips_emit_addiu(reg_cycles, reg_cycles, -cycle_count); \ - cycle_count = 0 \ - -#define generate_branch_patch_conditional(dest, offset) \ - *((u16 *)(dest)) = mips_relative_offset(dest, offset) \ - -#define generate_branch_patch_unconditional(dest, offset) \ - *((u32 *)(dest)) = (mips_opcode_j << 26) | \ - ((mips_absolute_offset(offset)) & 0x3FFFFFF) \ - -#define generate_branch_no_cycle_update(writeback_location, new_pc) \ - if(pc == idle_loop_target_pc) \ - { \ - generate_load_pc(reg_a0, new_pc); \ - generate_function_call_swap_delay(mips_update_gba); \ - mips_emit_j_filler(writeback_location); \ - mips_emit_nop(); \ - } \ - else \ - { \ - generate_load_pc(reg_a0, new_pc); \ - mips_emit_bltzal(reg_cycles, \ - mips_relative_offset(translation_ptr, update_trampoline)); \ - generate_swap_delay(); \ - mips_emit_j_filler(writeback_location); \ - mips_emit_nop(); \ - } \ - -#define generate_branch_cycle_update(writeback_location, new_pc) \ - generate_cycle_update(); \ - generate_branch_no_cycle_update(writeback_location, new_pc) \ - -#define generate_conditional_branch(ireg_a, ireg_b, type, writeback_location) \ - generate_branch_filler_##type(ireg_a, ireg_b, writeback_location) \ - -// a0 holds the destination - -#define generate_indirect_branch_cycle_update(type) \ - mips_emit_j(mips_absolute_offset(mips_indirect_branch_##type)); \ - generate_cycle_update_force() \ - -#define generate_indirect_branch_no_cycle_update(type) \ - mips_emit_j(mips_absolute_offset(mips_indirect_branch_##type)); \ - mips_emit_nop() \ - -#define generate_block_prologue() \ - update_trampoline = translation_ptr; \ - __asm__ \ - ( \ - "cache 8, 0(%0)\n" \ - "cache 8, 0(%0)" : : "r"(translation_ptr) \ - ); \ - \ - mips_emit_j(mips_absolute_offset(mips_update_gba)); \ - mips_emit_nop(); \ - generate_load_imm(reg_pc, stored_pc) \ - -#define translate_invalidate_dcache() \ - sceKernelDcacheWritebackAll() \ - -#define block_prologue_size 8 - -#define check_generate_n_flag \ - (flag_status & 0x08) \ - -#define check_generate_z_flag \ - (flag_status & 0x04) \ - -#define check_generate_c_flag \ - (flag_status & 0x02) \ - -#define check_generate_v_flag \ - (flag_status & 0x01) \ - -#define generate_load_reg_pc(ireg, reg_index, pc_offset) \ - if(reg_index == REG_PC) \ - { \ - generate_load_pc(ireg, (pc + pc_offset)); \ - } \ - else \ - { \ - generate_load_reg(ireg, reg_index); \ - } \ - -#define check_load_reg_pc(arm_reg, reg_index, pc_offset) \ - if(reg_index == REG_PC) \ - { \ - reg_index = arm_reg; \ - generate_load_pc(arm_to_mips_reg[arm_reg], (pc + pc_offset)); \ - } \ - -#define check_store_reg_pc_no_flags(reg_index) \ - if(reg_index == REG_PC) \ - { \ - generate_indirect_branch_arm(); \ - } \ - -#define check_store_reg_pc_flags(reg_index) \ - if(reg_index == REG_PC) \ - { \ - generate_function_call(execute_spsr_restore); \ - generate_indirect_branch_dual(); \ - } \ - -#define generate_shift_imm_lsl_no_flags(arm_reg, _rm, _shift) \ - check_load_reg_pc(arm_reg, _rm, 8); \ - if(_shift != 0) \ - { \ - mips_emit_sll(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], _shift); \ - _rm = arm_reg; \ - } \ - -#define generate_shift_imm_lsr_no_flags(arm_reg, _rm, _shift) \ - if(_shift != 0) \ - { \ - check_load_reg_pc(arm_reg, _rm, 8); \ - mips_emit_srl(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], _shift); \ - } \ - else \ - { \ - mips_emit_addu(arm_to_mips_reg[arm_reg], reg_zero, reg_zero); \ - } \ - _rm = arm_reg \ - -#define generate_shift_imm_asr_no_flags(arm_reg, _rm, _shift) \ - check_load_reg_pc(arm_reg, _rm, 8); \ - if(_shift != 0) \ - { \ - mips_emit_sra(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], _shift); \ - } \ - else \ - { \ - mips_emit_sra(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], 31); \ - } \ - _rm = arm_reg \ - -#define generate_shift_imm_ror_no_flags(arm_reg, _rm, _shift) \ - check_load_reg_pc(arm_reg, _rm, 8); \ - if(_shift != 0) \ - { \ - mips_emit_rotr(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], _shift); \ - } \ - else \ - { \ - mips_emit_srl(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], 1); \ - mips_emit_ins(arm_to_mips_reg[arm_reg], reg_c_cache, 31, 1); \ - } \ - _rm = arm_reg \ - -#define generate_shift_imm_lsl_flags(arm_reg, _rm, _shift) \ - check_load_reg_pc(arm_reg, _rm, 8); \ - if(_shift != 0) \ - { \ - mips_emit_ext(reg_c_cache, arm_to_mips_reg[_rm], (32 - _shift), 1); \ - mips_emit_sll(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], _shift); \ - _rm = arm_reg; \ - } \ - -#define generate_shift_imm_lsr_flags(arm_reg, _rm, _shift) \ - check_load_reg_pc(arm_reg, _rm, 8); \ - if(_shift != 0) \ - { \ - mips_emit_ext(reg_c_cache, arm_to_mips_reg[_rm], (_shift - 1), 1); \ - mips_emit_srl(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], _shift); \ - } \ - else \ - { \ - mips_emit_srl(reg_c_cache, arm_to_mips_reg[_rm], 31); \ - mips_emit_addu(arm_to_mips_reg[arm_reg], reg_zero, reg_zero); \ - } \ - _rm = arm_reg \ - -#define generate_shift_imm_asr_flags(arm_reg, _rm, _shift) \ - check_load_reg_pc(arm_reg, _rm, 8); \ - if(_shift != 0) \ - { \ - mips_emit_ext(reg_c_cache, arm_to_mips_reg[_rm], (_shift - 1), 1); \ - mips_emit_sra(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], _shift); \ - } \ - else \ - { \ - mips_emit_sra(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], 31); \ - mips_emit_andi(reg_c_cache, arm_to_mips_reg[arm_reg], 1); \ - } \ - _rm = arm_reg \ - -#define generate_shift_imm_ror_flags(arm_reg, _rm, _shift) \ - check_load_reg_pc(arm_reg, _rm, 8); \ - if(_shift != 0) \ - { \ - mips_emit_ext(reg_c_cache, arm_to_mips_reg[_rm], (_shift - 1), 1); \ - mips_emit_rotr(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], _shift); \ - } \ - else \ - { \ - mips_emit_andi(reg_temp, arm_to_mips_reg[_rm], 1); \ - mips_emit_srl(arm_to_mips_reg[arm_reg], arm_to_mips_reg[_rm], 1); \ - mips_emit_ins(arm_to_mips_reg[arm_reg], reg_c_cache, 31, 1); \ - mips_emit_addu(reg_c_cache, reg_temp, reg_zero); \ - } \ - _rm = arm_reg \ - -#define generate_shift_reg_lsl_no_flags(_rm, _rs) \ - mips_emit_sltiu(reg_temp, arm_to_mips_reg[_rs], 32); \ - mips_emit_sllv(reg_a0, arm_to_mips_reg[_rm], arm_to_mips_reg[_rs]); \ - mips_emit_movz(reg_a0, reg_zero, reg_temp) \ - -#define generate_shift_reg_lsr_no_flags(_rm, _rs) \ - mips_emit_sltiu(reg_temp, arm_to_mips_reg[_rs], 32); \ - mips_emit_srlv(reg_a0, arm_to_mips_reg[_rm], arm_to_mips_reg[_rs]); \ - mips_emit_movz(reg_a0, reg_zero, reg_temp) \ - -#define generate_shift_reg_asr_no_flags(_rm, _rs) \ - mips_emit_sltiu(reg_temp, arm_to_mips_reg[_rs], 32); \ - mips_emit_b(bne, reg_temp, reg_zero, 2); \ - mips_emit_srav(reg_a0, arm_to_mips_reg[_rm], arm_to_mips_reg[_rs]); \ - mips_emit_sra(reg_a0, reg_a0, 31) \ - -#define generate_shift_reg_ror_no_flags(_rm, _rs) \ - mips_emit_rotrv(reg_a0, arm_to_mips_reg[_rm], arm_to_mips_reg[_rs]) \ - -#define generate_shift_reg_lsl_flags(_rm, _rs) \ - generate_load_reg_pc(reg_a0, _rm, 12); \ - generate_load_reg_pc(reg_a1, _rs, 8); \ - generate_function_call_swap_delay(execute_lsl_flags_reg) \ - -#define generate_shift_reg_lsr_flags(_rm, _rs) \ - generate_load_reg_pc(reg_a0, _rm, 12); \ - generate_load_reg_pc(reg_a1, _rs, 8) \ - generate_function_call_swap_delay(execute_lsr_flags_reg) \ - -#define generate_shift_reg_asr_flags(_rm, _rs) \ - generate_load_reg_pc(reg_a0, _rm, 12); \ - generate_load_reg_pc(reg_a1, _rs, 8) \ - generate_function_call_swap_delay(execute_asr_flags_reg) \ - -#define generate_shift_reg_ror_flags(_rm, _rs) \ - mips_emit_b(beq, arm_to_mips_reg[_rs], reg_zero, 3); \ - mips_emit_addiu(reg_temp, arm_to_mips_reg[_rs], -1); \ - mips_emit_srlv(reg_temp, arm_to_mips_reg[_rm], reg_temp); \ - mips_emit_andi(reg_c_cache, reg_temp, 1); \ - mips_emit_rotrv(reg_a0, arm_to_mips_reg[_rm], arm_to_mips_reg[_rs]) \ - -#define generate_shift_imm(arm_reg, name, flags_op) \ - u32 shift = (opcode >> 7) & 0x1F; \ - generate_shift_imm_##name##_##flags_op(arm_reg, rm, shift) \ - -#define generate_shift_reg(arm_reg, name, flags_op) \ - u32 rs = ((opcode >> 8) & 0x0F); \ - generate_shift_reg_##name##_##flags_op(rm, rs); \ - rm = arm_reg \ - -// Made functions due to the macro expansion getting too large. -// Returns a new rm if it redirects it (which will happen on most of these -// cases) - -#define generate_load_rm_sh_builder(flags_op) \ -u32 generate_load_rm_sh_##flags_op(u32 rm) \ -{ \ - switch((opcode >> 4) & 0x07) \ - { \ - /* LSL imm */ \ - case 0x0: \ - { \ - generate_shift_imm(arm_reg_a0, lsl, flags_op); \ - break; \ - } \ - \ - /* LSL reg */ \ - case 0x1: \ - { \ - generate_shift_reg(arm_reg_a0, lsl, flags_op); \ - break; \ - } \ - \ - /* LSR imm */ \ - case 0x2: \ - { \ - generate_shift_imm(arm_reg_a0, lsr, flags_op); \ - break; \ - } \ - \ - /* LSR reg */ \ - case 0x3: \ - { \ - generate_shift_reg(arm_reg_a0, lsr, flags_op); \ - break; \ - } \ - \ - /* ASR imm */ \ - case 0x4: \ - { \ - generate_shift_imm(arm_reg_a0, asr, flags_op); \ - break; \ - } \ - \ - /* ASR reg */ \ - case 0x5: \ - { \ - generate_shift_reg(arm_reg_a0, asr, flags_op); \ - break; \ - } \ - \ - /* ROR imm */ \ - case 0x6: \ - { \ - generate_shift_imm(arm_reg_a0, ror, flags_op); \ - break; \ - } \ - \ - /* ROR reg */ \ - case 0x7: \ - { \ - generate_shift_reg(arm_reg_a0, ror, flags_op); \ - break; \ - } \ - } \ - \ - return rm; \ -} \ - -#define read_memory_constant_u8(address) \ - read_memory8(address) \ - -#define read_memory_constant_u16(address) \ - read_memory16(address) \ - -#define read_memory_constant_u32(address) \ - read_memory32(address) \ - -#define read_memory_constant_s8(address) \ - (s8)read_memory8(address) \ - -#define read_memory_constant_s16(address) \ - (s16)read_memory16_signed(address) \ - -#define generate_load_memory_u8(ireg, offset) \ - mips_emit_lbu(ireg, ireg, offset) \ - -#define generate_load_memory_u16(ireg, offset) \ - mips_emit_lhu(ireg, ireg, offset) \ - -#define generate_load_memory_u32(ireg, offset) \ - mips_emit_lw(ireg, ireg, offset) \ - -#define generate_load_memory_s8(ireg, offset) \ - mips_emit_lb(ireg, ireg, offset) \ - -#define generate_load_memory_s16(ireg, offset) \ - mips_emit_lh(ireg, ireg, offset) \ - -#define generate_load_memory(type, ireg, address) \ -{ \ - u32 _address = (u32)(address); \ - u32 _address_hi = (_address + 0x8000) >> 16; \ - generate_load_imm(ireg, address); \ - mips_emit_lui(ireg, _address_hi >> 16) \ - generate_load_memory_##type(ireg, _address - (_address_hi << 16)); \ -} \ - -#define generate_known_address_load_builder(type) \ - u32 generate_known_address_load_##type(u32 rd, u32 address) \ - { \ - switch(address >> 24) \ - { \ - /* Read from the BIOS ROM, can be converted to an immediate load. \ - Only really possible to do this from the BIOS but should be okay \ - to allow it everywhere */ \ - case 0x00: \ - u32 imm = read_memory_constant_##type(address); \ - generate_load_imm(arm_to_mips_reg[rd], imm); \ - return 1; \ - \ - /* Read from RAM, can be converted to a load */ \ - case 0x02: \ - generate_load_memory(type, arm_to_mips_reg[rd], (u8 *)ewram + \ - (address & 0x7FFF) + ((address & 0x38000) * 2) + 0x8000); \ - return 1; \ - \ - case 0x03: \ - generate_load_memory(type, arm_to_mips_reg[rd], (u8 *)iwram + \ - (address & 0x7FFF) + 0x8000); \ - return 1; \ - \ - /* Read from gamepak ROM, this has to be an immediate load because \ - it might not actually be in memory anymore when we get to it. */ \ - case 0x08: \ - u32 imm = read_memory_constant_##type(address); \ - generate_load_imm(arm_to_mips_reg[rd], imm); \ - return 1; \ - \ - default: \ - return 0; \ - } \ - } \ - -#define generate_block_extra_vars() \ - u32 stored_pc = pc; \ - u8 *update_trampoline \ - -#define generate_block_extra_vars_arm() \ - generate_block_extra_vars(); \ - generate_load_rm_sh_builder(flags); \ - generate_load_rm_sh_builder(no_flags); \ - \ -/* generate_known_address_load_builder(u8); \ - generate_known_address_load_builder(u16); \ - generate_known_address_load_builder(u32); \ - generate_known_address_load_builder(s8); \ - generate_known_address_load_builder(s16); */ \ - \ - u32 generate_load_offset_sh(u32 rm) \ - { \ - switch((opcode >> 5) & 0x03) \ - { \ - /* LSL imm */ \ - case 0x0: \ - { \ - generate_shift_imm(arm_reg_a1, lsl, no_flags); \ - break; \ - } \ - \ - /* LSR imm */ \ - case 0x1: \ - { \ - generate_shift_imm(arm_reg_a1, lsr, no_flags); \ - break; \ - } \ - \ - /* ASR imm */ \ - case 0x2: \ - { \ - generate_shift_imm(arm_reg_a1, asr, no_flags); \ - break; \ - } \ - \ - /* ROR imm */ \ - case 0x3: \ - { \ - generate_shift_imm(arm_reg_a1, ror, no_flags); \ - break; \ - } \ - } \ - \ - return rm; \ - } \ - \ - void generate_indirect_branch_arm() \ - { \ - if(condition == 0x0E) \ - { \ - generate_indirect_branch_cycle_update(arm); \ - } \ - else \ - { \ - generate_indirect_branch_no_cycle_update(arm); \ - } \ - } \ - \ - void generate_indirect_branch_dual() \ - { \ - if(condition == 0x0E) \ - { \ - generate_indirect_branch_cycle_update(dual); \ - } \ - else \ - { \ - generate_indirect_branch_no_cycle_update(dual); \ - } \ - } \ - -#define generate_block_extra_vars_thumb() \ - generate_block_extra_vars() \ - -// It should be okay to still generate result flags, spsr will overwrite them. -// This is pretty infrequent (returning from interrupt handlers, et al) so -// probably not worth optimizing for. - -u32 execute_spsr_restore_body(u32 address) -{ - set_cpu_mode(cpu_modes[reg[REG_CPSR] & 0x1F]); - if((io_registers[REG_IE] & io_registers[REG_IF]) && - io_registers[REG_IME] && ((reg[REG_CPSR] & 0x80) == 0)) - { - reg_mode[MODE_IRQ][6] = address + 4; - spsr[MODE_IRQ] = reg[REG_CPSR]; - reg[REG_CPSR] = 0xD2; - address = 0x00000018; - set_cpu_mode(MODE_IRQ); - } - - if(reg[REG_CPSR] & 0x20) - address |= 0x01; - - return address; -} - -typedef enum -{ - CONDITION_TRUE, - CONDITION_FALSE, - CONDITION_EQUAL, - CONDITION_NOT_EQUAL -} condition_check_type; - - -#define generate_condition_eq() \ - mips_emit_b_filler(beq, reg_z_cache, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_ne() \ - mips_emit_b_filler(bne, reg_z_cache, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_cs() \ - mips_emit_b_filler(beq, reg_c_cache, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_cc() \ - mips_emit_b_filler(bne, reg_c_cache, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_mi() \ - mips_emit_b_filler(beq, reg_n_cache, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_pl() \ - mips_emit_b_filler(bne, reg_n_cache, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_vs() \ - mips_emit_b_filler(beq, reg_v_cache, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_vc() \ - mips_emit_b_filler(bne, reg_v_cache, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_hi() \ - mips_emit_xori(reg_temp, reg_c_cache, 1); \ - mips_emit_or(reg_temp, reg_temp, reg_z_cache); \ - mips_emit_b_filler(bne, reg_temp, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_ls() \ - mips_emit_xori(reg_temp, reg_c_cache, 1); \ - mips_emit_or(reg_temp, reg_temp, reg_z_cache); \ - mips_emit_b_filler(beq, reg_temp, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_ge() \ - mips_emit_b_filler(bne, reg_n_cache, reg_v_cache, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_lt() \ - mips_emit_b_filler(beq, reg_n_cache, reg_v_cache, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_gt() \ - mips_emit_xor(reg_temp, reg_n_cache, reg_v_cache); \ - mips_emit_or(reg_temp, reg_temp, reg_z_cache); \ - mips_emit_b_filler(bne, reg_temp, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition_le() \ - mips_emit_xor(reg_temp, reg_n_cache, reg_v_cache); \ - mips_emit_or(reg_temp, reg_temp, reg_z_cache); \ - mips_emit_b_filler(beq, reg_temp, reg_zero, backpatch_address); \ - generate_cycle_update_force() \ - -#define generate_condition() \ - switch(condition) \ - { \ - case 0x0: \ - generate_condition_eq(); \ - break; \ - \ - case 0x1: \ - generate_condition_ne(); \ - break; \ - \ - case 0x2: \ - generate_condition_cs(); \ - break; \ - \ - case 0x3: \ - generate_condition_cc(); \ - break; \ - \ - case 0x4: \ - generate_condition_mi(); \ - break; \ - \ - case 0x5: \ - generate_condition_pl(); \ - break; \ - \ - case 0x6: \ - generate_condition_vs(); \ - break; \ - \ - case 0x7: \ - generate_condition_vc(); \ - break; \ - \ - case 0x8: \ - generate_condition_hi(); \ - break; \ - \ - case 0x9: \ - generate_condition_ls(); \ - break; \ - \ - case 0xA: \ - generate_condition_ge(); \ - break; \ - \ - case 0xB: \ - generate_condition_lt(); \ - break; \ - \ - case 0xC: \ - generate_condition_gt(); \ - break; \ - \ - case 0xD: \ - generate_condition_le(); \ - break; \ - \ - case 0xE: \ - break; \ - \ - case 0xF: \ - break; \ - } \ - -#define generate_branch() \ -{ \ - if(condition == 0x0E) \ - { \ - generate_branch_cycle_update( \ - block_exits[block_exit_position].branch_source, \ - block_exits[block_exit_position].branch_target); \ - } \ - else \ - { \ - generate_branch_no_cycle_update( \ - block_exits[block_exit_position].branch_source, \ - block_exits[block_exit_position].branch_target); \ - } \ - block_exit_position++; \ -} \ - -#define generate_op_and_reg(_rd, _rn, _rm) \ - mips_emit_and(_rd, _rn, _rm) \ - -#define generate_op_orr_reg(_rd, _rn, _rm) \ - mips_emit_or(_rd, _rn, _rm) \ - -#define generate_op_eor_reg(_rd, _rn, _rm) \ - mips_emit_xor(_rd, _rn, _rm) \ - -#define generate_op_bic_reg(_rd, _rn, _rm) \ - mips_emit_nor(reg_temp, _rm, reg_zero); \ - mips_emit_and(_rd, _rn, reg_temp) \ - -#define generate_op_sub_reg(_rd, _rn, _rm) \ - mips_emit_subu(_rd, _rn, _rm) \ - -#define generate_op_rsb_reg(_rd, _rn, _rm) \ - mips_emit_subu(_rd, _rm, _rn) \ - -#define generate_op_sbc_reg(_rd, _rn, _rm) \ - mips_emit_subu(_rd, _rn, _rm); \ - mips_emit_xori(reg_temp, reg_c_cache, 1); \ - mips_emit_subu(_rd, _rd, reg_temp) \ - -#define generate_op_rsc_reg(_rd, _rn, _rm) \ - mips_emit_addu(reg_temp, _rm, reg_c_cache); \ - mips_emit_addiu(reg_temp, reg_temp, -1); \ - mips_emit_subu(_rd, reg_temp, _rn) \ - -#define generate_op_add_reg(_rd, _rn, _rm) \ - mips_emit_addu(_rd, _rn, _rm) \ - -#define generate_op_adc_reg(_rd, _rn, _rm) \ - mips_emit_addu(reg_temp, _rm, reg_c_cache); \ - mips_emit_addu(_rd, _rn, reg_temp) \ - -#define generate_op_mov_reg(_rd, _rn, _rm) \ - mips_emit_addu(_rd, _rm, reg_zero) \ - -#define generate_op_mvn_reg(_rd, _rn, _rm) \ - mips_emit_nor(_rd, _rm, reg_zero) \ - -#define generate_op_imm_wrapper(name, _rd, _rn) \ - if(imm != 0) \ - { \ - generate_load_imm(reg_a0, imm); \ - generate_op_##name##_reg(_rd, _rn, reg_a0); \ - } \ - else \ - { \ - generate_op_##name##_reg(_rd, _rn, reg_zero); \ - } \ - -#define generate_op_and_imm(_rd, _rn) \ - generate_alu_immu(andi, and, _rd, _rn, imm) \ - -#define generate_op_orr_imm(_rd, _rn) \ - generate_alu_immu(ori, or, _rd, _rn, imm) \ - -#define generate_op_eor_imm(_rd, _rn) \ - generate_alu_immu(xori, xor, _rd, _rn, imm) \ - -#define generate_op_bic_imm(_rd, _rn) \ - generate_alu_immu(andi, and, _rd, _rn, (~imm)) \ - -#define generate_op_sub_imm(_rd, _rn) \ - generate_alu_imm(addiu, addu, _rd, _rn, (-imm)) \ - -#define generate_op_rsb_imm(_rd, _rn) \ - if(imm != 0) \ - { \ - generate_load_imm(reg_temp, imm); \ - mips_emit_subu(_rd, reg_temp, _rn); \ - } \ - else \ - { \ - mips_emit_subu(_rd, reg_zero, _rn); \ - } \ - -#define generate_op_sbc_imm(_rd, _rn) \ - generate_op_imm_wrapper(sbc, _rd, _rn) \ - -#define generate_op_rsc_imm(_rd, _rn) \ - generate_op_imm_wrapper(rsc, _rd, _rn) \ - -#define generate_op_add_imm(_rd, _rn) \ - generate_alu_imm(addiu, addu, _rd, _rn, imm) \ - -#define generate_op_adc_imm(_rd, _rn) \ - generate_op_imm_wrapper(adc, _rd, _rn) \ - -#define generate_op_mov_imm(_rd, _rn) \ - generate_load_imm(_rd, imm) \ - -#define generate_op_mvn_imm(_rd, _rn) \ - generate_load_imm(_rd, (~imm)) \ - -#define generate_op_logic_flags(_rd) \ - if(check_generate_n_flag) \ - { \ - mips_emit_srl(reg_n_cache, _rd, 31); \ - } \ - if(check_generate_z_flag) \ - { \ - mips_emit_sltiu(reg_z_cache, _rd, 1); \ - } \ - -#define generate_op_sub_flags_prologue(_rn, _rm) \ - if(check_generate_c_flag) \ - { \ - mips_emit_sltu(reg_c_cache, _rn, _rm); \ - mips_emit_xori(reg_c_cache, reg_c_cache, 1); \ - } \ - if(check_generate_v_flag) \ - { \ - mips_emit_slt(reg_v_cache, _rn, _rm); \ - } \ - -#define generate_op_sub_flags_epilogue(_rd) \ - generate_op_logic_flags(_rd); \ - if(check_generate_v_flag) \ - { \ - if(!check_generate_n_flag) \ - { \ - mips_emit_srl(reg_n_cache, _rd, 31); \ - } \ - mips_emit_xor(reg_v_cache, reg_v_cache, reg_n_cache); \ - } \ - -#define generate_add_flags_prologue(_rn, _rm) \ - if(check_generate_c_flag | check_generate_v_flag) \ - { \ - mips_emit_addu(reg_c_cache, _rn, reg_zero); \ - } \ - if(check_generate_v_flag) \ - { \ - mips_emit_slt(reg_v_cache, _rm, reg_zero); \ - } \ - -#define generate_add_flags_epilogue(_rd) \ - if(check_generate_v_flag) \ - { \ - mips_emit_slt(reg_a0, _rd, reg_c_cache); \ - mips_emit_xor(reg_v_cache, reg_v_cache, reg_a0); \ - } \ - if(check_generate_c_flag) \ - { \ - mips_emit_sltu(reg_c_cache, _rd, reg_c_cache); \ - } \ - generate_op_logic_flags(_rd) \ - -#define generate_op_ands_reg(_rd, _rn, _rm) \ - mips_emit_and(_rd, _rn, _rm); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_orrs_reg(_rd, _rn, _rm) \ - mips_emit_or(_rd, _rn, _rm); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_eors_reg(_rd, _rn, _rm) \ - mips_emit_xor(_rd, _rn, _rm); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_bics_reg(_rd, _rn, _rm) \ - mips_emit_nor(reg_temp, _rm, reg_zero); \ - mips_emit_and(_rd, _rn, reg_temp); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_subs_reg(_rd, _rn, _rm) \ - generate_op_sub_flags_prologue(_rn, _rm); \ - mips_emit_subu(_rd, _rn, _rm); \ - generate_op_sub_flags_epilogue(_rd) \ - -#define generate_op_rsbs_reg(_rd, _rn, _rm) \ - generate_op_sub_flags_prologue(_rm, _rn); \ - mips_emit_subu(_rd, _rm, _rn); \ - generate_op_sub_flags_epilogue(_rd) \ - -#define generate_op_sbcs_reg(_rd, _rn, _rm) \ - mips_emit_subu(_rd, _rn, _rm); \ - mips_emit_xori(reg_temp, reg_c_cache, 1); \ - generate_op_sub_flags_prologue(_rd, reg_temp); \ - mips_emit_subu(_rd, _rd, reg_temp); \ - generate_op_sub_flags_epilogue(_rd) \ - -#define generate_op_rscs_reg(_rd, _rn, _rm) \ - mips_emit_addu(reg_temp, _rm, reg_c_cache); \ - mips_emit_addiu(reg_temp, reg_temp, -1); \ - generate_op_sub_flags_prologue(reg_temp, _rn); \ - mips_emit_subu(_rd, reg_temp, _rn); \ - generate_op_sub_flags_epilogue(_rd) \ - -#define generate_op_adds_reg(_rd, _rn, _rm) \ - generate_add_flags_prologue(_rn, _rm); \ - mips_emit_addu(_rd, _rn, _rm); \ - generate_add_flags_epilogue(_rd) \ - -#define generate_op_adcs_reg(_rd, _rn, _rm) \ - mips_emit_addu(reg_temp, _rm, reg_c_cache); \ - generate_add_flags_prologue(_rn, _rm); \ - mips_emit_addu(_rd, _rn, reg_temp); \ - generate_add_flags_epilogue(_rd) \ - -#define generate_op_movs_reg(_rd, _rn, _rm) \ - mips_emit_addu(_rd, _rm, reg_zero); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_mvns_reg(_rd, _rn, _rm) \ - mips_emit_nor(_rd, _rm, reg_zero); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_neg_reg(_rd, _rn, _rm) \ - generate_op_subs_reg(_rd, reg_zero, _rm) \ - -#define generate_op_muls_reg(_rd, _rn, _rm) \ - mips_emit_multu(_rn, _rm); \ - mips_emit_mflo(_rd); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_cmp_reg(_rd, _rn, _rm) \ - generate_op_subs_reg(reg_temp, _rn, _rm) \ - -#define generate_op_cmn_reg(_rd, _rn, _rm) \ - generate_op_adds_reg(reg_temp, _rn, _rm) \ - -#define generate_op_tst_reg(_rd, _rn, _rm) \ - generate_op_ands_reg(reg_temp, _rn, _rm) \ - -#define generate_op_teq_reg(_rd, _rn, _rm) \ - generate_op_eors_reg(reg_temp, _rn, _rm) \ - -#define generate_op_ands_imm(_rd, _rn) \ - generate_alu_immu(andi, and, _rd, _rn, imm); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_orrs_imm(_rd, _rn) \ - generate_alu_immu(ori, or, _rd, _rn, imm); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_eors_imm(_rd, _rn) \ - generate_alu_immu(xori, xor, _rd, _rn, imm); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_bics_imm(_rd, _rn) \ - generate_alu_immu(andi, and, _rd, _rn, (~imm)); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_subs_imm(_rd, _rn) \ - generate_op_imm_wrapper(subs, _rd, _rn) \ - -#define generate_op_rsbs_imm(_rd, _rn) \ - generate_op_imm_wrapper(rsbs, _rd, _rn) \ - -#define generate_op_sbcs_imm(_rd, _rn) \ - generate_op_imm_wrapper(sbcs, _rd, _rn) \ - -#define generate_op_rscs_imm(_rd, _rn) \ - generate_op_imm_wrapper(rscs, _rd, _rn) \ - -#define generate_op_adds_imm(_rd, _rn) \ - generate_op_imm_wrapper(adds, _rd, _rn) \ - -#define generate_op_adcs_imm(_rd, _rn) \ - generate_op_imm_wrapper(adcs, _rd, _rn) \ - -#define generate_op_movs_imm(_rd, _rn) \ - generate_load_imm(_rd, imm); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_mvns_imm(_rd, _rn) \ - generate_load_imm(_rd, (~imm)); \ - generate_op_logic_flags(_rd) \ - -#define generate_op_cmp_imm(_rd, _rn) \ - generate_op_imm_wrapper(cmp, _rd, _rn) \ - -#define generate_op_cmn_imm(_rd, _rn) \ - generate_op_imm_wrapper(cmn, _rd, _rn) \ - -#define generate_op_tst_imm(_rd, _rn) \ - generate_op_ands_imm(reg_temp, _rn) \ - -#define generate_op_teq_imm(_rd, _rn) \ - generate_op_eors_imm(reg_temp, _rn) \ - -#define arm_generate_op_load_yes() \ - generate_load_reg_pc(reg_a1, rn, 8) \ - -#define arm_generate_op_load_no() \ - -#define arm_op_check_yes() \ - check_load_reg_pc(arm_reg_a1, rn, 8) \ - -#define arm_op_check_no() \ - -#define arm_generate_op_reg_flags(name, load_op) \ - arm_decode_data_proc_reg(); \ - if(check_generate_c_flag) \ - { \ - rm = generate_load_rm_sh_flags(rm); \ - } \ - else \ - { \ - rm = generate_load_rm_sh_no_flags(rm); \ - } \ - \ - arm_op_check_##load_op(); \ - generate_op_##name##_reg(arm_to_mips_reg[rd], arm_to_mips_reg[rn], \ - arm_to_mips_reg[rm]) \ - -#define arm_generate_op_reg(name, load_op) \ - arm_decode_data_proc_reg(); \ - rm = generate_load_rm_sh_no_flags(rm); \ - arm_op_check_##load_op(); \ - generate_op_##name##_reg(arm_to_mips_reg[rd], arm_to_mips_reg[rn], \ - arm_to_mips_reg[rm]) \ - -#define arm_generate_op_imm(name, load_op) \ - arm_decode_data_proc_imm(); \ - arm_op_check_##load_op(); \ - generate_op_##name##_imm(arm_to_mips_reg[rd], arm_to_mips_reg[rn]) \ - -#define arm_data_proc(name, type, flags_op) \ -{ \ - arm_generate_op_##type(name, yes); \ - check_store_reg_pc_##flags_op(rd); \ -} \ - -#define arm_data_proc_test(name, type) \ -{ \ - arm_generate_op_##type(name, yes); \ -} \ - -#define arm_data_proc_unary(name, type, flags_op) \ -{ \ - arm_generate_op_##type(name, no); \ - check_store_reg_pc_##flags_op(rd); \ -} \ - -#define arm_multiply_flags_yes(_rd) \ - generate_op_logic_flags(_rd) \ - -#define arm_multiply_flags_no(_rd) \ - -#define arm_multiply_add_no() \ - mips_emit_mflo(arm_to_mips_reg[rd]) \ - -#define arm_multiply_add_yes() \ - mips_emit_mflo(reg_temp); \ - mips_emit_addu(arm_to_mips_reg[rd], reg_temp, arm_to_mips_reg[rn]) \ - -#define arm_multiply(add_op, flags) \ -{ \ - arm_decode_multiply(); \ - mips_emit_multu(arm_to_mips_reg[rm], arm_to_mips_reg[rs]); \ - arm_multiply_add_##add_op(); \ - arm_multiply_flags_##flags(arm_to_mips_reg[rd]); \ -} \ - -#define arm_multiply_long_flags_yes(_rdlo, _rdhi) \ - mips_emit_sltiu(reg_z_cache, _rdlo, 1); \ - mips_emit_sltiu(reg_a0, _rdhi, 1); \ - mips_emit_and(reg_z_cache, reg_z_cache, reg_a0); \ - mips_emit_srl(reg_n_cache, _rdhi, 31); \ - -#define arm_multiply_long_flags_no(_rdlo, _rdhi) \ - -#define arm_multiply_long_add_yes(name) \ - mips_emit_mtlo(arm_to_mips_reg[rdlo]); \ - mips_emit_mthi(arm_to_mips_reg[rdhi]); \ - generate_multiply_##name() \ - -#define arm_multiply_long_add_no(name) \ - generate_multiply_##name() \ - -#define arm_multiply_long(name, add_op, flags) \ -{ \ - arm_decode_multiply_long(); \ - arm_multiply_long_add_##add_op(name); \ - mips_emit_mflo(arm_to_mips_reg[rdlo]); \ - mips_emit_mfhi(arm_to_mips_reg[rdhi]); \ - arm_multiply_long_flags_##flags(arm_to_mips_reg[rdlo], \ - arm_to_mips_reg[rdhi]); \ -} \ - -#define arm_psr_read(op_type, psr_reg) \ - generate_function_call(execute_read_##psr_reg); \ - generate_store_reg(reg_rv, rd) \ - -u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address) -{ - reg[REG_CPSR] = _cpsr; - if(store_mask & 0xFF) - { - set_cpu_mode(cpu_modes[_cpsr & 0x1F]); - if((io_registers[REG_IE] & io_registers[REG_IF]) && - io_registers[REG_IME] && ((_cpsr & 0x80) == 0)) - { - reg_mode[MODE_IRQ][6] = address + 4; - spsr[MODE_IRQ] = _cpsr; - reg[REG_CPSR] = 0xD2; - set_cpu_mode(MODE_IRQ); - return 0x00000018; - } - } - - return 0; -} - -#define arm_psr_load_new_reg() \ - generate_load_reg(reg_a0, rm) \ - -#define arm_psr_load_new_imm() \ - generate_load_imm(reg_a0, imm) \ - -#define arm_psr_store(op_type, psr_reg) \ - arm_psr_load_new_##op_type(); \ - generate_load_imm(reg_a1, psr_masks[psr_field]); \ - generate_load_pc(reg_a2, (pc + 4)); \ - generate_function_call_swap_delay(execute_store_##psr_reg) \ - -#define arm_psr(op_type, transfer_type, psr_reg) \ -{ \ - arm_decode_psr_##op_type(); \ - arm_psr_##transfer_type(op_type, psr_reg); \ -} \ - -#define arm_access_memory_load(mem_type) \ - cycle_count += 2; \ - mips_emit_jal(mips_absolute_offset(execute_load_##mem_type)); \ - generate_load_pc(reg_a1, (pc + 8)); \ - generate_store_reg(reg_rv, rd); \ - check_store_reg_pc_no_flags(rd) \ - -#define arm_access_memory_store(mem_type) \ - cycle_count++; \ - generate_load_pc(reg_a2, (pc + 4)); \ - generate_load_reg_pc(reg_a1, rd, 12); \ - generate_function_call_swap_delay(execute_store_##mem_type) \ - -#define arm_access_memory_reg_pre_up() \ - mips_emit_addu(reg_a0, arm_to_mips_reg[rn], arm_to_mips_reg[rm]) \ - -#define arm_access_memory_reg_pre_down() \ - mips_emit_subu(reg_a0, arm_to_mips_reg[rn], arm_to_mips_reg[rm]) \ - -#define arm_access_memory_reg_pre(adjust_dir) \ - check_load_reg_pc(arm_reg_a0, rn, 8); \ - arm_access_memory_reg_pre_##adjust_dir() \ - -#define arm_access_memory_reg_pre_wb(adjust_dir) \ - arm_access_memory_reg_pre(adjust_dir); \ - generate_store_reg(reg_a0, rn) \ - -#define arm_access_memory_reg_post_up() \ - mips_emit_addu(arm_to_mips_reg[rn], arm_to_mips_reg[rn], \ - arm_to_mips_reg[rm]) \ - -#define arm_access_memory_reg_post_down() \ - mips_emit_subu(arm_to_mips_reg[rn], arm_to_mips_reg[rn], \ - arm_to_mips_reg[rm]) \ - -#define arm_access_memory_reg_post(adjust_dir) \ - generate_load_reg(reg_a0, rn); \ - arm_access_memory_reg_post_##adjust_dir() \ - -#define arm_access_memory_imm_pre_up() \ - mips_emit_addiu(reg_a0, arm_to_mips_reg[rn], offset) \ - -#define arm_access_memory_imm_pre_down() \ - mips_emit_addiu(reg_a0, arm_to_mips_reg[rn], -offset) \ - -#define arm_access_memory_imm_pre(adjust_dir) \ - check_load_reg_pc(arm_reg_a0, rn, 8); \ - arm_access_memory_imm_pre_##adjust_dir() \ - -#define arm_access_memory_imm_pre_wb(adjust_dir) \ - arm_access_memory_imm_pre(adjust_dir); \ - generate_store_reg(reg_a0, rn) \ - -#define arm_access_memory_imm_post_up() \ - mips_emit_addiu(arm_to_mips_reg[rn], arm_to_mips_reg[rn], offset) \ - -#define arm_access_memory_imm_post_down() \ - mips_emit_addiu(arm_to_mips_reg[rn], arm_to_mips_reg[rn], -offset) \ - -#define arm_access_memory_imm_post(adjust_dir) \ - generate_load_reg(reg_a0, rn); \ - arm_access_memory_imm_post_##adjust_dir() \ - -#define arm_data_trans_reg(adjust_op, adjust_dir) \ - arm_decode_data_trans_reg(); \ - rm = generate_load_offset_sh(rm); \ - arm_access_memory_reg_##adjust_op(adjust_dir) \ - -#define arm_data_trans_imm(adjust_op, adjust_dir) \ - arm_decode_data_trans_imm(); \ - arm_access_memory_imm_##adjust_op(adjust_dir) \ - -#define arm_data_trans_half_reg(adjust_op, adjust_dir) \ - arm_decode_half_trans_r(); \ - arm_access_memory_reg_##adjust_op(adjust_dir) \ - -#define arm_data_trans_half_imm(adjust_op, adjust_dir) \ - arm_decode_half_trans_of(); \ - arm_access_memory_imm_##adjust_op(adjust_dir) \ - -#define arm_access_memory(access_type, direction, adjust_op, mem_type, \ - offset_type) \ -{ \ - arm_data_trans_##offset_type(adjust_op, direction); \ - arm_access_memory_##access_type(mem_type); \ -} \ - -#define word_bit_count(word) \ - (bit_count[word >> 8] + bit_count[word & 0xFF]) \ - -#define sprint_no(access_type, pre_op, post_op, wb) \ - -#define sprint_yes(access_type, pre_op, post_op, wb) \ - printf("sbit on %s %s %s %s\n", #access_type, #pre_op, #post_op, #wb) \ - -#define arm_block_memory_load() \ - generate_function_call_swap_delay(execute_aligned_load32); \ - generate_store_reg(reg_rv, i) \ - -#define arm_block_memory_store() \ - generate_load_reg_pc(reg_a1, i, 8); \ - generate_function_call_swap_delay(execute_aligned_store32) \ - -#define arm_block_memory_final_load() \ - arm_block_memory_load() \ - -#define arm_block_memory_final_store() \ - generate_load_pc(reg_a2, (pc + 4)); \ - mips_emit_jal(mips_absolute_offset(execute_store_u32)); \ - generate_load_reg(reg_a1, i) \ - -#define arm_block_memory_adjust_pc_store() \ - -#define arm_block_memory_adjust_pc_load() \ - if(reg_list & 0x8000) \ - { \ - generate_mov(reg_a0, reg_rv); \ - generate_indirect_branch_arm(); \ - } \ - -#define arm_block_memory_sp_load() \ - mips_emit_lw(arm_to_mips_reg[i], reg_a1, offset); \ - -#define arm_block_memory_sp_store() \ -{ \ - u32 store_reg = i; \ - check_load_reg_pc(arm_reg_a0, store_reg, 8); \ - mips_emit_sw(arm_to_mips_reg[store_reg], reg_a1, offset); \ -} \ - -#define arm_block_memory_sp_adjust_pc_store() \ - -#define arm_block_memory_sp_adjust_pc_load() \ - if(reg_list & 0x8000) \ - { \ - generate_indirect_branch_arm(); \ - } \ - -#define arm_block_memory_offset_down_a() \ - mips_emit_addiu(reg_a2, base_reg, (-((word_bit_count(reg_list) * 4) - 4))) \ - -#define arm_block_memory_offset_down_b() \ - mips_emit_addiu(reg_a2, base_reg, (word_bit_count(reg_list) * -4)) \ - -#define arm_block_memory_offset_no() \ - mips_emit_addu(reg_a2, base_reg, reg_zero) \ - -#define arm_block_memory_offset_up() \ - mips_emit_addiu(reg_a2, base_reg, 4) \ - -#define arm_block_memory_writeback_down() \ - mips_emit_addiu(base_reg, base_reg, (-(word_bit_count(reg_list) * 4))) \ - -#define arm_block_memory_writeback_up() \ - mips_emit_addiu(base_reg, base_reg, (word_bit_count(reg_list) * 4)) \ - -#define arm_block_memory_writeback_no() - -// Only emit writeback if the register is not in the list - -#define arm_block_memory_writeback_load(writeback_type) \ - if(!((reg_list >> rn) & 0x01)) \ - { \ - arm_block_memory_writeback_##writeback_type(); \ - } \ - -#define arm_block_memory_writeback_store(writeback_type) \ - arm_block_memory_writeback_##writeback_type() \ - -#define arm_block_memory(access_type, offset_type, writeback_type, s_bit) \ -{ \ - arm_decode_block_trans(); \ - u32 i; \ - u32 offset = 0; \ - u32 base_reg = arm_to_mips_reg[rn]; \ - \ - arm_block_memory_offset_##offset_type(); \ - arm_block_memory_writeback_##access_type(writeback_type); \ - \ - if((rn == REG_SP) && iwram_stack_optimize) \ - { \ - mips_emit_andi(reg_a1, reg_a2, 0x7FFC); \ - generate_load_imm(reg_a0, ((u32)(iwram + 0x8000))); \ - mips_emit_addu(reg_a1, reg_a1, reg_a0); \ - \ - for(i = 0; i < 16; i++) \ - { \ - if((reg_list >> i) & 0x01) \ - { \ - cycle_count++; \ - arm_block_memory_sp_##access_type(); \ - offset += 4; \ - } \ - } \ - \ - arm_block_memory_sp_adjust_pc_##access_type(); \ - } \ - else \ - { \ - mips_emit_ins(reg_a2, reg_zero, 0, 2); \ - \ - for(i = 0; i < 16; i++) \ - { \ - if((reg_list >> i) & 0x01) \ - { \ - cycle_count++; \ - mips_emit_addiu(reg_a0, reg_a2, offset); \ - if(reg_list & ~((2 << i) - 1)) \ - { \ - arm_block_memory_##access_type(); \ - offset += 4; \ - } \ - else \ - { \ - arm_block_memory_final_##access_type(); \ - break; \ - } \ - } \ - } \ - \ - arm_block_memory_adjust_pc_##access_type(); \ - } \ -} \ - -#define arm_block_writeback_no() - -#define arm_block_writeback_yes() \ - mips_emit_addu(arm_to_mips_reg[rn], reg_a2, reg_zero) \ - -#define arm_block_address_preadjust_up_full(wb) \ - mips_emit_addiu(reg_a2, arm_to_mips_reg[rn], \ - ((word_bit_count(reg_list)) * 4)); \ - arm_block_writeback_##wb() \ - -#define arm_block_address_preadjust_up(wb) \ - mips_emit_addiu(reg_a2, arm_to_mips_reg[rn], 4); \ - arm_block_writeback_##wb() \ - -#define arm_block_address_preadjust_down_full(wb) \ - mips_emit_addiu(reg_a2, arm_to_mips_reg[rn], \ - -((word_bit_count(reg_list)) * 4)); \ - arm_block_writeback_##wb() \ - -#define arm_block_address_preadjust_down(wb) \ - mips_emit_addiu(reg_a2, arm_to_mips_reg[rn], \ - -(((word_bit_count(reg_list)) * 4) - 4)); \ - arm_block_writeback_##wb() - -#define arm_block_address_preadjust_no(wb) \ - mips_emit_addu(reg_a2, arm_to_mips_reg[rn], reg_zero) \ - -#define arm_block_address_postadjust_no() \ - -#define arm_block_address_postadjust_up() \ - mips_emit_addiu(arm_to_mips_reg[rn], reg_a2, \ - ((word_bit_count(reg_list)) * 4)) \ - -#define arm_block_address_postadjust_down() \ - mips_emit_addiu(arm_to_mips_reg[rn], reg_a2, \ - -((word_bit_count(reg_list)) * 4)) \ - -#define sprint_no(access_type, pre_op, post_op, wb) \ - -#define sprint_yes(access_type, pre_op, post_op, wb) \ - printf("sbit on %s %s %s %s\n", #access_type, #pre_op, #post_op, #wb) \ - -#define arm_block_memory_load() \ - generate_function_call_swap_delay(execute_aligned_load32); \ - generate_store_reg(reg_rv, i) \ - -#define arm_block_memory_store() \ - generate_load_reg_pc(reg_a1, i, 8); \ - generate_function_call_swap_delay(execute_aligned_store32) \ - -#define arm_block_memory_final_load() \ - arm_block_memory_load() \ - -#define arm_block_memory_final_store() \ - generate_load_pc(reg_a2, (pc + 4)); \ - mips_emit_jal(mips_absolute_offset(execute_store_u32)); \ - generate_load_reg(reg_a1, i) \ - -#define arm_block_memory_adjust_pc_store() \ - -#define arm_block_memory_adjust_pc_load() \ - if(reg_list & 0x8000) \ - { \ - generate_mov(reg_a0, reg_rv); \ - generate_indirect_branch_arm(); \ - } \ - -#define arm_block_memory_sp_load() \ - mips_emit_lw(arm_to_mips_reg[i], reg_a1, offset); \ - -#define arm_block_memory_sp_store() \ -{ \ - u32 store_reg = i; \ - check_load_reg_pc(arm_reg_a0, store_reg, 8); \ - mips_emit_sw(arm_to_mips_reg[store_reg], reg_a1, offset); \ -} \ - -#define arm_block_memory_sp_adjust_pc_store() \ - -#define arm_block_memory_sp_adjust_pc_load() \ - if(reg_list & 0x8000) \ - { \ - generate_indirect_branch_arm(); \ - } \ - -#define old_arm_block_memory(access_type, pre_op, post_op, wb, s_bit) \ -{ \ - arm_decode_block_trans(); \ - u32 i; \ - u32 offset = 0; \ - u32 base_reg = arm_to_mips_reg[rn]; \ - \ - arm_block_address_preadjust_##pre_op(wb); \ - arm_block_address_postadjust_##post_op(); \ - \ - sprint_##s_bit(access_type, pre_op, post_op, wb); \ - \ - if((rn == REG_SP) && iwram_stack_optimize) \ - { \ - mips_emit_andi(reg_a1, reg_a2, 0x7FFC); \ - generate_load_imm(reg_a0, ((u32)(iwram + 0x8000))); \ - mips_emit_addu(reg_a1, reg_a1, reg_a0); \ - \ - for(i = 0; i < 16; i++) \ - { \ - if((reg_list >> i) & 0x01) \ - { \ - cycle_count++; \ - arm_block_memory_sp_##access_type(); \ - offset += 4; \ - } \ - } \ - \ - arm_block_memory_sp_adjust_pc_##access_type(); \ - } \ - else \ - { \ - mips_emit_ins(reg_a2, reg_zero, 0, 2); \ - \ - for(i = 0; i < 16; i++) \ - { \ - if((reg_list >> i) & 0x01) \ - { \ - cycle_count++; \ - mips_emit_addiu(reg_a0, reg_a2, offset); \ - if(reg_list & ~((2 << i) - 1)) \ - { \ - arm_block_memory_##access_type(); \ - offset += 4; \ - } \ - else \ - { \ - arm_block_memory_final_##access_type(); \ - break; \ - } \ - } \ - } \ - \ - arm_block_memory_adjust_pc_##access_type(); \ - } \ -} - - - -// This isn't really a correct implementation, may have to fix later. - -#define arm_swap(type) \ -{ \ - arm_decode_swap(); \ - cycle_count += 3; \ - mips_emit_jal(mips_absolute_offset(execute_load_##type)); \ - generate_load_reg(reg_a0, rn); \ - generate_mov(reg_a2, reg_rv); \ - generate_load_reg(reg_a0, rn); \ - mips_emit_jal(mips_absolute_offset(execute_store_##type)); \ - generate_load_reg(reg_a1, rm); \ - generate_store_reg(reg_a2, rd); \ -} \ - -#define thumb_generate_op_load_yes(_rs) \ - generate_load_reg(reg_a1, _rs) \ - -#define thumb_generate_op_load_no(_rs) \ - -#define thumb_generate_op_reg(name, _rd, _rs, _rn) \ - generate_op_##name##_reg(arm_to_mips_reg[_rd], \ - arm_to_mips_reg[_rs], arm_to_mips_reg[_rn]) \ - -#define thumb_generate_op_imm(name, _rd, _rs, _rn) \ - generate_op_##name##_imm(arm_to_mips_reg[_rd], arm_to_mips_reg[_rs]) \ - -// Types: add_sub, add_sub_imm, alu_op, imm -// Affects N/Z/C/V flags - -#define thumb_data_proc(type, name, rn_type, _rd, _rs, _rn) \ -{ \ - thumb_decode_##type(); \ - thumb_generate_op_##rn_type(name, _rd, _rs, _rn); \ -} \ - -#define thumb_data_proc_test(type, name, rn_type, _rs, _rn) \ -{ \ - thumb_decode_##type(); \ - thumb_generate_op_##rn_type(name, 0, _rs, _rn); \ -} \ - -#define thumb_data_proc_unary(type, name, rn_type, _rd, _rn) \ -{ \ - thumb_decode_##type(); \ - thumb_generate_op_##rn_type(name, _rd, 0, _rn); \ -} \ - -#define check_store_reg_pc_thumb(_rd) \ - if(_rd == REG_PC) \ - { \ - generate_indirect_branch_cycle_update(thumb); \ - } \ - -#define thumb_data_proc_hi(name) \ -{ \ - thumb_decode_hireg_op(); \ - u32 dest_rd = rd; \ - check_load_reg_pc(arm_reg_a0, rs, 4); \ - check_load_reg_pc(arm_reg_a1, rd, 4); \ - generate_op_##name##_reg(arm_to_mips_reg[dest_rd], arm_to_mips_reg[rd], \ - arm_to_mips_reg[rs]); \ - check_store_reg_pc_thumb(dest_rd); \ -} \ - -/* - -#define thumb_data_proc_hi(name) \ -{ \ - thumb_decode_hireg_op(); \ - check_load_reg_pc(arm_reg_a0, rs, 4); \ - check_load_reg_pc(arm_reg_a1, rd, 4); \ - generate_op_##name##_reg(arm_to_mips_reg[rd], arm_to_mips_reg[rd], \ - arm_to_mips_reg[rs]); \ - check_store_reg_pc_thumb(rd); \ -} \ - -*/ - -#define thumb_data_proc_test_hi(name) \ -{ \ - thumb_decode_hireg_op(); \ - check_load_reg_pc(arm_reg_a0, rs, 4); \ - check_load_reg_pc(arm_reg_a1, rd, 4); \ - generate_op_##name##_reg(reg_temp, arm_to_mips_reg[rd], \ - arm_to_mips_reg[rs]); \ -} \ - -#define thumb_data_proc_mov_hi() \ -{ \ - thumb_decode_hireg_op(); \ - check_load_reg_pc(arm_reg_a0, rs, 4); \ - mips_emit_addu(arm_to_mips_reg[rd], arm_to_mips_reg[rs], reg_zero); \ - check_store_reg_pc_thumb(rd); \ -} \ - -#define thumb_load_pc(_rd) \ -{ \ - thumb_decode_imm(); \ - generate_load_pc(arm_to_mips_reg[_rd], (((pc & ~2) + 4) + (imm * 4))); \ -} \ - -#define thumb_load_sp(_rd) \ -{ \ - thumb_decode_imm(); \ - mips_emit_addiu(arm_to_mips_reg[_rd], reg_r13, (imm * 4)); \ -} \ - -#define thumb_adjust_sp(value) \ -{ \ - thumb_decode_add_sp(); \ - mips_emit_addiu(reg_r13, reg_r13, (value)); \ -} \ - -// Decode types: shift, alu_op -// Operation types: lsl, lsr, asr, ror -// Affects N/Z/C flags - -#define thumb_generate_shift_imm(name) \ - if(check_generate_c_flag) \ - { \ - generate_shift_imm_##name##_flags(rd, rs, imm); \ - } \ - else \ - { \ - generate_shift_imm_##name##_no_flags(rd, rs, imm); \ - } \ - if(rs != rd) \ - { \ - mips_emit_addu(arm_to_mips_reg[rd], arm_to_mips_reg[rs], reg_zero); \ - } \ - -#define thumb_generate_shift_reg(name) \ -{ \ - u32 original_rd = rd; \ - if(check_generate_c_flag) \ - { \ - generate_shift_reg_##name##_flags(rd, rs); \ - } \ - else \ - { \ - generate_shift_reg_##name##_no_flags(rd, rs); \ - } \ - mips_emit_addu(arm_to_mips_reg[original_rd], reg_a0, reg_zero); \ -} \ - -#define thumb_shift(decode_type, op_type, value_type) \ -{ \ - thumb_decode_##decode_type(); \ - thumb_generate_shift_##value_type(op_type); \ - generate_op_logic_flags(arm_to_mips_reg[rd]); \ -} \ - -// Operation types: imm, mem_reg, mem_imm - -#define thumb_access_memory_load(mem_type, reg_rd) \ - cycle_count += 2; \ - mips_emit_jal(mips_absolute_offset(execute_load_##mem_type)); \ - generate_load_pc(reg_a1, (pc + 4)); \ - generate_store_reg(reg_rv, reg_rd) \ - -#define thumb_access_memory_store(mem_type, reg_rd) \ - cycle_count++; \ - generate_load_pc(reg_a2, (pc + 2)); \ - mips_emit_jal(mips_absolute_offset(execute_store_##mem_type)); \ - generate_load_reg(reg_a1, reg_rd) \ - -#define thumb_access_memory_generate_address_pc_relative(offset, reg_rb, \ - reg_ro) \ - generate_load_pc(reg_a0, (offset)) \ - -#define thumb_access_memory_generate_address_reg_imm(offset, reg_rb, reg_ro) \ - mips_emit_addiu(reg_a0, arm_to_mips_reg[reg_rb], (offset)) \ - -#define thumb_access_memory_generate_address_reg_reg(offset, reg_rb, reg_ro) \ - mips_emit_addu(reg_a0, arm_to_mips_reg[reg_rb], arm_to_mips_reg[reg_ro]) \ - -#define thumb_access_memory(access_type, op_type, reg_rd, reg_rb, reg_ro, \ - address_type, offset, mem_type) \ -{ \ - thumb_decode_##op_type(); \ - thumb_access_memory_generate_address_##address_type(offset, reg_rb, \ - reg_ro); \ - thumb_access_memory_##access_type(mem_type, reg_rd); \ -} \ - - -#define thumb_block_address_preadjust_no(base_reg) \ - mips_emit_addu(reg_a2, arm_to_mips_reg[base_reg], reg_zero) \ - -#define thumb_block_address_preadjust_up(base_reg) \ - mips_emit_addiu(reg_a2, arm_to_mips_reg[base_reg], \ - (bit_count[reg_list] * 4)); \ - mips_emit_addu(arm_to_mips_reg[base_reg], reg_a2, reg_zero) \ - -#define thumb_block_address_preadjust_down(base_reg) \ - mips_emit_addiu(reg_a2, arm_to_mips_reg[base_reg], \ - -(bit_count[reg_list] * 4)); \ - mips_emit_addu(arm_to_mips_reg[base_reg], reg_a2, reg_zero) \ - -#define thumb_block_address_preadjust_push_lr(base_reg) \ - mips_emit_addiu(reg_a2, arm_to_mips_reg[base_reg], \ - -((bit_count[reg_list] + 1) * 4)); \ - mips_emit_addu(arm_to_mips_reg[base_reg], reg_a2, reg_zero) \ - -#define thumb_block_address_postadjust_no(base_reg) \ - -#define thumb_block_address_postadjust_up(base_reg) \ - mips_emit_addiu(arm_to_mips_reg[base_reg], reg_a2, \ - (bit_count[reg_list] * 4)) \ - -#define thumb_block_address_postadjust_down(base_reg) \ - mips_emit_addiu(arm_to_mips_reg[base_reg], reg_a2, \ - -(bit_count[reg_list] * 4)) \ - -#define thumb_block_address_postadjust_pop_pc(base_reg) \ - mips_emit_addiu(arm_to_mips_reg[base_reg], reg_a2, \ - ((bit_count[reg_list] * 4) + 4)) \ - -#define thumb_block_address_postadjust_push_lr(base_reg) \ - -#define thumb_block_memory_load() \ - generate_function_call_swap_delay(execute_aligned_load32); \ - generate_store_reg(reg_rv, i) \ - -#define thumb_block_memory_store() \ - mips_emit_jal(mips_absolute_offset(execute_aligned_store32)); \ - generate_load_reg(reg_a1, i) \ - -#define thumb_block_memory_final_load() \ - thumb_block_memory_load() \ - -#define thumb_block_memory_final_store() \ - generate_load_pc(reg_a2, (pc + 2)); \ - mips_emit_jal(mips_absolute_offset(execute_store_u32)); \ - generate_load_reg(reg_a1, i) \ - -#define thumb_block_memory_final_no(access_type) \ - thumb_block_memory_final_##access_type() \ - -#define thumb_block_memory_final_up(access_type) \ - thumb_block_memory_final_##access_type() \ - -#define thumb_block_memory_final_down(access_type) \ - thumb_block_memory_final_##access_type() \ - -#define thumb_block_memory_final_push_lr(access_type) \ - thumb_block_memory_##access_type() \ - -#define thumb_block_memory_final_pop_pc(access_type) \ - thumb_block_memory_##access_type() \ - -#define thumb_block_memory_extra_no() \ - -#define thumb_block_memory_extra_up() \ - -#define thumb_block_memory_extra_down() \ - -#define thumb_block_memory_extra_push_lr() \ - mips_emit_addiu(reg_a0, reg_a2, (bit_count[reg_list] * 4)); \ - mips_emit_jal(mips_absolute_offset(execute_aligned_store32)); \ - generate_load_reg(reg_a1, REG_LR) \ - -#define thumb_block_memory_extra_pop_pc() \ - mips_emit_jal(mips_absolute_offset(execute_aligned_load32)); \ - mips_emit_addiu(reg_a0, reg_a2, (bit_count[reg_list] * 4)); \ - generate_mov(reg_a0, reg_rv); \ - generate_indirect_branch_cycle_update(thumb) \ - -#define thumb_block_memory_sp_load() \ - mips_emit_lw(arm_to_mips_reg[i], reg_a1, offset) \ - -#define thumb_block_memory_sp_store() \ - mips_emit_sw(arm_to_mips_reg[i], reg_a1, offset) \ - -#define thumb_block_memory_sp_extra_no() \ - -#define thumb_block_memory_sp_extra_up() \ - -#define thumb_block_memory_sp_extra_down() \ - -#define thumb_block_memory_sp_extra_pop_pc() \ - mips_emit_lw(reg_a0, reg_a1, (bit_count[reg_list] * 4)); \ - generate_indirect_branch_cycle_update(thumb) \ - -#define thumb_block_memory_sp_extra_push_lr() \ - mips_emit_sw(reg_r14, reg_a1, (bit_count[reg_list] * 4)) \ - -#define thumb_block_memory(access_type, pre_op, post_op, base_reg) \ -{ \ - thumb_decode_rlist(); \ - u32 i; \ - u32 offset = 0; \ - \ - thumb_block_address_preadjust_##pre_op(base_reg); \ - thumb_block_address_postadjust_##post_op(base_reg); \ - \ - if((base_reg == REG_SP) && iwram_stack_optimize) \ - { \ - mips_emit_andi(reg_a1, reg_a2, 0x7FFC); \ - generate_load_imm(reg_a0, ((u32)(iwram + 0x8000))); \ - generate_add(reg_a1, reg_a0); \ - \ - for(i = 0; i < 8; i++) \ - { \ - if((reg_list >> i) & 0x01) \ - { \ - cycle_count++; \ - thumb_block_memory_sp_##access_type(); \ - offset += 4; \ - } \ - } \ - \ - thumb_block_memory_sp_extra_##post_op(); \ - } \ - else \ - { \ - mips_emit_ins(reg_a2, reg_zero, 0, 2); \ - \ - for(i = 0; i < 8; i++) \ - { \ - if((reg_list >> i) & 0x01) \ - { \ - cycle_count++; \ - mips_emit_addiu(reg_a0, reg_a2, offset); \ - if(reg_list & ~((2 << i) - 1)) \ - { \ - thumb_block_memory_##access_type(); \ - offset += 4; \ - } \ - else \ - { \ - thumb_block_memory_final_##post_op(access_type); \ - break; \ - } \ - } \ - } \ - \ - thumb_block_memory_extra_##post_op(); \ - } \ -} - - - -#define thumb_conditional_branch(condition) \ -{ \ - condition_check_type condition_check; \ - generate_condition_##condition(); \ - generate_branch_no_cycle_update( \ - block_exits[block_exit_position].branch_source, \ - block_exits[block_exit_position].branch_target); \ - generate_branch_patch_conditional(backpatch_address, translation_ptr); \ - block_exit_position++; \ -} \ - -#define arm_conditional_block_header() \ - generate_condition(); \ - -#define arm_b() \ - generate_branch() \ - -#define arm_bl() \ - generate_load_pc(reg_r14, (pc + 4)); \ - generate_branch() \ - -#define arm_bx() \ - arm_decode_branchx(); \ - generate_load_reg(reg_a0, rn); \ - /*generate_load_pc(reg_a2, pc);*/ \ - generate_indirect_branch_dual() \ - -#define arm_swi() \ - generate_swi_hle_handler((opcode >> 16) & 0xFF); \ - generate_load_pc(reg_a0, (pc + 4)); \ - generate_function_call_swap_delay(execute_swi); \ - generate_branch() \ - -#define thumb_b() \ - generate_branch_cycle_update( \ - block_exits[block_exit_position].branch_source, \ - block_exits[block_exit_position].branch_target); \ - block_exit_position++ \ - -#define thumb_bl() \ - generate_load_pc(reg_r14, ((pc + 2) | 0x01)); \ - generate_branch_cycle_update( \ - block_exits[block_exit_position].branch_source, \ - block_exits[block_exit_position].branch_target); \ - block_exit_position++ \ - -#define thumb_blh() \ -{ \ - thumb_decode_branch(); \ - generate_alu_imm(addiu, addu, reg_a0, reg_r14, (offset * 2)); \ - generate_load_pc(reg_r14, ((pc + 2) | 0x01)); \ - generate_indirect_branch_cycle_update(dual); \ - break; \ -} \ - -#define thumb_bx() \ -{ \ - thumb_decode_hireg_op(); \ - generate_load_reg_pc(reg_a0, rs, 4); \ - /*generate_load_pc(reg_a2, pc);*/ \ - generate_indirect_branch_cycle_update(dual); \ -} \ - -#define thumb_swi() \ - generate_swi_hle_handler(opcode & 0xFF); \ - generate_load_pc(reg_a0, (pc + 2)); \ - generate_function_call_swap_delay(execute_swi); \ - generate_branch_cycle_update( \ - block_exits[block_exit_position].branch_source, \ - block_exits[block_exit_position].branch_target); \ - block_exit_position++ \ - -u8 swi_hle_handle[256] = -{ - 0x0, // SWI 0: SoftReset - 0x0, // SWI 1: RegisterRAMReset - 0x0, // SWI 2: Halt - 0x0, // SWI 3: Stop/Sleep - 0x0, // SWI 4: IntrWait - 0x0, // SWI 5: VBlankIntrWait - 0x1, // SWI 6: Div - 0x0, // SWI 7: DivArm - 0x0, // SWI 8: Sqrt - 0x0, // SWI 9: ArcTan - 0x0, // SWI A: ArcTan2 - 0x0, // SWI B: CpuSet - 0x0, // SWI C: CpuFastSet - 0x0, // SWI D: GetBIOSCheckSum - 0x0, // SWI E: BgAffineSet - 0x0, // SWI F: ObjAffineSet - 0x0, // SWI 10: BitUnpack - 0x0, // SWI 11: LZ77UnCompWram - 0x0, // SWI 12: LZ77UnCompVram - 0x0, // SWI 13: HuffUnComp - 0x0, // SWI 14: RLUnCompWram - 0x0, // SWI 15: RLUnCompVram - 0x0, // SWI 16: Diff8bitUnFilterWram - 0x0, // SWI 17: Diff8bitUnFilterVram - 0x0, // SWI 18: Diff16bitUnFilter - 0x0, // SWI 19: SoundBias - 0x0, // SWI 1A: SoundDriverInit - 0x0, // SWI 1B: SoundDriverMode - 0x0, // SWI 1C: SoundDriverMain - 0x0, // SWI 1D: SoundDriverVSync - 0x0, // SWI 1E: SoundChannelClear - 0x0, // SWI 1F: MidiKey2Freq - 0x0, // SWI 20: SoundWhatever0 - 0x0, // SWI 21: SoundWhatever1 - 0x0, // SWI 22: SoundWhatever2 - 0x0, // SWI 23: SoundWhatever3 - 0x0, // SWI 24: SoundWhatever4 - 0x0, // SWI 25: MultiBoot - 0x0, // SWI 26: HardReset - 0x0, // SWI 27: CustomHalt - 0x0, // SWI 28: SoundDriverVSyncOff - 0x0, // SWI 29: SoundDriverVSyncOn - 0x0 // SWI 2A: SoundGetJumpList -}; - -#define generate_swi_hle_handler(_swi_number) \ -{ \ - u32 swi_number = _swi_number; \ - if(swi_hle_handle[swi_number]) \ - { \ - /* Div */ \ - if(swi_number == 0x06) \ - { \ - mips_emit_div(reg_r0, reg_r1); \ - mips_emit_mflo(reg_r0); \ - mips_emit_mfhi(reg_r1); \ - mips_emit_sra(reg_a0, reg_r0, 31); \ - mips_emit_xor(reg_r3, reg_r0, reg_a0); \ - mips_emit_subu(reg_r3, reg_r3, reg_a0); \ - } \ - break; \ - } \ -} \ - -#define generate_translation_gate(type) \ - generate_load_pc(reg_a0, pc); \ - generate_indirect_branch_no_cycle_update(type) \ - -#define generate_step_debug() \ - generate_load_imm(reg_a0, pc); \ - generate_function_call(step_debug_mips) \ - -#define generate_update_pc_reg() \ - generate_load_pc(reg_a0, pc); \ - mips_emit_sw(reg_a0, reg_base, (REG_PC * 4)) \ - -#endif diff --git a/psp/mips_stub.S b/psp/mips_stub.S deleted file mode 100644 index 65d5e9d2..00000000 --- a/psp/mips_stub.S +++ /dev/null @@ -1,3427 +0,0 @@ -# gameplaySP -# -# Copyright (C) 2006 Exophase -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - -.align 4 - -.global mips_update_gba -.global mips_indirect_branch_arm -.global mips_indirect_branch_thumb -.global mips_indirect_branch_dual -.global execute_load_u8 -.global execute_load_u16 -.global execute_load_u32 -.global execute_load_s8 -.global execute_load_s16 -.global execute_store_u8 -.global execute_store_u16 -.global execute_store_u32 -.global execute_aligned_load32 -.global execute_aligned_store32 -.global execute_read_cpsr -.global execute_read_spsr -.global execute_swi -.global execute_spsr_restore -.global execute_store_cpsr -.global execute_store_spsr -.global execute_lsl_flags_reg -.global execute_lsr_flags_reg -.global execute_asr_flags_reg -.global execute_ror_flags_reg -.global execute_arm_translate -.global invalidate_icache_region -.global invalidate_all_cache -.global step_debug_mips -.global reg_check - -.global memory_map_read -.global memory_map_write -.global reg - -.extern reg -.extern spsr - -# MIPS register layout: - -# $0 - constant zero -# $1 - temporary -# $2 - temporary / return value -# $3 - ARM r0 (not saved) -# $4 - temporary / function argument 0 -# $5 - temporary / function argument 1 -# $6 - temporary / function argument 2 -# $7 - ARM r1 (not saved) -# $8 - ARM r2 (not saved) -# $9 - ARM r3 (not saved) -# $10 - ARM r4 (not saved) -# $11 - ARM r5 (not saved) -# $12 - ARM r6 (not saved) -# $13 - ARM r7 (not saved) -# $14 - ARM r8 (not saved) -# $15 - ARM r9 (not saved) -# $16 - ARM machine state pointer (saved) -# $17 - cycle counter (saved) -# $18 - ARM r10 (saved) -# $19 - block start address (roughly r15) (saved) -# $20 - ARM negative register (saved) -# $21 - ARM zero register (saved) -# $22 - ARM carry register (saved) -# $23 - ARM overflow register (saved) -# $24 - ARM r11 (not saved) -# $25 - ARM r12 (not saved) -# $26 - kernel temporary 0 -# $27 - kernel temporary 1 -# $28 - ARM r13 (saved) -# $29 - stack pointer -# $30 - ARM r14 (saved) -# $31 - return address - -.equ REG_R0, (0 * 4) -.equ REG_R1, (1 * 4) -.equ REG_R2, (2 * 4) -.equ REG_R3, (3 * 4) -.equ REG_R4, (4 * 4) -.equ REG_R5, (5 * 4) -.equ REG_R6, (6 * 4) -.equ REG_R7, (7 * 4) -.equ REG_R8, (8 * 4) -.equ REG_R9, (9 * 4) -.equ REG_R10, (10 * 4) -.equ REG_R11, (11 * 4) -.equ REG_R12, (12 * 4) -.equ REG_R13, (13 * 4) -.equ REG_R14, (14 * 4) -.equ REG_LR, (14 * 4) -.equ REG_PC, (15 * 4) -.equ REG_N_FLAG, (16 * 4) -.equ REG_Z_FLAG, (17 * 4) -.equ REG_C_FLAG, (18 * 4) -.equ REG_V_FLAG, (19 * 4) -.equ REG_CPSR, (20 * 4) -.equ REG_SAVE, (21 * 4) -.equ REG_SAVE2, (22 * 4) -.equ REG_SAVE3, (23 * 4) -.equ CPU_MODE, (29 * 4) -.equ CPU_HALT_STATE, (30 * 4) -.equ CHANGED_PC_STATUS, (31 * 4) -.equ GP_SAVE, (32 * 4) - -.equ SUPERVISOR_LR, (reg_mode + (3 * (7 * 4)) + (6 * 4)) -.equ SUPERVISOR_SPSR, (spsr + (3 * 4)) - -.set noat -.set noreorder - -# make sure $16 has the register base for these macros - -.macro collapse_flag flag_reg, shift - ins $2, $\flag_reg, \shift, 1 # insert flag into CPSR -.endm - -.macro collapse_flags - lw $2, REG_CPSR($16) # load CPSR - andi $2, $2, 0xFF # isolate lower 8bits - collapse_flag 20, 31 # store flags - collapse_flag 21, 30 - collapse_flag 22, 29 - collapse_flag 23, 28 - sw $2, REG_CPSR($16) # store CPSR -.endm - -.macro extract_flag shift, flag_reg - ext $\flag_reg, $1, \shift, 1 # extract flag from CPSR -.endm - -.macro extract_flags_body # extract flags from $1 - extract_flag 31, 20 # load flags - extract_flag 30, 21 - extract_flag 29, 22 - extract_flag 28, 23 -.endm - -.macro extract_flags - lw $1, REG_CPSR($16) # load CPSR - extract_flags_body -.endm - -.macro save_registers - sw $3, REG_R0($16) - sw $7, REG_R1($16) - sw $8, REG_R2($16) - sw $9, REG_R3($16) - sw $10, REG_R4($16) - sw $11, REG_R5($16) - sw $12, REG_R6($16) - sw $13, REG_R7($16) - sw $14, REG_R8($16) - sw $15, REG_R9($16) - sw $24, REG_R11($16) - sw $25, REG_R12($16) - - sw $18, REG_R10($16) - sw $28, REG_R13($16) - sw $30, REG_R14($16) - - lw $28, GP_SAVE($16) -.endm - -.macro restore_registers - lw $3, REG_R0($16) - lw $7, REG_R1($16) - lw $8, REG_R2($16) - lw $9, REG_R3($16) - lw $10, REG_R4($16) - lw $11, REG_R5($16) - lw $12, REG_R6($16) - lw $13, REG_R7($16) - lw $14, REG_R8($16) - lw $15, REG_R9($16) - lw $24, REG_R11($16) - lw $25, REG_R12($16) - - lw $18, REG_R10($16) - lw $28, REG_R13($16) - lw $30, REG_R14($16) -.endm - -# Process a hardware event. Since an interrupt might be -# raised we have to check if the PC has changed. - -# $4: next address -# $16: register base -# $17: cycle counter - -.balign 64 - -mips_update_gba: - sw $4, REG_PC($16) # current PC = $4 - - addiu $sp, $sp, -4 # make room on the stack - sw $ra,($sp) # save return address - collapse_flags # update cpsr - save_registers # save registers - jal update_gba # process the next event - sw $0, CHANGED_PC_STATUS($16) - - lw $ra, ($sp) # restore return address - addiu $sp, $sp, 4 # fix stack - - lw $1, CHANGED_PC_STATUS($16) - bne $1, $0, lookup_pc - addu $17, $2, $0 # $17 = new cycle count (delay slot) - - restore_registers - - jr $ra # if not, go back to caller - nop - -# Perform an indirect branch. - -# $4: GBA address to branch to - -mips_indirect_branch_arm: - save_registers - jal block_lookup_address_arm # $2 = MIPS address to jump to - nop - restore_registers - jr $2 # jump to it - nop - -mips_indirect_branch_thumb: - save_registers - jal block_lookup_address_thumb # $2 = MIPS address to jump to - nop - restore_registers - jr $2 # jump to it - nop - -mips_indirect_branch_dual: - save_registers - jal block_lookup_address_dual # $2 = MIPS address to jump to - nop - restore_registers - jr $2 # jump to it - nop - - -# $4: address to write to -# $5: current PC - -# Will patch the return address with a call to the correct handler as -# listed in the given table. - -# Value will be set to force_open if it's open - -.macro patch_handler ftable, force_open - srl $1, $4, 24 # $1 = address region - sltu $2, $1, 0x0F # check if the value is open - bne $2, $0, 1f - sll $1, $1, 2 # make address word indexed (delay) - - addiu $1, $0, (\force_open * 4) - -1: - lui $2, %hi(\ftable) - addu $2, $2, $1 - lw $2, %lo(\ftable)($2) # new function handler is in $2 - srl $2, $2, 2 # remove lower two bits - - lui $1, %hi(3 << 26) # $1 = 3 (JAL opcode) - ins $1, $2, 0, 26 # insert offset into jal - - addiu $ra, $ra, -8 # rewind return address to function call - sw $1, ($ra) # modify to call new handler - - cache 0x1a, ($ra) # hit writeback dcache line - cache 0x08, ($ra) # hit invalidate icache line - - jr $ra # return - nop # wary of putting cache here -.endm - - -# Like the above, but will use the table of the proper alignment, -# The tables should be ordered by alignment - -.macro patch_handler_align ftable, alignment - srl $1, $4, 24 # $1 = address region - sltu $2, $1, 0x0F # check if the value is open - bne $2, $0, 1f - sll $1, $1, 2 # make address word indexed (delay) - - addiu $1, $0, 4 # force address to 0x1 (open) - -1: - ins $1, $4, 6, \alignment # place alignment bits into offset - lui $2, %hi(\ftable) - - addu $2, $2, $1 - lw $2, %lo(\ftable)($2) # new function handler is in $2 - - srl $2, $2, 2 # remove lower two bits - - lui $1, %hi(3 << 26) # $1 = 3 (JAL opcode) - ins $1, $2, 0, 26 # insert offset into jal - - addiu $ra, $ra, -8 # rewind return address to function call - sw $1, ($ra) # modify to call new handler - - cache 0x1a, ($ra) # hit writeback dcache line - cache 0x08, ($ra) # hit invalidate icache line - - jr $ra # return - nop # wary of putting cache here -.endm - - -.macro region_check region, patch_handler - srl $1, $4, 24 # check upper 8bits of address - xor $1, $1, \region # see if it is the given region - bne $1, $0, \patch_handler # if not repatch/try again -.endm - -.macro region_check_open patch_handler - srl $1, $4, 24 # check upper 8bits of address - sltiu $2, $1, 0x0F # true if it is a low address - addiu $1, $1, -1 # non-zero if it is not a low open - sltu $1, $0, $1 # true if lower bits != 1 - and $1, $1, $2 # true if low address and not open - bne $1, $0, \patch_handler # if above is true, patch -.endm - - -.macro region_check_align region, align_bits, alignment, patch_handler - srl $1, $4, 24 # check upper 8bits of address - ins $1, $4, 8, \align_bits # look at lower bits of address too - # See if it is the given region and alignment - xori $1, $1, (\region | (\alignment << 8)) - bne $1, $0, \patch_handler # if not repatch/try again -.endm - -.macro region_check_open_align align_bits, alignment, patch_handler - srl $1, $4, 24 # check upper 8bits of address - sltiu $2, $1, 0x0F # true if it is a low address - addiu $1, $1, -1 # non-zero if it is not a low open - sltu $1, $0, $1 # true if $1 != 0 - and $1, $1, $2 # true if low address and not open - ext $2, $4, 0, \align_bits # $2 = low bits of 4 - xori $2, $2, \alignment # true if alignment doesn't match - or $1, $1, $2 # align failure will trigger too - bne $1, $0, \patch_handler # if above is true, patch -.endm - - -.macro ignore_region region, patch_handler - region_check \region, \patch_handler - nop - jr $ra - nop -.endm - -.macro ignore_high patch_handler - srl $1, $4, 24 # check upper 8bits of address - sltiu $1, $1, 0x0F # see if it is not high - bne $1, $0, \patch_handler # if not repatch/try again - nop - jr $ra - nop -.endm - - -.macro translate_region_core base, size - lui $2, %hi(\base) # generate upper address - andi $4, $4, \size # generate offset - addu $2, $2, $4 # add ptr upper and offset -.endm - -.macro translate_region region, patch_handler, base, size - region_check \region, \patch_handler - translate_region_core \base, \size -.endm - -# I refuse to have > 80 char lines, and GAS has a problem with the param -# list spilling over (grumble) - -.macro translate_region_align region, a_b, alignment, p_h, base, size - region_check_align \region, \a_b, \alignment, \p_h - translate_region_core \base, \size -.endm - - -.macro translate_region_ewram_core mask - lui $2, %hi(ewram + 0x8000) # generate upper address (delay) - andi $1, $4, \mask # generate 15bit offset - ext $4, $4, 15, 3 # isolate top 3 bits of offset - ins $1, $4, 16, 3 # reinsert into top 4 bits - addu $2, $2, $1 -.endm - -.macro translate_region_ewram patch_handler - region_check 2, \patch_handler - translate_region_ewram_core 0x7FFF -.endm - -.macro translate_region_ewram_load_align align_bits, alignment, patch_handler - region_check_align 2, \align_bits, \alignment, \patch_handler - translate_region_ewram_core 0x7FFF -.endm - -.macro translate_region_ewram_load_align16 align_bits, alignment, patch_handler - region_check_align 2, \align_bits, \alignment, \patch_handler - translate_region_ewram_core 0x7FFE -.endm - -.macro translate_region_ewram_load_align32 align_bits, alignment, patch_handler - region_check_align 2, \align_bits, \alignment, \patch_handler - translate_region_ewram_core 0x7FFC -.endm - -.macro translate_region_ewram_store_align16 patch_handler - region_check 2, \patch_handler - translate_region_ewram_core 0x7FFE -.endm - -.macro translate_region_ewram_store_align32 patch_handler - region_check 2, \patch_handler - translate_region_ewram_core 0x7FFC -.endm - - -.macro translate_region_vram_core - addiu $2, $2, -3 # see if it's 3 - ext $4, $4, 0, 17 # generate 17bit offset - bne $2, $0, 1f - lui $1, %hi(vram) # start loading vram address (delay) - - addiu $4, $4, -0x8000 # move address into VRAM region - -1: - addu $2, $1, $4 # $2 = (hi)vram + address -.endm - -.macro translate_region_vram patch_handler - region_check 6, \patch_handler - ext $2, $4, 15, 2 # $2 = bits 15 and 16 of address (delay) - translate_region_vram_core -.endm - -.macro translate_region_vram_load_align align_bits, alignment, patch_handler - region_check_align 6, \align_bits, \alignment, \patch_handler - ext $2, $4, 15, 2 # $2 = bits 15 and 16 of address (delay) - translate_region_vram_core -.endm - -.macro translate_region_vram_load_align16 align_bits, alignment, patch_handler - region_check_align 6, \align_bits, \alignment, \patch_handler - ext $2, $4, 15, 2 # $2 = bits 15 and 16 of address (delay) - ins $4, $0, 0, 1 # mask out lower bit of address - translate_region_vram_core -.endm - -.macro translate_region_vram_load_align32 align_bits, alignment, patch_handler - region_check_align 6, \align_bits, \alignment, \patch_handler - ext $2, $4, 15, 2 # $2 = bits 15 and 16 of address (delay) - ins $4, $0, 0, 2 # mask out lower two bits of address - translate_region_vram_core -.endm - -.macro translate_region_vram_store_align16 patch_handler - region_check 6, \patch_handler - ext $2, $4, 15, 2 # $2 = bits 15 and 16 of address (delay) - ins $4, $0, 0, 1 # mask out lower bit of address - translate_region_vram_core -.endm - -.macro translate_region_vram_store_align32 patch_handler - region_check 6, \patch_handler - ext $2, $4, 15, 2 # $2 = bits 15 and 16 of address (delay) - ins $4, $0, 0, 2 # mask out lower two bits of address - translate_region_vram_core -.endm - - - -.macro translate_region_gamepak_core mask - srl $2, $4, 15 # $2 = page number of address (delay) - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $2 = memory_map_read[address >> 15] - lw $2, -32768($2) - bne $2, $0, 1f # if it's non-NULL continue - andi $1, $4, \mask # $1 = low 15bits of address (delay slot) - - sw $ra, REG_SAVE2($16) # save return address - - save_registers # save the registers - ext $4, $4, 15, 10 # $4 = (address >> 15) & 0x3FF - - jal load_gamepak_page # get page in $2 - sw $1, REG_SAVE($16) # save offset (delay) - lw $1, REG_SAVE($16) # restore offset (delay) - - restore_registers # restore the other registers - - lw $ra, REG_SAVE2($16) # restore return address - -1: - addu $2, $2, $1 # add the memory map offset -.endm - -.macro translate_region_gamepak region, patch_handler - region_check \region, \patch_handler - translate_region_gamepak_core 0x7FFF -.endm - -.macro translate_region_gamepak_align region, a_b, alignment, patch_handler - region_check_align \region, \a_b, \alignment, \patch_handler - translate_region_gamepak_core 0x7FFF -.endm - -.macro translate_region_gamepak_align16 region, a_b, alignment, patch_handler - region_check_align \region, \a_b, \alignment, \patch_handler - translate_region_gamepak_core 0x7FFE -.endm - -.macro translate_region_gamepak_align32 region, a_b, alignment, patch_handler - region_check_align \region, \a_b, \alignment, \patch_handler - translate_region_gamepak_core 0x7FFC -.endm - - -.macro translate_region_gamepak_a region, patch_handler - region_check \region, \patch_handler - srl $2, $4, 15 # $2 = page number of address (delay) - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $2 = memory_map_read[address >> 15] - lw $2, -32768($2) - bne $2, $0, 1f # if it's non-NULL continue - andi $1, $4, 0x7FFF # $1 = low 15bits of address (delay slot) - - sw $ra, REG_SAVE2($16) # save return address - sw $6, REG_SAVE3($16) # save a2 - - save_registers # save the registers - ext $4, $4, 15, 10 # $4 = (address >> 15) & 0x3FF - - jal load_gamepak_page # get page in $2 - sw $1, REG_SAVE($16) # save offset (delay) - lw $1, REG_SAVE($16) # restore offset (delay) - - restore_registers # restore the other registers - - lw $ra, REG_SAVE2($16) # restore return address - lw $6, REG_SAVE3($16) # restore a2 - -1: - addu $2, $2, $1 # add the memory map offset -.endm - - -.macro eeprom_load_a patch_handler - region_check 0xD, \patch_handler - - sw $ra, REG_SAVE($16) # save the return address (delay) - sw $6, REG_SAVE2($16) # save a2 - - save_registers # save the registers - - jal read_eeprom # get eeprom value in $2 - nop - - restore_registers # restore the other registers - - lw $ra, REG_SAVE($16) # restore return address - jr $ra # return - lw $6, REG_SAVE2($16) # restore a2 -.endm - - -.macro eeprom_load_core - sw $ra, REG_SAVE($16) # save the return address (delay) - - save_registers # save the registers - - jal read_eeprom # get eeprom value in $2 - nop - - restore_registers # restore the other registers - - lw $ra, REG_SAVE($16) # restore return address - jr $ra # return - nop -.endm - -.macro eeprom_load patch_handler - region_check 0xD, \patch_handler - eeprom_load_core -.endm - -.macro eeprom_load_align align_bits, alignment, patch_handler - region_check_align 0xD, \align_bits, \alignment, \patch_handler - eeprom_load_core -.endm - -.macro eeprom_load_align16 align_bits, alignment, patch_handler - eeprom_load_align \align_bits, \alignment, \patch_handler -.endm - -.macro eeprom_load_align32 align_bits, alignment, patch_handler - eeprom_load_align \align_bits, \alignment, \patch_handler -.endm - - -.macro backup_load_core - save_registers # save the registers - - jal read_backup # get backup value in $2 - ext $4, $4, 0, 16 # address &= 0xFFFF - - restore_registers # restore the other registers - - lw $ra, REG_SAVE($16) # restore return address - jr $ra # return -.endm - -.macro backup_load_a patch_handler - region_check 0xE, \patch_handler - sw $ra, REG_SAVE($16) # save return address (delay) - sw $6, REG_SAVE2($16) # save a2 - - save_registers # save the registers - - jal read_backup # get backup value in $2 - ext $4, $4, 0, 16 # address &= 0xFFFF - - restore_registers # restore the other registers - - lw $ra, REG_SAVE($16) # restore return address - jr $ra # return - lw $6, REG_SAVE2($16) # restore a2 -.endm - - -.macro backup_load patch_handler - region_check 0xE, \patch_handler - sw $ra, REG_SAVE($16) # save the return address (delay) - backup_load_core -.endm - -.macro backup_load_align align_bits, alignment, patch_handler - region_check_align 0xE, \align_bits, \alignment, \patch_handler - sw $ra, REG_SAVE($16) # save the return address (delay) - backup_load_core -.endm - -.macro backup_load_align16 align_bits, alignment, patch_handler - region_check_align 0xE, \align_bits, \alignment, \patch_handler - sw $ra, REG_SAVE($16) # save the return address (delay) - ins $4, $0, 0, 1 # mask out lower bit - backup_load_core -.endm - -.macro backup_load_align32 align_bits, alignment, patch_handler - region_check_align 0xE, \align_bits, \alignment, \patch_handler - sw $ra, REG_SAVE($16) # save the return address (delay) - ins $4, $0, 0, 2 # mask out lower two bits - backup_load_core -.endm - - -.macro open_load8_core - lw $2, REG_CPSR($16) # $2 = CPSR (delay) - andi $2, $2, 0x20 # test T bit - beq $2, $0, 1f # branch if ARM mode - andi $4, $4, 0x03 # isolate lower 3bits from address (delay) - - andi $4, $4, 0x01 # in Thumb mode, isolate one more bit - -1: - sw $ra, REG_SAVE($16) # save the return address (delay) - save_registers # save the registers - - jal read_memory8 # get instruction at PC - addu $4, $5, $4 # a0 = PC + low bits of address - - restore_registers # restore the other registers - - lw $ra, REG_SAVE($16) # restore return address - jr $ra # return -.endm - -.macro open_load8 patch_handler - region_check_open \patch_handler - open_load8_core -.endm - - - -.macro open_load16_core - lw $2, REG_CPSR($16) # $2 = CPSR (delay) - andi $2, $2, 0x20 # test T bit - beq $2, $0, 1f # branch if ARM mode - andi $4, $4, 0x02 # isolate bit 1 from address (delay) - - addu $4, $0, $0 # zero out address bit - -1: - sw $ra, REG_SAVE($16) # save the return address (delay) - save_registers # save the registers - - jal read_memory16 # get instruction at PC - addu $4, $5, $4 # a0 = PC + low bits of address - - restore_registers # restore the other registers - - lw $ra, REG_SAVE($16) # restore return address - jr $ra # return -.endm - -.macro open_load16_align align_bits, alignment, patch_handler - region_check_open_align \align_bits, \alignment, \patch_handler - open_load16_core -.endm - -.macro open_load16_align16 align_bits, alignment, patch_handler - open_load16_align \align_bits, \alignment, \patch_handler -.endm - - - -.macro open_load32_core - lw $2, REG_CPSR($16) # $2 = CPSR (delay) - andi $2, $2, 0x20 # test T bit - - save_registers # save the registers - - beq $2, $0, 1f # branch if ARM mode - sw $ra, REG_SAVE($16) # save the return address (delay) - - jal read_memory16 # get instruction at PC - addu $4, $5, $0 # a0 = PC - - j 2f - ins $2, $2, 16, 16 # result = (result << 16) | result (delay) - -1: - jal read_memory32 # get instruction at PC - addu $4, $5, $4 # a0 = PC - -2: # join point - restore_registers # restore the other registers - - lw $ra, REG_SAVE($16) # restore return address - jr $ra # return -.endm - -.macro open_load32_a patch_handler - region_check_open \patch_handler - - lw $2, REG_CPSR($16) # $2 = CPSR (delay) - andi $2, $2, 0x20 # test T bit - - save_registers # save the registers - sw $6, REG_SAVE2($16) # save a2 - - beq $2, $0, 1f # branch if ARM mode - sw $ra, REG_SAVE($16) # save the return address (delay) - - jal read_memory16 # get instruction at PC - addu $4, $5, $0 # a0 = PC - - j 2f - ins $2, $2, 16, 16 # result = (result << 16) | result (delay) - -1: - jal read_memory32 # get instruction at PC - addu $4, $5, $4 # a0 = PC - -2: - restore_registers # restore the other registers - - lw $ra, REG_SAVE($16) # restore return address - jr $ra # return - lw $6, REG_SAVE2($16) # restore a2 (delay) -.endm - -.macro open_load32_align align_bits, alignment, patch_handler - region_check_open_align \align_bits, \alignment, \patch_handler - open_load32_core -.endm - -.macro open_load32_align32 align_bits, alignment, patch_handler - open_load32_align \align_bits, \alignment, \patch_handler -.endm - - -.macro store_function function, region, patch_handler, mask - region_check \region, \patch_handler - sw $ra, REG_SAVE($16) # save the return address (delay) - - save_registers # save the registers - - jal \function # store value out - andi $4, $4, \mask # mask address - - restore_registers # restore the other registers - - lw $ra, REG_SAVE($16) # restore return address - jr $ra # return - nop -.endm - - -.macro store_function_a function, region, patch_handler, mask - region_check \region, \patch_handler - sw $ra, REG_SAVE($16) # save the return address (delay) - - save_registers # save the registers - - jal \function # store value out - andi $4, $4, \mask # mask address - - restore_registers # restore the other registers - - lw $ra, REG_SAVE($16) # restore return address - jr $ra # return - nop -.endm - - - -.macro load_u8 base - jr $ra # return - lbu $2, %lo(\base)($2) # return base[offset] -.endm - -.macro load_s8 base - jr $ra # return - lb $2, %lo(\base)($2) # return base[offset] -.endm - -.macro load_u16 base - jr $ra # return - lhu $2, %lo(\base)($2) # return base[offset] -.endm - -.macro load_s16 base - jr $ra # return - lh $2, %lo(\base)($2) # return base[offset] -.endm - -.macro load_u32 base - jr $ra # return - lw $2, %lo(\base)($2) # return base[offset] -.endm - - -# 16bit unaligned load will always have a 1 in the LSB; -# should have already been taken care of in indexing. - -.macro load_u16_unaligned base - lhu $2, %lo(\base)($2) # load base[offset] - jr $ra # return - ror $2, $2, 8 # rotate value by 8bits -.endm - -# This is technically the same as load_s8, but kept to -# avoid confusion. - -.macro load_s16_unaligned base - jr $ra # return - lb $2, %lo(\base)($2) # return base[offset] -.endm - -# Unalignment must be known statically (use the tables to -# patch correctly) - -.macro load_u32_unaligned base, alignment - lw $2, %lo(\base)($2) # load base[offset] - jr $ra # return - ror $2, $2, (\alignment * 8) # rotate value by 8bits -.endm - - -.macro store_u8 base - jr $ra # return - sb $5, %lo(\base)($2) # store value at base[offset] -.endm - -.macro store_u16 base - jr $ra # return - sh $5, %lo(\base)($2) # store value at base[offset] -.endm - -.macro store_u32 base - jr $ra # return - sw $5, %lo(\base)($2) # store value at base[offset] -.endm - - -# Store the value double mirrored (u16) - -.macro store_u8_double base - ins $5, $5, 8, 8 # value = (value << 8) | value - jr $ra # return - sh $5, %lo(\base)($2) # store value at base[offset] -.endm - - -# Store the values and check if it overwrote code there - -.macro store_u8_smc base - addiu $2, $2, %lo(\base) # offset the address - lb $1, -32768($2) # load the SMC status - bne $1, $0, smc_write # is there code there? - sb $5, ($2) # store value at base[offset] (delay) - jr $ra # return - nop -.endm - -.macro store_u16_smc base - addiu $2, $2, %lo(\base) # offset the address - lh $1, -32768($2) # load the SMC status - bne $1, $0, smc_write # is there code there? - sh $5, ($2) # store value at base[offset] (delay) - jr $ra # return - nop -.endm - -.macro store_u32_smc base - addiu $2, $2, %lo(\base) # offset the address - lw $1, -32768($2) # load the SMC status - bne $1, $0, smc_write # is there code there? - sw $5, ($2) # store value at base[offset] (delay) - jr $ra # return - nop -.endm - - - -# Unsigned 8bit load handlers - -execute_load_bios_u8: - region_check 0, patch_load_u8 - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f # if not, perform open read - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFF # generate offset - addu $2, $2, $4 - load_u8 bios_rom - -1: - lui $2, %hi(bios_read_protect) # generate upper address - ins $2, $4, 0, 2 # lower 2 bits address contributes - load_u8 bios_read_protect - -2: - open_load8_core - nop - - -execute_load_ewram_u8: - translate_region_ewram patch_load_u8 - load_u8 (ewram + 0x8000) - -# Put the generic address over the handler you want to be default -# IWRAM is typically the most frequently read and written to. - -execute_load_u8: -execute_load_iwram_u8: - translate_region 3, patch_load_u8, (iwram + 0x8000), 0x7FFF - load_u8 (iwram + 0x8000) - -execute_load_io_u8: - translate_region 4, patch_load_u8, io_registers, 0x3FF - load_u8 io_registers - -execute_load_palette_u8: - translate_region 5, patch_load_u8, palette_ram, 0x3FF - load_u8 palette_ram - -execute_load_vram_u8: - translate_region_vram patch_load_u8 - load_u8 vram - -execute_load_oam_u8: - translate_region 7, patch_load_u8, oam_ram, 0x3FF - load_u8 oam_ram - -execute_load_gamepak8_u8: - translate_region_gamepak 8, patch_load_u8 - load_u8 0 - -execute_load_gamepak9_u8: - translate_region_gamepak 9, patch_load_u8 - load_u8 0 - -execute_load_gamepakA_u8: - translate_region_gamepak 10, patch_load_u8 - load_u8 0 - -execute_load_gamepakB_u8: - translate_region_gamepak 11, patch_load_u8 - load_u8 0 - -execute_load_gamepakC_u8: - translate_region_gamepak 12, patch_load_u8 - load_u8 0 - -execute_load_eeprom_u8: - eeprom_load patch_load_u8 - -execute_load_backup_u8: - backup_load patch_load_u8 - nop - -execute_load_open_u8: - open_load8 patch_load_u8 - nop - -load_u8_ftable: - .long execute_load_bios_u8 # 0x00 BIOS - .long execute_load_open_u8 # 0x01 open address - .long execute_load_ewram_u8 # 0x02 EWRAM - .long execute_load_iwram_u8 # 0x03 IWRAM - .long execute_load_io_u8 # 0x04 I/O registers - .long execute_load_palette_u8 # 0x05 Palette RAM - .long execute_load_vram_u8 # 0x06 VRAM - .long execute_load_oam_u8 # 0x07 OAM RAM - .long execute_load_gamepak8_u8 # 0x08 gamepak - .long execute_load_gamepak9_u8 # 0x09 gamepak - .long execute_load_gamepakA_u8 # 0x0A gamepak - .long execute_load_gamepakB_u8 # 0x0B gamepak - .long execute_load_gamepakC_u8 # 0x0C gamepak - .long execute_load_eeprom_u8 # 0x0D gamepak/eeprom - .long execute_load_backup_u8 # 0x0E Flash ROM/SRAM - .long execute_load_open_u8 # 0x0F open address - -patch_load_u8: - patch_handler load_u8_ftable, 0x01 - - - -# Signed 8bit load handlers - -execute_load_bios_s8: - region_check 0, patch_load_s8 - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFF # generate offset - addu $2, $2, $4 - load_s8 bios_rom - -1: - lui $2, %hi(bios_read_protect) # generate upper address - ins $2, $4, 0, 2 # lower 2 bits contribute - load_s8 bios_read_protect - -2: - open_load8_core - seb $2, $2 - - -execute_load_ewram_s8: - translate_region_ewram patch_load_s8 - load_s8 (ewram + 0x8000) - -execute_load_s8: -execute_load_iwram_s8: - translate_region 3, patch_load_s8, (iwram + 0x8000), 0x7FFF - load_s8 (iwram + 0x8000) - -execute_load_io_s8: - translate_region 4, patch_load_s8, io_registers, 0x3FF - load_s8 io_registers - -execute_load_palette_s8: - translate_region 5, patch_load_s8, palette_ram, 0x3FF - load_s8 palette_ram - -execute_load_vram_s8: - translate_region_vram patch_load_s8 - load_s8 vram - -execute_load_oam_s8: - translate_region 7, patch_load_s8, oam_ram, 0x3FF - load_s8 oam_ram - -execute_load_gamepak8_s8: - translate_region_gamepak 8, patch_load_s8 - load_s8 0 - -execute_load_gamepak9_s8: - translate_region_gamepak 9, patch_load_s8 - load_s8 0 - -execute_load_gamepakA_s8: - translate_region_gamepak 10, patch_load_s8 - load_s8 0 - -execute_load_gamepakB_s8: - translate_region_gamepak 11, patch_load_s8 - load_s8 0 - -execute_load_gamepakC_s8: - translate_region_gamepak 12, patch_load_s8 - load_s8 0 - -execute_load_eeprom_s8: - eeprom_load patch_load_s8 - -execute_load_backup_s8: - backup_load patch_load_s8 - seb $2, $2 # sign extend result (delay) - -execute_load_open_s8: - open_load8 patch_load_s8 - seb $2, $2 # sign extend result (delay) - -load_s8_ftable: - .long execute_load_bios_s8 # 0x00 BIOS - .long execute_load_open_s8 # 0x01 open address - .long execute_load_ewram_s8 # 0x02 EWRAM - .long execute_load_iwram_s8 # 0x03 IWRAM - .long execute_load_io_s8 # 0x04 I/O registers - .long execute_load_palette_s8 # 0x05 Palette RAM - .long execute_load_vram_s8 # 0x06 VRAM - .long execute_load_oam_s8 # 0x07 OAM RAM - .long execute_load_gamepak8_s8 # 0x08 gamepak - .long execute_load_gamepak9_s8 # 0x09 gamepak - .long execute_load_gamepakA_s8 # 0x0A gamepak - .long execute_load_gamepakB_s8 # 0x0B gamepak - .long execute_load_gamepakC_s8 # 0x0C gamepak - .long execute_load_eeprom_s8 # 0x0D gamepak/eeprom - .long execute_load_backup_s8 # 0x0E Flash ROM/SRAM - .long execute_load_open_s8 # 0x0F open address - -patch_load_s8: - patch_handler load_s8_ftable, 1 - - - -# Unsigned aligned 16bit load handlers - -execute_load_bios_u16: - region_check_align 0, 1, 0, patch_load_u16 - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f # if not, perform open read - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFF # generate offset - addu $2, $2, $4 - load_u16 bios_rom - -1: - lui $2, %hi(bios_read_protect) # generate upper address - ins $2, $4, 0, 2 # bit 1 contributes - load_u16 bios_read_protect - -2: - open_load16_core - nop - -execute_load_ewram_u16: - translate_region_ewram_load_align 1, 0, patch_load_u16 - load_u16 (ewram + 0x8000) - -execute_load_u16: -execute_load_iwram_u16: - translate_region_align 3, 1, 0, patch_load_u16, (iwram + 0x8000), 0x7FFF - load_u16 (iwram + 0x8000) - -execute_load_io_u16: - translate_region_align 4, 1, 0, patch_load_u16, io_registers, 0x3FF - load_u16 io_registers - -execute_load_palette_u16: - translate_region_align 5, 1, 0, patch_load_u16, palette_ram, 0x3FF - load_u16 palette_ram - -execute_load_vram_u16: - translate_region_vram_load_align 1, 0, patch_load_u16 - load_u16 vram - -execute_load_oam_u16: - translate_region_align 7, 1, 0, patch_load_u16, oam_ram, 0x3FF - load_u16 oam_ram - -execute_load_gamepak8_u16: - translate_region_gamepak_align 8, 1, 0, patch_load_u16 - load_u16 0 - -execute_load_gamepak9_u16: - translate_region_gamepak_align 9, 1, 0, patch_load_u16 - load_u16 0 - -execute_load_gamepakA_u16: - translate_region_gamepak_align 10, 1, 0, patch_load_u16 - load_u16 0 - -execute_load_gamepakB_u16: - translate_region_gamepak_align 11, 1, 0, patch_load_u16 - load_u16 0 - -execute_load_gamepakC_u16: - translate_region_gamepak_align 12, 1, 0, patch_load_u16 - load_u16 0 - -execute_load_eeprom_u16: - eeprom_load_align 1, 0, patch_load_u16 - -execute_load_backup_u16: - backup_load_align 1, 0, patch_load_u16 - nop - -execute_load_open_u16: - open_load16_align 1, 0, patch_load_u16 - nop - - -# Unsigned unaligned 16bit load handlers - -execute_load_bios_u16u: - region_check_align 0, 1, 1, patch_load_u16 - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f # if not, perform open read - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFE # generate offset - addu $2, $2, $4 - load_u16_unaligned bios_rom - -1: - lui $2, %hi(bios_read_protect) # generate upper address - ext $1, $4, 1, 1 - ins $2, $1, 1, 1 # bit 1 contributes - load_u16_unaligned bios_read_protect - -2: - open_load16_core - ror $2, $2, 8 - - -execute_load_ewram_u16u: - translate_region_ewram_load_align16 1, 1, patch_load_u16 - load_u16_unaligned (ewram + 0x8000) - -execute_load_iwram_u16u: - translate_region_align 3, 1, 1, patch_load_u16, (iwram + 0x8000), 0x7FFE - load_u16_unaligned (iwram + 0x8000) - -execute_load_io_u16u: - translate_region_align 4, 1, 1, patch_load_u16, io_registers, 0x3FE - load_u16_unaligned io_registers - -execute_load_palette_u16u: - translate_region_align 5, 1, 1, patch_load_u16, palette_ram, 0x3FE - load_u16_unaligned palette_ram - -execute_load_vram_u16u: - translate_region_vram_load_align16 1, 1, patch_load_u16 - load_u16_unaligned vram - -execute_load_oam_u16u: - translate_region_align 7, 1, 1, patch_load_u16, oam_ram, 0x3FE - load_u16_unaligned oam_ram - -execute_load_gamepak8_u16u: - translate_region_gamepak_align16 8, 1, 1, patch_load_u16 - load_u16_unaligned 0 - -execute_load_gamepak9_u16u: - translate_region_gamepak_align16 9, 1, 1, patch_load_u16 - load_u16_unaligned 0 - -execute_load_gamepakA_u16u: - translate_region_gamepak_align16 10, 1, 1, patch_load_u16 - load_u16_unaligned 0 - -execute_load_gamepakB_u16u: - translate_region_gamepak_align16 11, 1, 1, patch_load_u16 - load_u16_unaligned 0 - -execute_load_gamepakC_u16u: - translate_region_gamepak_align16 12, 1, 1, patch_load_u16 - load_u16_unaligned 0 - -execute_load_eeprom_u16u: - eeprom_load_align16 1, 1, patch_load_u16 - -execute_load_backup_u16u: - backup_load_align16 1, 1, patch_load_u16 - ror $2, $2, 8 # rotate value by 8bits - -execute_load_open_u16u: - open_load16_align16 1, 1, patch_load_u16 - ror $2, $2, 8 # rotate value by 8bits - -load_u16_ftable: -# .long execute_load_full_u16 - .long execute_load_bios_u16 # 0x00 BIOS - .long execute_load_open_u16 # 0x01 open address - .long execute_load_ewram_u16 # 0x02 EWRAM - .long execute_load_iwram_u16 # 0x03 IWRAM - .long execute_load_io_u16 # 0x04 I/O registers - .long execute_load_palette_u16 # 0x05 Palette RAM - .long execute_load_vram_u16 # 0x06 VRAM - .long execute_load_oam_u16 # 0x07 OAM RAM - .long execute_load_gamepak8_u16 # 0x08 gamepak - .long execute_load_gamepak9_u16 # 0x09 gamepak - .long execute_load_gamepakA_u16 # 0x0A gamepak - .long execute_load_gamepakB_u16 # 0x0B gamepak - .long execute_load_gamepakC_u16 # 0x0C gamepak - - .long execute_load_eeprom_u16 # 0x0D gamepak/eeprom - .long execute_load_backup_u16 # 0x0E Flash ROM/SRAM - .long execute_load_open_u16 # 0x0F open - - .long execute_load_bios_u16u # 0x00 BIOS unaligned - .long execute_load_open_u16u # 0x01 open address unaligned - .long execute_load_ewram_u16u # 0x02 EWRAM unaligned - .long execute_load_iwram_u16u # 0x03 IWRAM unaligned - .long execute_load_io_u16u # 0x04 I/O registers unaligned - .long execute_load_palette_u16u # 0x05 Palette RAM unaligned - .long execute_load_vram_u16u # 0x06 VRAM unaligned - .long execute_load_oam_u16u # 0x07 OAM RAM unaligned - .long execute_load_gamepak8_u16u# 0x08 gamepak unaligned - .long execute_load_gamepak9_u16u# 0x09 gamepak unaligned - .long execute_load_gamepakA_u16u# 0x0A gamepak unaligned - .long execute_load_gamepakB_u16u# 0x0B gamepak unaligned - .long execute_load_gamepakC_u16u# 0x0C gamepak unaligned - .long execute_load_eeprom_u16u # 0x0D gamepak/eeprom unaligned - .long execute_load_backup_u16u # 0x0E Flash ROM/SRAM unaligned - .long execute_load_open_u16u # 0x0F open unaligned - - - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - - - -patch_load_u16: - patch_handler_align load_u16_ftable, 1 - -# Signed aligned 16bit load handlers - -execute_load_bios_s16: - region_check_align 0, 1, 0, patch_load_s16 - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f # if not, perform open read - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFF # generate offset - addu $2, $2, $4 - load_s16 bios_rom - -1: - lui $2, %hi(bios_read_protect) # generate upper address - ins $2, $4, 0, 2 # bit 1 contributes - load_s16 bios_read_protect - -2: - open_load16_core - seh $2, $2 - - -execute_load_ewram_s16: - translate_region_ewram_load_align 1, 0, patch_load_s16 - load_s16 (ewram + 0x8000) - -execute_load_s16: -execute_load_iwram_s16: - translate_region_align 3, 1, 0, patch_load_s16, (iwram + 0x8000), 0x7FFF - load_s16 (iwram + 0x8000) - -execute_load_io_s16: - translate_region_align 4, 1, 0, patch_load_s16, io_registers, 0x3FF - load_s16 io_registers - -execute_load_palette_s16: - translate_region_align 5, 1, 0, patch_load_s16, palette_ram, 0x3FF - load_s16 palette_ram - -execute_load_vram_s16: - translate_region_vram_load_align 1, 0, patch_load_s16 - load_s16 vram - -execute_load_oam_s16: - translate_region_align 7, 1, 0, patch_load_s16, oam_ram, 0x3FF - load_s16 oam_ram - -execute_load_gamepak8_s16: - translate_region_gamepak_align 8, 1, 0, patch_load_s16 - load_s16 0 - -execute_load_gamepak9_s16: - translate_region_gamepak_align 9, 1, 0, patch_load_s16 - load_s16 0 - -execute_load_gamepakA_s16: - translate_region_gamepak_align 10, 1, 0, patch_load_s16 - load_s16 0 - -execute_load_gamepakB_s16: - translate_region_gamepak_align 11, 1, 0, patch_load_s16 - load_s16 0 - -execute_load_gamepakC_s16: - translate_region_gamepak_align 12, 1, 0, patch_load_s16 - load_s16 0 - -execute_load_eeprom_s16: - eeprom_load_align 1, 0, patch_load_s16 - -execute_load_backup_s16: - backup_load_align 1, 0, patch_load_s16 - nop - -execute_load_open_s16: - open_load16_align 1, 0, patch_load_s16 - nop - - -# Signed unaligned 16bit load handlers - -execute_load_bios_s16u: - region_check_align 0, 1, 1, patch_load_s16 - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f # if not, perform open read - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFE # generate offset - addu $2, $1, $4 - load_s16_unaligned bios_rom - -1: - lui $2, %hi(bios_read_protect) # generate upper address - ext $1, $4, 1, 1 - ins $2, $1, 1, 1 # bit 1 contributes - load_s16_unaligned bios_read_protect - -2: - open_load16_core - seb $2, $2 - -execute_load_ewram_s16u: - translate_region_ewram_load_align16 1, 1, patch_load_s16 - load_s16_unaligned (ewram + 0x8000) - -execute_load_iwram_s16u: - translate_region_align 3, 1, 1, patch_load_s16, (iwram + 0x8000), 0x7FFE - load_s16_unaligned (iwram + 0x8000) - -execute_load_io_s16u: - translate_region_align 4, 1, 1, patch_load_s16, io_registers, 0x3FE - load_s16_unaligned io_registers - -execute_load_palette_s16u: - translate_region_align 5, 1, 1, patch_load_s16, palette_ram, 0x3FE - load_s16_unaligned palette_ram - -execute_load_vram_s16u: - translate_region_vram_load_align16 1, 1, patch_load_s16 - load_s16_unaligned vram - -execute_load_oam_s16u: - translate_region_align 7, 1, 1, patch_load_s16, oam_ram, 0x3FE - load_s16_unaligned oam_ram - -execute_load_gamepak8_s16u: - translate_region_gamepak_align16 8, 1, 1, patch_load_s16 - load_s16_unaligned 0 - -execute_load_gamepak9_s16u: - translate_region_gamepak_align16 9, 1, 1, patch_load_s16 - load_s16_unaligned 0 - -execute_load_gamepakA_s16u: - translate_region_gamepak_align16 10, 1, 1, patch_load_s16 - load_s16_unaligned 0 - -execute_load_gamepakB_s16u: - translate_region_gamepak_align16 11, 1, 1, patch_load_s16 - load_s16_unaligned 0 - -execute_load_gamepakC_s16u: - translate_region_gamepak_align16 12, 1, 1, patch_load_s16 - load_s16_unaligned 0 - -execute_load_eeprom_s16u: - eeprom_load_align 1, 1, patch_load_s16 - -execute_load_backup_s16u: - backup_load_align 1, 1, patch_load_s16 - seb $2, $2 # sign extend result from 8bits - -execute_load_open_s16u: - open_load16_align 1, 1, patch_load_s16 - seb $2, $2 # sign extend result from 8bits - -load_s16_ftable: - .long execute_load_bios_s16 # 0x00 BIOS - .long execute_load_open_s16 # 0x01 open address - .long execute_load_ewram_s16 # 0x02 EWRAM - .long execute_load_iwram_s16 # 0x03 IWRAM - .long execute_load_io_s16 # 0x04 I/O registers - .long execute_load_palette_s16 # 0x05 Palette RAM - .long execute_load_vram_s16 # 0x06 VRAM - .long execute_load_oam_s16 # 0x07 OAM RAM - .long execute_load_gamepak8_s16 # 0x08 gamepak - .long execute_load_gamepak9_s16 # 0x09 gamepak - .long execute_load_gamepakA_s16 # 0x0A gamepak - .long execute_load_gamepakB_s16 # 0x0B gamepak - .long execute_load_gamepakC_s16 # 0x0C gamepak - .long execute_load_eeprom_s16 # 0x0D gamepak/eeprom - .long execute_load_backup_s16 # 0x0E Flash ROM/SRAM - .long execute_load_open_s16 # 0x0F open unaligned - - .long execute_load_bios_s16u # 0x00 BIOS unaligned - .long execute_load_open_s16u # 0x01 open address unaligned - .long execute_load_ewram_s16u # 0x02 EWRAM unaligned - .long execute_load_iwram_s16u # 0x03 IWRAM unaligned - .long execute_load_io_s16u # 0x04 I/O registers unaligned - .long execute_load_palette_s16u # 0x05 Palette RAM unaligned - .long execute_load_vram_s16u # 0x06 VRAM unaligned - .long execute_load_oam_s16u # 0x07 OAM RAM unaligned - .long execute_load_gamepak8_s16u# 0x08 gamepak unaligned - .long execute_load_gamepak9_s16u# 0x09 gamepak unaligned - .long execute_load_gamepakA_s16u# 0x0A gamepak unaligned - .long execute_load_gamepakB_s16u# 0x0B gamepak unaligned - .long execute_load_gamepakC_s16u# 0x0C gamepak unaligned - .long execute_load_eeprom_s16u # 0x0D gamepak/eeprom unaligned - .long execute_load_backup_s16u # 0x0E Flash ROM/SRAM unaligned - .long execute_load_open_s16u # 0x0F open unaligned - -patch_load_s16: - patch_handler_align load_s16_ftable, 1 - - - -# Unsigned aligned 32bit load handlers - -execute_load_bios_u32: - region_check_align 0, 2, 0, patch_load_u32 - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f # if not, perform open read - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFF # generate offset - addu $2, $2, $4 - load_u32 bios_rom - -1: - lui $2, %hi(bios_read_protect) # generate upper address - load_u32 bios_read_protect - -2: - open_load32_core - nop - - -execute_load_ewram_u32: - translate_region_ewram_load_align 2, 0, patch_load_u32 - load_u32 (ewram + 0x8000) - -execute_load_u32: -execute_load_iwram_u32: - translate_region_align 3, 2, 0, patch_load_u32, (iwram + 0x8000), 0x7FFF - load_u32 (iwram + 0x8000) - -execute_load_io_u32: - translate_region_align 4, 2, 0, patch_load_u32, io_registers, 0x3FF - load_u32 io_registers - -execute_load_palette_u32: - translate_region_align 5, 2, 0, patch_load_u32, palette_ram, 0x3FF - load_u32 palette_ram - -execute_load_vram_u32: - translate_region_vram_load_align 2, 0, patch_load_u32 - load_u32 vram - -execute_load_oam_u32: - translate_region_align 7, 2, 0, patch_load_u32, oam_ram, 0x3FF - load_u32 oam_ram - -execute_load_gamepak8_u32: - translate_region_gamepak_align 8, 2, 0, patch_load_u32 - load_u32 0 - -execute_load_gamepak9_u32: - translate_region_gamepak_align 9, 2, 0, patch_load_u32 - load_u32 0 - -execute_load_gamepakA_u32: - translate_region_gamepak_align 10, 2, 0, patch_load_u32 - load_u32 0 - -execute_load_gamepakB_u32: - translate_region_gamepak_align 11, 2, 0, patch_load_u32 - load_u32 0 - -execute_load_gamepakC_u32: - translate_region_gamepak_align 12, 2, 0, patch_load_u32 - load_u32 0 - -execute_load_eeprom_u32: - eeprom_load_align 2, 0, patch_load_u32 - -execute_load_backup_u32: - backup_load_align 2, 0, patch_load_u32 - nop - -execute_load_open_u32: - open_load32_align 2, 0, patch_load_u32 - nop - - -# Unsigned unaligned (by 1) 32bit load handlers - -execute_load_bios_u32u1: - region_check_align 0, 2, 1, patch_load_u32 - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f # if not, perform open read - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFC # generate offset - addu $2, $2, $4 - load_u32_unaligned bios_rom, 1 - -1: - lui $2, %hi(bios_read_protect) # generate upper address - load_u32_unaligned bios_read_protect, 1 - -2: - open_load32_core - ror $2, $2, 8 - -execute_load_ewram_u32u1: - translate_region_ewram_load_align32 2, 1, patch_load_u32 - load_u32_unaligned (ewram + 0x8000), 1 - -execute_load_iwram_u32u1: - translate_region_align 3, 2, 1, patch_load_u32, (iwram + 0x8000), 0x7FFC - load_u32_unaligned (iwram + 0x8000), 1 - -execute_load_io_u32u1: - translate_region_align 4, 2, 1, patch_load_u32, io_registers, 0x3FC - load_u32_unaligned io_registers, 1 - -execute_load_palette_u32u1: - translate_region_align 5, 2, 1, patch_load_u32, palette_ram, 0x3FC - load_u32_unaligned palette_ram, 1 - -execute_load_vram_u32u1: - translate_region_vram_load_align32 2, 1, patch_load_u32 - load_u32_unaligned vram, 1 - -execute_load_oam_u32u1: - translate_region_align 7, 2, 1, patch_load_u32, oam_ram, 0x3FC - load_u32_unaligned oam_ram, 1 - -execute_load_gamepak8_u32u1: - translate_region_gamepak_align32 8, 2, 1, patch_load_u32 - load_u32_unaligned 0, 1 - -execute_load_gamepak9_u32u1: - translate_region_gamepak_align32 9, 2, 1, patch_load_u32 - load_u32_unaligned 0, 1 - -execute_load_gamepakA_u32u1: - translate_region_gamepak_align32 10, 2, 1, patch_load_u32 - load_u32_unaligned 0, 1 - -execute_load_gamepakB_u32u1: - translate_region_gamepak_align32 11, 2, 1, patch_load_u32 - load_u32_unaligned 0, 1 - -execute_load_gamepakC_u32u1: - translate_region_gamepak_align32 12, 2, 1, patch_load_u32 - load_u32_unaligned 0, 1 - -execute_load_eeprom_u32u1: - eeprom_load_align32 2, 1, patch_load_u32 - -execute_load_backup_u32u1: - backup_load_align32 2, 1, patch_load_u32 - ror $2, $2, 8 # rotate value by 8bits - -execute_load_open_u32u1: - open_load32_align32 2, 1, patch_load_u32 - ror $2, $2, 8 # rotate value by 8bits - - -# Unsigned unaligned (by 2) 32bit load handlers - -execute_load_bios_u32u2: - region_check_align 0, 2, 2, patch_load_u32 - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f # if not, perform open read - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFC # generate offset - addu $2, $2, $4 - load_u32_unaligned bios_rom, 2 - -1: - lui $2, %hi(bios_read_protect) # generate upper address - load_u32_unaligned bios_read_protect, 2 - -2: - open_load32_core - ror $2, $2, 16 - -execute_load_ewram_u32u2: - translate_region_ewram_load_align32 2, 2, patch_load_u32 - load_u32_unaligned (ewram + 0x8000), 2 - -execute_load_iwram_u32u2: - translate_region_align 3, 2, 2, patch_load_u32, (iwram + 0x8000), 0x7FFC - load_u32_unaligned (iwram + 0x8000), 2 - -execute_load_io_u32u2: - translate_region_align 4, 2, 2, patch_load_u32, io_registers, 0x3FC - load_u32_unaligned io_registers, 2 - -execute_load_palette_u32u2: - translate_region_align 5, 2, 2, patch_load_u32, palette_ram, 0x3FC - load_u32_unaligned palette_ram, 2 - -execute_load_vram_u32u2: - translate_region_vram_load_align32 2, 2, patch_load_u32 - load_u32_unaligned vram, 2 - -execute_load_oam_u32u2: - translate_region_align 7, 2, 2, patch_load_u32, oam_ram, 0x3FC - load_u32_unaligned oam_ram, 2 - -execute_load_gamepak8_u32u2: - translate_region_gamepak_align32 8, 2, 2, patch_load_u32 - load_u32_unaligned 0, 2 - -execute_load_gamepak9_u32u2: - translate_region_gamepak_align32 9, 2, 2, patch_load_u32 - load_u32_unaligned 0, 2 - -execute_load_gamepakA_u32u2: - translate_region_gamepak_align32 10, 2, 2, patch_load_u32 - load_u32_unaligned 0, 2 - -execute_load_gamepakB_u32u2: - translate_region_gamepak_align32 11, 2, 2, patch_load_u32 - load_u32_unaligned 0, 2 - -execute_load_gamepakC_u32u2: - translate_region_gamepak_align32 12, 2, 2, patch_load_u32 - load_u32_unaligned 0, 2 - -execute_load_eeprom_u32u2: - eeprom_load_align32 2, 2, patch_load_u32 - -execute_load_backup_u32u2: - backup_load_align32 2, 2, patch_load_u32 - ror $2, $2, 16 # rotate value by 16bits - -execute_load_open_u32u2: - open_load32_align32 2, 2, patch_load_u32 - ror $2, $2, 16 # rotate value by 16bits - -# Unsigned unaligned (by 1) 32bit load handlers - -execute_load_bios_u32u3: - region_check_align 0, 2, 3, patch_load_u32 - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f # if not, perform open read - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFC # generate offset - addu $2, $2, $4 - load_u32_unaligned bios_rom, 3 - -1: - lui $2, %hi(bios_read_protect) # generate upper address - load_u32_unaligned bios_read_protect, 3 - -2: - open_load32_core - ror $2, $2, 24 - -execute_load_ewram_u32u3: - translate_region_ewram_load_align32 2, 3, patch_load_u32 - load_u32_unaligned (ewram + 0x8000), 3 - -execute_load_iwram_u32u3: - translate_region_align 3, 2, 3, patch_load_u32, (iwram + 0x8000), 0x7FFC - load_u32_unaligned (iwram + 0x8000), 3 - -execute_load_io_u32u3: - translate_region_align 4, 2, 3, patch_load_u32, io_registers, 0x3FC - load_u32_unaligned io_registers, 3 - -execute_load_palette_u32u3: - translate_region_align 5, 2, 3, patch_load_u32, palette_ram, 0x3FC - load_u32_unaligned palette_ram, 3 - -execute_load_vram_u32u3: - translate_region_vram_load_align32 2, 3, patch_load_u32 - load_u32_unaligned vram, 3 - -execute_load_oam_u32u3: - translate_region_align 7, 2, 3, patch_load_u32, oam_ram, 0x3FC - load_u32_unaligned oam_ram, 3 - -execute_load_gamepak8_u32u3: - translate_region_gamepak_align32 8, 2, 3, patch_load_u32 - load_u32_unaligned 0, 3 - -execute_load_gamepak9_u32u3: - translate_region_gamepak_align32 9, 2, 3, patch_load_u32 - load_u32_unaligned 0, 3 - -execute_load_gamepakA_u32u3: - translate_region_gamepak_align32 10, 2, 3, patch_load_u32 - load_u32_unaligned 0, 3 - -execute_load_gamepakB_u32u3: - translate_region_gamepak_align32 11, 2, 3, patch_load_u32 - load_u32_unaligned 0, 3 - -execute_load_gamepakC_u32u3: - translate_region_gamepak_align32 12, 2, 3, patch_load_u32 - load_u32_unaligned 0, 3 - -execute_load_eeprom_u32u3: - eeprom_load_align32 2, 3, patch_load_u32 - -execute_load_backup_u32u3: - backup_load_align32 2, 3, patch_load_u32 - ror $2, $2, 24 # rotate value by 24bits - -execute_load_open_u32u3: - open_load32_align32 2, 3, patch_load_u32 - ror $2, $2, 24 # rotate value by 24bits - - -load_u32_ftable: - .long execute_load_bios_u32 # 0x00 BIOS - .long execute_load_open_u32 # 0x01 open address - .long execute_load_ewram_u32 # 0x02 EWRAM - .long execute_load_iwram_u32 # 0x03 IWRAM - .long execute_load_io_u32 # 0x04 I/O registers - .long execute_load_palette_u32 # 0x05 Palette RAM - .long execute_load_vram_u32 # 0x06 VRAM - .long execute_load_oam_u32 # 0x07 OAM RAM - .long execute_load_gamepak8_u32 # 0x08 gamepak - .long execute_load_gamepak9_u32 # 0x09 gamepak - .long execute_load_gamepakA_u32 # 0x0A gamepak - .long execute_load_gamepakB_u32 # 0x0B gamepak - .long execute_load_gamepakC_u32 # 0x0C gamepak - - .long execute_load_eeprom_u32 # 0x0D gamepak/eeprom - .long execute_load_backup_u32 # 0x0E Flash ROM/SRAM - .long execute_load_open_u32 # 0x0F open - - .long execute_load_bios_u32u1 # 0x00 BIOS unaligned (1b) - .long execute_load_open_u32u1 # 0x01 open address unaligned (1b) - .long execute_load_ewram_u32u1 # 0x02 EWRAM unaligned (1b) - .long execute_load_iwram_u32u1 # 0x03 IWRAM unaligned (1b) - .long execute_load_io_u32u1 # 0x04 I/O registers unaligned (1b) - .long execute_load_palette_u32u1 # 0x05 Palette RAM unaligned (1b) - .long execute_load_vram_u32u1 # 0x06 VRAM unaligned (1b) - .long execute_load_oam_u32u1 # 0x07 OAM RAM unaligned (1b) - .long execute_load_gamepak8_u32u1 # 0x08 gamepak unaligned (1b) - .long execute_load_gamepak9_u32u1 # 0x09 gamepak unaligned (1b) - .long execute_load_gamepakA_u32u1 # 0x0A gamepak unaligned (1b) - .long execute_load_gamepakB_u32u1 # 0x0B gamepak unaligned (1b) - .long execute_load_gamepakC_u32u1 # 0x0C gamepak unaligned (1b) - .long execute_load_eeprom_u32u1 # 0x0D gamepak/eeprom unaligned (1b) - .long execute_load_backup_u32u1 # 0x0E Flash ROM/SRAM unaligned (1b) - .long execute_load_open_u32u1 # 0x0F open unaligned (1b) - - .long execute_load_bios_u32u2 # 0x00 BIOS unaligned (2b) - .long execute_load_open_u32u2 # 0x01 open address unaligned (2b) - .long execute_load_ewram_u32u2 # 0x02 EWRAM unaligned (2b) - .long execute_load_iwram_u32u2 # 0x03 IWRAM unaligned (2b) - .long execute_load_io_u32u2 # 0x04 I/O registers unaligned (2b) - .long execute_load_palette_u32u2 # 0x05 Palette RAM unaligned (2b) - .long execute_load_vram_u32u2 # 0x06 VRAM unaligned (2b) - .long execute_load_oam_u32u2 # 0x07 OAM RAM unaligned (2b) - .long execute_load_gamepak8_u32u2 # 0x08 gamepak unaligned (2b) - .long execute_load_gamepak9_u32u2 # 0x09 gamepak unaligned (2b) - .long execute_load_gamepakA_u32u2 # 0x0A gamepak unaligned (2b) - .long execute_load_gamepakB_u32u2 # 0x0B gamepak unaligned (2b) - .long execute_load_gamepakC_u32u2 # 0x0C gamepak unaligned (2b) - .long execute_load_eeprom_u32u2 # 0x0D gamepak/eeprom unaligned (2b) - .long execute_load_backup_u32u2 # 0x0E Flash ROM/SRAM unaligned (2b) - .long execute_load_open_u32u2 # 0x0F open unaligned (2b) - - .long execute_load_bios_u32u3 # 0x00 BIOS unaligned (3b) - .long execute_load_open_u32u3 # 0x01 open address unaligned (3b) - .long execute_load_ewram_u32u3 # 0x02 EWRAM unaligned (3b) - .long execute_load_iwram_u32u3 # 0x03 IWRAM unaligned (3b) - .long execute_load_io_u32u3 # 0x04 I/O registers unaligned (3b) - .long execute_load_palette_u32u3 # 0x05 Palette RAM unaligned (3b) - .long execute_load_vram_u32u3 # 0x06 VRAM unaligned (3b) - .long execute_load_oam_u32u3 # 0x07 OAM RAM unaligned (3b) - .long execute_load_gamepak8_u32u3 # 0x08 gamepak unaligned (3b) - .long execute_load_gamepak9_u32u3 # 0x09 gamepak unaligned (3b) - .long execute_load_gamepakA_u32u3 # 0x0A gamepak unaligned (3b) - .long execute_load_gamepakB_u32u3 # 0x0B gamepak unaligned (3b) - .long execute_load_gamepakC_u32u3 # 0x0C gamepak unaligned (3b) - .long execute_load_eeprom_u32u3 # 0x0D gamepak/eeprom unaligned (3b) - .long execute_load_backup_u32u3 # 0x0E Flash ROM/SRAM unaligned (3b) - .long execute_load_open_u32u3 # 0x0F open unaligned (3b) - -patch_load_u32: - patch_handler_align load_u32_ftable, 2 - - - -# Unsigned always aligned 32bit load handlers - -execute_load_bios_u32a: - region_check 0, patch_load_u32a - srl $2, $4, 14 # check if address is in BIOS region - bne $2, $0, 2f # if not, perform open read - srl $1, $5, 14 # check if PC is in BIOS region - bne $1, $0, 1f # if not, perform BIOS protected read - lui $2, %hi(bios_rom) # generate upper address (delay) - - andi $4, $4, 0x3FFF # generate offset - addu $2, $2, $4 - load_u32 bios_rom - -1: - lui $2, %hi(bios_read_protect) # generate upper address - load_u32 bios_read_protect - -2: - open_load32_a - nop - -execute_load_ewram_u32a: - translate_region_ewram patch_load_u32a - load_u32 (ewram + 0x8000) - -execute_aligned_load32: -execute_load_iwram_u32a: - translate_region 3, patch_load_u32a, (iwram + 0x8000), 0x7FFF - load_u32 (iwram + 0x8000) - -execute_load_io_u32a: - translate_region 4, patch_load_u32a, io_registers, 0x3FF - load_u32 io_registers - -execute_load_palette_u32a: - translate_region 5, patch_load_u32a, palette_ram, 0x3FF - load_u32 palette_ram - -execute_load_vram_u32a: - translate_region_vram patch_load_u32a - load_u32 vram - -execute_load_oam_u32a: - translate_region 7, patch_load_u32a, oam_ram, 0x3FF - load_u32 oam_ram - -execute_load_gamepak8_u32a: - translate_region_gamepak_a 8, patch_load_u32a - load_u32 0 - -execute_load_gamepak9_u32a: - translate_region_gamepak_a 9, patch_load_u32a - load_u32 0 - -execute_load_gamepakA_u32a: - translate_region_gamepak_a 10, patch_load_u32a - load_u32 0 - -execute_load_gamepakB_u32a: - translate_region_gamepak_a 11, patch_load_u32a - load_u32 0 - -execute_load_gamepakC_u32a: - translate_region_gamepak_a 12, patch_load_u32a - load_u32 0 - -execute_load_eeprom_u32a: - eeprom_load_a patch_load_u32a - -execute_load_backup_u32a: - backup_load_a patch_load_u32a - nop - -execute_load_open_u32a: - open_load32_a patch_load_u32a - -load_u32a_ftable: - .long execute_load_bios_u32a # 0x00 BIOS unaligned (3b) - .long execute_load_open_u32a # 0x01 open address unaligned (3b) - .long execute_load_ewram_u32a # 0x02 EWRAM unaligned (3b) - .long execute_load_iwram_u32a # 0x03 IWRAM unaligned (3b) - .long execute_load_io_u32a # 0x04 I/O registers unaligned (3b) - .long execute_load_palette_u32a # 0x05 Palette RAM unaligned (3b) - .long execute_load_vram_u32a # 0x06 VRAM unaligned (3b) - .long execute_load_oam_u32a # 0x07 OAM RAM unaligned (3b) - .long execute_load_gamepak8_u32a # 0x08 gamepak unaligned (3b) - .long execute_load_gamepak9_u32a # 0x09 gamepak unaligned (3b) - .long execute_load_gamepakA_u32a # 0x0A gamepak unaligned (3b) - .long execute_load_gamepakB_u32a # 0x0B gamepak unaligned (3b) - .long execute_load_gamepakC_u32a # 0x0C gamepak unaligned (3b) - .long execute_load_eeprom_u32a # 0x0D gamepak/eeprom unaligned (3b) - .long execute_load_backup_u32a # 0x0E Flash ROM/SRAM unaligned (3b) - .long execute_load_open_u32a # 0x0F open unaligned (3b) - -patch_load_u32a: - patch_handler load_u32a_ftable, 1 - - -# Unsigned 8bit store handlers - -execute_store_ignore0_u8: - ignore_region 0, patch_store_u8 - -execute_store_ignore1_u8: - ignore_region 1, patch_store_u8 - -execute_store_ewram_u8: - translate_region_ewram patch_store_u8 - store_u8_smc (ewram + 0x8000) - -execute_store_u8: -execute_store_iwram_u8: - translate_region 3, patch_store_u8, (iwram + 0x8000), 0x7FFF - store_u8_smc (iwram + 0x8000) - -execute_store_io_u8: - region_check 4, patch_store_u8 - andi $5, $5, 0xFF # make value 8bit - andi $4, $4, 0x3FF # wrap around address - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) - - save_registers - jal write_io_register8 # write the value out - sw $6, REG_PC($16) # save the PC (delay slot) - j write_io_epilogue # handle any state changes - nop - -execute_store_palette_u8: - region_check 5, patch_store_u8 - lui $2, %hi(palette_ram) # start loading palette_ram address (delay) - ins $5, $5, 8, 8 # double value - andi $4, $4, 0x3FE # align palette address - addu $2, $2, $4 - sh $5, %lo(palette_ram)($2) # palette_ram[address] = value - sll $1, $5, 1 # make green 6bits - ins $1, $0, 0, 6 # make bottom bit 0 - ins $1, $5, 0, 5 # insert red channel into $1 - lui $2, %hi(palette_ram_converted) - addu $2, $2, $4 - jr $ra # return - sh $1, %lo(palette_ram_converted)($2) - -execute_store_vram_u8: - translate_region_vram_store_align16 patch_store_u8 - store_u8_double vram - -execute_store_oam_u8: - translate_region 7, patch_store_u8, oam_ram, 0x3FE - lui $1, %hi(oam_update) # write non-zero to oam_update - sw $1, %lo(oam_update)($1) # cheap, but this is non-zero - store_u8_double oam_ram - -execute_store_ignore8_u8: - ignore_region 8, patch_store_u8 - -execute_store_ignore9_u8: - ignore_region 9, patch_store_u8 - -execute_store_ignoreA_u8: - ignore_region 10, patch_store_u8 - -execute_store_ignoreB_u8: - ignore_region 11, patch_store_u8 - -execute_store_ignoreC_u8: - ignore_region 12, patch_store_u8 - -execute_store_eeprom_u8: - store_function write_eeprom, 13, patch_store_u8, 0x3FF - -execute_store_backup_u8: - store_function write_backup, 14, patch_store_u8, 0xFFFF - -execute_store_ignoreF_u8: - ignore_high patch_store_u8 - -store_u8_ftable: - .long execute_store_ignore0_u8 # 0x00 BIOS - .long execute_store_ignore1_u8 # 0x01 open address - .long execute_store_ewram_u8 # 0x02 EWRAM - .long execute_store_iwram_u8 # 0x03 IWRAM - .long execute_store_io_u8 # 0x04 I/O registers - .long execute_store_palette_u8 # 0x05 Palette RAM - .long execute_store_vram_u8 # 0x06 VRAM - .long execute_store_oam_u8 # 0x07 OAM RAM - .long execute_store_ignore8_u8 # 0x08 gamepak - .long execute_store_ignore9_u8 # 0x09 gamepak - .long execute_store_ignoreA_u8 # 0x0A gamepak - .long execute_store_ignoreB_u8 # 0x0B gamepak - .long execute_store_ignoreC_u8 # 0x0C gamepak - .long execute_store_eeprom_u8 # 0x0D gamepak/eeprom - .long execute_store_backup_u8 # 0x0E Flash ROM/SRAM - .long execute_store_ignoreF_u8 # 0x0F open address - -patch_store_u8: - patch_handler store_u8_ftable, 0x0F - - -# Unsigned 16bit store handlers - -execute_store_ignore0_u16: - ignore_region 0, patch_store_u16 - -execute_store_ignore1_u16: - ignore_region 1, patch_store_u16 - -execute_store_ewram_u16: - translate_region_ewram_store_align16 patch_store_u16 - store_u16_smc (ewram + 0x8000) - -execute_store_u16: -execute_store_iwram_u16: - translate_region 3, patch_store_u16, (iwram + 0x8000), 0x7FFE - store_u16_smc (iwram + 0x8000) - -execute_store_io_u16: - region_check 4, patch_store_u16 - andi $5, $5, 0xFFFF # make value 16bit - andi $4, $4, 0x3FE # wrap around/align address - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) - - save_registers - jal write_io_register16 # write the value out - sw $6, REG_PC($16) # save the PC (delay slot) - j write_io_epilogue # handle any state changes - nop - -execute_store_palette_u16: - region_check 5, patch_store_u16 - lui $2, %hi(palette_ram) # start loading palette_ram address (delay) - andi $4, $4, 0x3FE # wrap/align palette address - addu $2, $2, $4 - sh $5, %lo(palette_ram)($2) # palette_ram[address] = value - sll $1, $5, 1 # make green 6bits - ins $1, $0, 0, 6 # make bottom bit 0 - ins $1, $5, 0, 5 # insert red channel into $1 - lui $2, %hi(palette_ram_converted) - addu $2, $2, $4 - jr $ra # return - sh $1, %lo(palette_ram_converted)($2) - -execute_store_vram_u16: - translate_region_vram_store_align16 patch_store_u16 - store_u16 vram - -execute_store_oam_u16: - translate_region 7, patch_store_u16, oam_ram, 0x3FE - lui $1, %hi(oam_update) # write non-zero to oam_update - sw $1, %lo(oam_update)($1) # cheap, but this is non-zero - store_u16 oam_ram - -execute_store_rtc_u16: - store_function write_rtc, 8, patch_store_u16, 0xFE - -execute_store_ignore9_u16: - ignore_region 9, patch_store_u16 - -execute_store_ignoreA_u16: - ignore_region 10, patch_store_u16 - -execute_store_ignoreB_u16: - ignore_region 11, patch_store_u16 - -execute_store_ignoreC_u16: - ignore_region 12, patch_store_u16 - -execute_store_eeprom_u16: - store_function write_eeprom, 13, patch_store_u16, 0x3FE - -execute_store_ignoreE_u16: - ignore_region 14, patch_store_u16 - -execute_store_ignoreF_u16: - ignore_high patch_store_u16 - -store_u16_ftable: - .long execute_store_ignore0_u16 # 0x00 BIOS - .long execute_store_ignore1_u16 # 0x01 open address - .long execute_store_ewram_u16 # 0x02 EWRAM - .long execute_store_iwram_u16 # 0x03 IWRAM - .long execute_store_io_u16 # 0x04 I/O registers - .long execute_store_palette_u16 # 0x05 Palette RAM - .long execute_store_vram_u16 # 0x06 VRAM - .long execute_store_oam_u16 # 0x07 OAM RAM - .long execute_store_rtc_u16 # 0x08 gamepak - .long execute_store_ignore9_u16 # 0x09 gamepak - .long execute_store_ignoreA_u16 # 0x0A gamepak - .long execute_store_ignoreB_u16 # 0x0B gamepak - .long execute_store_ignoreC_u16 # 0x0C gamepak - .long execute_store_eeprom_u16 # 0x0D gamepak/eeprom - .long execute_store_ignoreE_u16 # 0x0E Flash ROM/SRAM - .long execute_store_ignoreF_u16 # 0x0F open address - - -patch_store_u16: - patch_handler store_u16_ftable, 0x0F - - - - -# Unsigned 32bit store handlers - -execute_store_ignore0_u32: - ignore_region 0, patch_store_u32 - -execute_store_ignore1_u32: - ignore_region 1, patch_store_u32 - -execute_store_ewram_u32: - translate_region_ewram_store_align32 patch_store_u32 - store_u32_smc (ewram + 0x8000) - -execute_store_u32: -execute_store_iwram_u32: - translate_region 3, patch_store_u32, (iwram + 0x8000), 0x7FFC - store_u32_smc (iwram + 0x8000) - -execute_store_io_u32: - region_check 4, patch_store_u32 - nop - andi $4, $4, 0x3FC # wrap around/align address - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) - - save_registers - jal write_io_register32 # write the value out - sw $6, REG_PC($16) # save the PC (delay slot) - j write_io_epilogue # handle any state changes - nop - -execute_store_palette_u32: - region_check 5, patch_store_u32 - lui $2, %hi(palette_ram) # start loading palette_ram address (delay) - andi $4, $4, 0x3FC # wrap/align palette address - addu $2, $2, $4 - sw $5, %lo(palette_ram)($2) # palette_ram[address] = value - - sll $1, $5, 1 # make green 6bits - ins $1, $0, 0, 6 # make bottom bit 0 - ins $1, $5, 0, 5 # insert red channel into $1 - lui $2, %hi(palette_ram_converted) - addu $2, $2, $4 - addiu $2, $2, %lo(palette_ram_converted) - sh $1, ($2) - - srl $5, $5, 16 # shift down to next palette value - sll $1, $5, 1 # make green 6bits - ins $1, $0, 0, 6 # make bottom bit 0 - ins $1, $5, 0, 5 # insert red channel into $1 - - jr $ra # return - sh $1, 2($2) - -execute_store_vram_u32: - translate_region_vram_store_align32 patch_store_u32 - store_u32 vram - -execute_store_oam_u32: - translate_region 7, patch_store_u32, oam_ram, 0x3FC - lui $1, %hi(oam_update) # write non-zero to oam_update - sw $1, %lo(oam_update)($1) # cheap, but this is non-zero - store_u32 oam_ram - -execute_store_ignore8_u32: - ignore_region 8, patch_store_u32 - -execute_store_ignore9_u32: - ignore_region 9, patch_store_u32 - -execute_store_ignoreA_u32: - ignore_region 10, patch_store_u32 - -execute_store_ignoreB_u32: - ignore_region 11, patch_store_u32 - -execute_store_ignoreC_u32: - ignore_region 12, patch_store_u32 - -execute_store_eeprom_u32: - store_function write_eeprom, 13, patch_store_u32, 0x3FC - -execute_store_ignoreE_u32: - ignore_region 14, patch_store_u32 - -execute_store_ignoreF_u32: - ignore_high patch_store_u32 - -store_u32_ftable: - .long execute_store_ignore0_u32 # 0x00 BIOS - .long execute_store_ignore1_u32 # 0x01 open address - .long execute_store_ewram_u32 # 0x02 EWRAM - .long execute_store_iwram_u32 # 0x03 IWRAM - .long execute_store_io_u32 # 0x04 I/O registers - .long execute_store_palette_u32 # 0x05 Palette RAM - .long execute_store_vram_u32 # 0x06 VRAM - .long execute_store_oam_u32 # 0x07 OAM RAM - .long execute_store_ignore8_u32 # 0x08 gamepak - .long execute_store_ignore9_u32 # 0x09 gamepak - .long execute_store_ignoreA_u32 # 0x0A gamepak - .long execute_store_ignoreB_u32 # 0x0B gamepak - .long execute_store_ignoreC_u32 # 0x0C gamepak - .long execute_store_eeprom_u32 # 0x0D gamepak/eeprom - .long execute_store_ignoreE_u32 # 0x0E Flash ROM/SRAM - .long execute_store_ignoreF_u32 # 0x0F open address - - -patch_store_u32: - patch_handler store_u32_ftable, 0x0F - - - -# Unsigned always aligned, a2 safe 32bit store handlers - -execute_store_ignore0_u32a: - ignore_region 0, patch_store_u32a - -execute_store_ignore1_u32a: - ignore_region 1, patch_store_u32a - -execute_store_ewram_u32a: - translate_region_ewram_store_align32 patch_store_u32a - store_u32 (ewram + 0x8000) - -execute_aligned_store32: -execute_store_iwram_u32a: - translate_region 3, patch_store_u32a, (iwram + 0x8000), 0x7FFC - store_u32 (iwram + 0x8000) - -execute_store_io_u32a: - region_check 4, patch_store_u32a - nop - sw $6, REG_SAVE($16) # save a2 - sw $ra, REG_SAVE2($16) # save ra - - andi $4, $4, 0x3FC # wrap around/align address - - save_registers - jal write_io_register32 # write the value out - nop - - restore_registers - - lw $ra, REG_SAVE2($16) # restore ra - jr $ra - lw $6, REG_SAVE($16) # restore a2 - -execute_store_palette_u32a: - region_check 5, patch_store_u32a - lui $2, %hi(palette_ram) # start loading palette_ram address (delay) - andi $4, $4, 0x3FC # wrap/align palette address - addu $2, $2, $4 - sw $5, %lo(palette_ram)($2) # palette_ram[address] = value - - sll $1, $5, 1 # make green 6bits - ins $1, $0, 0, 6 # make bottom bit 0 - ins $1, $5, 0, 5 # insert red channel into $1 - lui $2, %hi(palette_ram_converted) - addu $2, $2, $4 - addiu $2, $2, %lo(palette_ram_converted) - sh $1, ($2) - - srl $5, $5, 16 # shift down to next palette value - sll $1, $5, 1 # make green 6bits - ins $1, $0, 0, 6 # make bottom bit 0 - ins $1, $5, 0, 5 # insert red channel into $1 - - jr $ra # return - sh $1, 2($2) - -execute_store_vram_u32a: - translate_region_vram_store_align32 patch_store_u32a - store_u32 vram - -execute_store_oam_u32a: - translate_region 7, patch_store_u32a, oam_ram, 0x3FC - lui $1, %hi(oam_update) # write non-zero to oam_update - sw $1, %lo(oam_update)($1) # cheap, but this is non-zero - store_u32 oam_ram - -execute_store_ignore8_u32a: - ignore_region 8, patch_store_u32a - -execute_store_ignore9_u32a: - ignore_region 9, patch_store_u32a - -execute_store_ignoreA_u32a: - ignore_region 10, patch_store_u32a - -execute_store_ignoreB_u32a: - ignore_region 11, patch_store_u32a - -execute_store_ignoreC_u32a: - ignore_region 12, patch_store_u32a - -execute_store_eeprom_u32a: - store_function_a write_eeprom, 13, patch_store_u32a, 0x3FC - -execute_store_ignoreE_u32a: - ignore_region 14, patch_store_u32a - -execute_store_ignoreF_u32a: - ignore_high patch_store_u32a - -store_u32a_ftable: - .long execute_store_ignore0_u32a# 0x00 BIOS - .long execute_store_ignore1_u32a# 0x01 open address - .long execute_store_ewram_u32a # 0x02 EWRAM - .long execute_store_iwram_u32a # 0x03 IWRAM - .long execute_store_io_u32a # 0x04 I/O registers - .long execute_store_palette_u32a# 0x05 Palette RAM - .long execute_store_vram_u32a # 0x06 VRAM - .long execute_store_oam_u32a # 0x07 OAM RAM - .long execute_store_ignore8_u32a# 0x08 gamepak - .long execute_store_ignore9_u32a# 0x09 gamepak - .long execute_store_ignoreA_u32a# 0x0A gamepak - .long execute_store_ignoreB_u32a# 0x0B gamepak - .long execute_store_ignoreC_u32a# 0x0C gamepak - .long execute_store_eeprom_u32a # 0x0D gamepak/eeprom - .long execute_store_ignoreE_u32a# 0x0E Flash ROM/SRAM - .long execute_store_ignoreF_u32a# 0x0F open address - -patch_store_u32a: - patch_handler store_u32a_ftable, 0x0F - - - -#execute_load_u8: -execute_load_full_u8: - srl $1, $4, 28 # check if the address is out of range - bne $1, $0, ext_load_u8 # if it is, perform an extended read - srl $2, $4, 15 # $1 = page number of address - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($2) - beq $1, $0, ext_load_u8 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lbu $2, ($1) # read the value - -ext_load_u8: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) # store return address - save_registers - jal read_memory8 # read the value - nop - restore_registers - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 4 # fix stack (delay slot) - -#execute_load_s8: -execute_load_full_s8: - srl $1, $4, 28 # check if the address is out of range - bne $1, $0, ext_load_s8 # if it is, perform an extended read - srl $2, $4, 15 # $1 = page number of address - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($2) - beq $1, $0, ext_load_s8 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lb $2, ($1) # read the value - -ext_load_s8: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) # store return address - save_registers - jal read_memory8 # read the value - nop - restore_registers - seb $2, $2 # sign extend the read value - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 4 # fix stack (delay slot) - -#execute_load_u16: -execute_load_full_u16: - srl $1, $4, 28 # check if the address is out of range - ins $1, $4, 4, 1 # or unaligned (bottom bit) - bne $1, $0, ext_load_u16 # if it is, perform an extended read - srl $2, $4, 15 # $1 = page number of address - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($2) - beq $1, $0, ext_load_u16 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lhu $2, ($1) # read the value - -ext_load_u16: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) # store return address - save_registers - jal read_memory16 # read the value - nop - restore_registers - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 4 # fix stack (delay slot) - -#execute_load_s16: -execute_load_full_s16: - srl $1, $4, 28 # check if the address is out of range - ins $1, $4, 4, 1 # or unaligned (bottom bit) - bne $1, $0, ext_load_s16 # if it is, perform an extended read - srl $2, $4, 15 # $1 = page number of address - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($2) - beq $1, $0, ext_load_s16 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lh $2, ($1) # read the value - -ext_load_s16: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) # store return address - save_registers - jal read_memory16_signed # read the value - nop - restore_registers - seh $2, $2 # sign extend the return value - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 4 # fix stack (delay slot) - -#execute_load_u32: -execute_load_full_u32: - srl $1, $4, 28 # check if the address is out of range - ins $1, $4, 4, 2 # or unaligned (bottom two bits) - bne $1, $0, ext_load_u32 # if it is, perform an extended read - srl $2, $4, 15 # $1 = page number of address - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($2) - beq $1, $0, ext_load_u32 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lw $2, ($1) # read the value - -ext_load_u32: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) # store return address - save_registers - jal read_memory32 # read the value - nop - restore_registers - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 4 # fix stack (delay slot) - -#execute_aligned_load32: - srl $2, $4, 28 # check if the address is out of range - bne $2, $0, ext_aligned_load32 # if it is, perform an extended load - srl $1, $4, 15 # $1 = page number of address - sll $1, $1, 2 # adjust to word index - addu $1, $1, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($1) - beq $1, $0, ext_aligned_load32 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lw $2, ($1) # read the value - -ext_aligned_load32: - addiu $sp, $sp, -8 # make room on the stack for $ra - sw $6, 4($sp) - sw $ra, ($sp) # store return address - save_registers - jal read_memory32 # read the value - nop - restore_registers - lw $6, 4($sp) - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 8 # fix stack (delay slot) - -# General ext memory routines - -ext_store_ignore: - jr $ra # ignore these writes - nop - -write_io_epilogue: - beq $2, $0, no_alert # 0 means nothing happened - addiu $4, $2, -2 # see if return value is 2 (delay slot) - beq $4, $0, smc_dma # is it an SMC alert? (return value = 2) - nop - addiu $4, $2, -3 # see if return value is 3 - beq $4, $0, irq_alert # is it an IRQ alert? (return value = 3) - nop - collapse_flags # make sure flags are good for update_gba - -alert_loop: - jal update_gba # process the next event - nop - lw $1, CPU_HALT_STATE($16) # check if CPU is sleeping - bne $1, $0, alert_loop # see if it hasn't changed - nop - - addu $17, $2, $0 # $17 = new cycle counter - lw $4, REG_PC($16) # $4 = new PC - - j lookup_pc - addiu $sp, $sp, 4 # fix the stack (delay slot) - -irq_alert: - restore_registers - j lookup_pc # PC has changed, get a new one - addiu $sp, $sp, 4 # fix the stack - -no_alert: - restore_registers - lw $ra, ($sp) # restore return address - jr $ra # we can return - addiu $sp, $sp, 4 # fix the stack - -smc_dma: - addiu $sp, $sp, 4 # fix the stack - jal flush_translation_cache_ram # flush translation cache - nop - j lookup_pc - nop - - -ext_store_eeprom: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) - save_registers - jal write_eeprom # write the value out - sw $6, REG_PC($16) # save the PC (delay slot) - restore_registers - lw $ra, ($sp) # restore return address - jr $ra # we can return - addiu $sp, $sp, 4 # fix the stack - - -# 8bit ext memory routines - -ext_store_io8: - andi $5, $5, 0xFF # make value 8bit - andi $4, $4, 0x3FF # wrap around address - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) - save_registers - jal write_io_register8 # write the value out - sw $6, REG_PC($16) # save the PC (delay slot) - j write_io_epilogue # handle any state changes - nop - -ext_store_palette8: - j ext_store_palette16b # perform 16bit palette write - andi $4, $4, 0x3FE # wrap + align (delay) - -ext_store_vram8: - ins $5, $5, 8, 8 # value = (value << 8) | value - ext $4, $4, 0, 17 # address = adress & 0x1FFFF - ins $4, $0, 0, 1 # align out bottom bit - lui $1, %hi(0x18000) # $1 = 0x18000 - sltu $1, $4, $1 # see if address < 0x18000 - bne $1, $0, ext_store_vram8b - lui $2, %hi(vram) # start loading vram address (delay) - - addiu $4, $4, -0x8000 # move address into VRAM region - -ext_store_vram8b: - addu $2, $2, $4 # $2 = (hi)vram + address - jr $ra # return - sh $5, %lo(vram)($2) # vram[address] = value (delay) - -ext_store_oam8: - lui $1, %hi(oam_update) # $1 = oam_update - addiu $1, %lo(oam_update) - li $2, 1 # $2 = 1 - sw $2, ($1) # *oam_update = 1 - andi $4, $4, 0x3FE # wrap around address and align to 16bits - ins $5, $5, 8, 8 # value = (value << 8) | value - lui $1, %hi(oam_ram) # $1 = (hi)oam_ram - addu $1, $1, $4 # $1 = (hi)oam_ram + address - jr $ra # return - sh $5, %lo(oam_ram)($1) # oam_ram[address] = value (delay) - -ext_store_backup: - andi $5, $5, 0xFF # make value 8bit - andi $4, $4, 0xFFFF # mask value - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) - save_registers - jal write_backup # write the value out - sw $6, REG_PC($16) # save the PC (delay slot) - restore_registers - lw $ra, ($sp) # restore return address - jr $ra # we can return - addiu $sp, $sp, 4 # fix the stack - -ext_store_u8_jtable: - .long ext_store_ignore # 0x00 BIOS - .long ext_store_ignore # 0x01 invalid - .long ext_store_ignore # 0x02 EWRAM - .long ext_store_ignore # 0x03 IWRAM - .long ext_store_io8 # 0x04 I/O registers - .long ext_store_palette8 # 0x05 Palette RAM - .long ext_store_vram8 # 0x06 VRAM - .long ext_store_oam8 # 0x07 OAM RAM - .long ext_store_ignore # 0x08 gamepak (no RTC accepted in 8bit) - .long ext_store_ignore # 0x09 gamepak, ignore - .long ext_store_ignore # 0x0A gamepak, ignore - .long ext_store_ignore # 0x0B gamepak, ignore - .long ext_store_ignore # 0x0C gamepak, ignore - .long ext_store_eeprom # 0x0D EEPROM (possibly) - .long ext_store_backup # 0x0E Flash ROM/SRAM - .long ext_store_ignore # 0x0F invalid - - - -ext_store_u8: - srl $1, $4, 24 # $1 = address >> 24 - sltu $2, $1, 16 # check if the value is out of range - beq $2, $0, ext_store_ignore - sll $1, $1, 2 # make address word indexed (delay) - lui $2, %hi(ext_store_u8_jtable) - addu $2, $2, $1 - # $2 = ext_store_u8_jtable[address >> 24] - lw $2, %lo(ext_store_u8_jtable)($2) - jr $2 # jump to table location - nop - -# $4: address to write to -# $5: value to write -# $6: current PC - -#execute_store_u8: - srl $1, $4, 28 # check if the address is out of range - bne $1, $0, ext_store_u8 # if it is, perform an extended write - srl $2, $4, 15 # $1 = page number of address (delay slot) - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 - lw $1, 256($2) # $1 = memory_map_write[address >> 15] - beq $1, $0, ext_store_u8 # if it's NULL perform an extended write - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - lb $2, -32768($1) # load the SMC status - bne $2, $0, smc_write # is there code there? - sb $5, ($1) # store the value (delay slot) - jr $ra # return - nop - -# 16bit ext memory routines - -ext_store_io16: - andi $4, $4, 0x3FF # wrap around address - andi $5, $5, 0xFFFF # make value 16bit - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) - save_registers - jal write_io_register16 # write the value out - sw $6, REG_PC($16) # save the PC (delay slot) - j write_io_epilogue # handle any state changes - nop - -ext_store_palette16: - andi $4, 0x3FF # wrap address - -ext_store_palette16b: - lui $2, %hi(palette_ram) - addu $2, $2, $4 - sh $5, %lo(palette_ram)($2) # palette_ram[address] = value - sll $1, $5, 1 # make green 6bits - ins $1, $0, 0, 6 # make bottom bit 0 - ins $1, $5, 0, 5 # insert red channel into $1 - lui $2, %hi(palette_ram_converted) - addu $2, $2, $4 - jr $ra # return - sh $1, %lo(palette_ram_converted)($2) - -ext_store_vram16: - ext $4, $4, 0, 17 # address = adress & 0x1FFFF - lui $1, %hi(0x18000) # $1 = 0x18000 - sltu $1, $4, $1 # see if address < 0x18000 - bne $1, $0, ext_store_vram16b - lui $2, %hi(vram) # start loading vram address (delay) - - addiu $4, $4, -0x8000 # move address into VRAM region - -ext_store_vram16b: - addu $2, $2, $4 # $2 = (hi)vram + address - jr $ra # return - sh $5, %lo(vram)($2) # vram[address] = value (delay) - -ext_store_oam16: - lui $1, %hi(oam_update) # $1 = oam_update - addiu $1, %lo(oam_update) - li $2, 1 # $2 = 1 - sw $2, ($1) # *oam_update = 1 - andi $4, $4, 0x3FF # wrap around address - lui $1, %hi(oam_ram) # $1 = (hi)oam_ram - addu $1, $1, $4 # $1 = (hi)oam_ram + address - jr $ra # return - sh $5, %lo(oam_ram)($1) # oam_ram[address] = value (delay) - -ext_store_rtc: - andi $5, $5, 0xFFFF # make value 16bit - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) - save_registers - jal write_rtc # write the value out - sw $6, REG_PC($16) # save the PC (delay slot) - restore_registers - lw $ra, ($sp) # restore return address - jr $ra # we can return - addiu $sp, $sp, 4 # fix the stack - -ext_store_u16_jtable: - .long ext_store_ignore # 0x00 BIOS, ignore - .long ext_store_ignore # 0x01 invalid, ignore - .long ext_store_ignore # 0x02 EWRAM, should have been hit already - .long ext_store_ignore # 0x03 IWRAM, should have been hit already - .long ext_store_io16 # 0x04 I/O registers - .long ext_store_palette16 # 0x05 Palette RAM - .long ext_store_vram16 # 0x06 VRAM - .long ext_store_oam16 # 0x07 OAM RAM - .long ext_store_rtc # 0x08 gamepak, RTC - .long ext_store_ignore # 0x09 gamepak, ignore - .long ext_store_ignore # 0x0A gamepak, ignore - .long ext_store_ignore # 0x0B gamepak, ignore - .long ext_store_ignore # 0x0C gamepak, ignore - .long ext_store_eeprom # 0x0D EEPROM (possibly) - .long ext_store_ignore # 0x0E Flash ROM/SRAM - -ext_store_u16: - srl $1, $4, 24 # $1 = address >> 24 - sltu $2, $1, 16 # check if the value is out of range - beq $2, $0, ext_store_ignore - sll $1, $1, 2 # make address word indexed (delay) - lui $2, %hi(ext_store_u16_jtable) - addu $2, $2, $1 - # $2 = ext_store_u16_jtable[address >> 24] - lw $2, %lo(ext_store_u16_jtable)($2) - jr $2 # jump to table location - nop - - -#execute_store_u16: - srl $1, $4, 28 # check if the address is out of range - bne $1, $0, ext_store_u16 # if it is, perform an extended write - srl $2, $4, 15 # $1 = page number of address (delay slot) - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 - lw $1, 256($2) # $1 = memory_map_write[address >> 15] - beq $1, $0, ext_store_u16 # if it's NULL perform an extended write - andi $2, $4, 0x7FFE # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - lh $2, -32768($1) # load the SMC status - bne $2, $0, smc_write # is there code there? - sh $5, ($1) # store the value (delay slot) - jr $ra # return - nop - - - - - - - - -# 32bit ext memory routines - -ext_store_io32: - andi $4, $4, 0x3FF # wrap around address - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) - save_registers - jal write_io_register32 # write the value out - sw $6, REG_PC($16) # save the PC (delay slot) - j write_io_epilogue # handle any state changes - nop - -ext_store_palette32: - addu $6, $ra, $0 # save return address in $6 - jal ext_store_palette16b # write out palette entry - andi $4, 0x3FF # wrap address (delay) - addiu $4, $4, 2 # go to next location - srl $5, $5, 16 # shift to next 16bit value - j ext_store_palette16b # write out next palette entry - addu $ra, $6, $0 # restore return address (delay) - -ext_store_vram32: - ext $4, $4, 0, 17 # address = adress & 0x1FFFF - lui $1, %hi(0x18000) # $1 = 0x18000 - sltu $1, $4, $1 # see if address < 0x18000 - bne $1, $0, ext_store_vram32b - lui $2, %hi(vram) # start loading vram address (delay) - - addiu $4, $4, -0x8000 # move address into VRAM region - -ext_store_vram32b: - addu $2, $2, $4 # $2 = (hi)vram + address - jr $ra # return - sw $5, %lo(vram)($2) # vram[address] = value (delay) - -ext_store_oam32: - lui $1, %hi(oam_update) # $1 = oam_update - addiu $1, %lo(oam_update) - li $2, 1 # $2 = 1 - sw $2, ($1) # *oam_update = 1 - andi $4, $4, 0x3FF # wrap around address - lui $1, %hi(oam_ram) # $1 = (hi)oam_ram - addu $1, $1, $4 # $1 = (hi)oam_ram + address - jr $ra # return - sw $5, %lo(oam_ram)($1) # oam_ram[address] = value (delay) - -ext_store_u32_jtable: - .long ext_store_ignore # 0x00 BIOS, ignore - .long ext_store_ignore # 0x01 invalid, ignore - .long ext_store_ignore # 0x02 EWRAM, should have been hit already - .long ext_store_ignore # 0x03 IWRAM, should have been hit already - .long ext_store_io32 # 0x04 I/O registers - .long ext_store_palette32 # 0x05 Palette RAM - .long ext_store_vram32 # 0x06 VRAM - .long ext_store_oam32 # 0x07 OAM RAM - .long ext_store_ignore # 0x08 gamepak, ignore - .long ext_store_ignore # 0x09 gamepak, ignore - .long ext_store_ignore # 0x0A gamepak, ignore - .long ext_store_ignore # 0x0B gamepak, ignore - .long ext_store_ignore # 0x0C gamepak, ignore - .long ext_store_eeprom # 0x0D EEPROM (possibly) - .long ext_store_ignore # 0x0E Flash ROM/SRAM - -ext_store_u32: - srl $1, $4, 24 # $1 = address >> 24 - sltu $2, $1, 16 # check if the value is out of range - beq $2, $0, ext_store_ignore - sll $1, $1, 2 # make address word indexed (delay) - lui $2, %hi(ext_store_u32_jtable) - addu $2, $2, $1 - # $2 = ext_store_u32_jtable[address >> 24] - lw $2, %lo(ext_store_u32_jtable)($2) - jr $2 # jump to table location - nop - -#execute_store_u32: -execute_store_full_u32: - srl $1, $4, 28 # check if the address is out of range - bne $1, $0, ext_store_u32 # if it is, perform an extended write - srl $2, $4, 15 # $1 = page number of address (delay slot) - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 - lw $1, 256($2) # $1 = memory_map_write[address >> 15] - beq $1, $0, ext_store_u32 # if it's NULL perform an extended write - andi $2, $4, 0x7FFC # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - lw $2, -32768($1) # load the SMC status - bne $2, $0, smc_write # is there code there? - sw $5, ($1) # store the value (delay slot) - jr $ra # return - nop - - -# 32bit ext aligned, non a2 destroying routines - -ext_store_io32a: - andi $4, $4, 0x3FF # wrap around address - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) - save_registers - jal write_io_register32 # write the value out - sw $6, REG_SAVE($16) # save a2 - lw $6, REG_SAVE($16) # restore a2 - j write_io_epilogue # handle any state changes - nop - -ext_store_palette32a: - sw $ra, REG_SAVE($16) # save return address - jal ext_store_palette16b # write out palette entry - andi $4, 0x3FF # wrap address (delay) - addiu $4, $4, 2 # go to next location - srl $5, $5, 16 # shift to next 16bit value - j ext_store_palette16b # write out next palette entry - lw $ra, REG_SAVE($16) # restore return address (delay) - -ext_store_u32a_jtable: - .long ext_store_ignore # 0x00 BIOS, ignore - .long ext_store_ignore # 0x01 invalid, ignore - .long ext_store_ignore # 0x02 EWRAM, should have been hit already - .long ext_store_ignore # 0x03 IWRAM, should have been hit already - .long ext_store_io32a # 0x04 I/O registers - .long ext_store_palette32a # 0x05 Palette RAM - .long ext_store_vram32 # 0x06 VRAM - .long ext_store_oam32 # 0x07 OAM RAM - .long ext_store_ignore # 0x08 gamepak, ignore - .long ext_store_ignore # 0x09 gamepak, ignore - .long ext_store_ignore # 0x0A gamepak, ignore - .long ext_store_ignore # 0x0B gamepak, ignore - .long ext_store_ignore # 0x0C gamepak, ignore - .long ext_store_ignore # 0x0D EEPROM (nothing will write this) - .long ext_store_ignore # 0x0E Flash ROM/SRAM - -ext_aligned_store32: - srl $1, $4, 24 # $1 = address >> 24 - sltu $2, $1, 16 # check if the value is out of range - beq $2, $0, ext_store_ignore - sll $1, $1, 2 # make address word indexed (delay) - lui $2, %hi(ext_store_u32a_jtable) - addu $2, $2, $1 - # $2 = ext_store_u32a_jtable[address >> 24] - lw $2, %lo(ext_store_u32a_jtable)($2) - jr $2 # jump to table location - nop - -#execute_aligned_store32: - srl $2, $4, 28 # check if the address is out of range - bne $2, $0, ext_aligned_store32 # if it is, perform an extended load - srl $1, $4, 15 # $1 = page number of address - sll $1, $1, 2 # adjust to word index - addu $1, $1, $16 # $1 = memory_map_write[address >> 15] - lw $1, 256($1) - beq $1, $0, ext_aligned_store32 # if it's NULL perform an extended write - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - sw $5, ($1) # write the value - -smc_write: - save_registers - jal flush_translation_cache_ram # flush translation cache - sw $6, REG_PC($16) # save PC (delay slot) - -lookup_pc: - lw $2, REG_CPSR($16) # $2 = cpsr - andi $2, $2, 0x20 # isolate mode bit - beq $2, $0, lookup_pc_arm # if T bit is zero use arm handler - nop - -lookup_pc_thumb: - jal block_lookup_address_thumb # get Thumb address - lw $4, REG_PC($16) # load PC as arg 0 (delay slot) - restore_registers - jr $2 # jump to result - nop - -lookup_pc_arm: - jal block_lookup_address_arm # get ARM address - lw $4, REG_PC($16) # load PC as arg 0 (delay slot) - restore_registers - jr $2 # jump to result - nop - -# Return the current cpsr - -execute_read_cpsr: - collapse_flags # fold flags into cpsr, put cpsr into $2 - jr $ra # return - nop - -# Return the current spsr - -execute_read_spsr: - lw $1, CPU_MODE($16) # $1 = cpu_mode - lui $2, %hi(spsr) - sll $1, $1, 2 # adjust to word offset size - addu $2, $2, $1 - jr $ra # return - lw $2, %lo(spsr)($2) # $2 = spsr[cpu_mode] (delay slot) - -# Switch into SWI, has to collapse flags -# $4: Current pc - -execute_swi: - add $sp, $sp, -4 # push $ra - sw $ra, ($sp) - lui $1, %hi(SUPERVISOR_LR) - sw $4, %lo(SUPERVISOR_LR)($1) # store next PC in the supervisor's LR - collapse_flags # get cpsr in $2 - lui $5, %hi(SUPERVISOR_SPSR) - sw $2, %lo(SUPERVISOR_SPSR)($5) # save cpsr in SUPERVISOR_CPSR - ins $2, $0, 0, 6 # zero out bottom 6 bits of CPSR - ori $2, 0x13 # set mode to supervisor - sw $2, REG_CPSR($16) # write back CPSR - save_registers - jal set_cpu_mode # set the CPU mode to supervisor - li $4, 3 # 3 is supervisor mode (delay slot) - restore_registers - lw $ra, ($sp) # pop $ra - jr $ra # return - add $sp, $sp, 4 # fix stack (delay slot) - -# $4: pc to restore to -# returns in $4 - -execute_spsr_restore: - lw $1, CPU_MODE($16) # $1 = cpu_mode - - beq $1, $0, no_spsr_restore # only restore if the cpu isn't usermode - lui $2, %hi(spsr) # start loading SPSR (delay) - - sll $1, $1, 2 # adjust to word offset size - addu $2, $2, $1 - lw $1, %lo(spsr)($2) # $1 = spsr[cpu_mode] - sw $1, REG_CPSR($16) # cpsr = spsr[cpu_mode] - extract_flags_body # extract flags from $1 - addiu $sp, $sp, -4 - sw $ra, ($sp) - save_registers - jal execute_spsr_restore_body # do the dirty work in this C function - nop - restore_registers - addu $4, $2, $0 # move return value to $4 - lw $ra, ($sp) - jr $ra - addiu $sp, $sp, 4 - -no_spsr_restore: - jr $ra - nop - -# $4: new cpsr -# $5: store mask -# $6: current PC - -execute_store_cpsr: - and $1, $4, $5 # $1 = new_cpsr & store_mask - lw $2, REG_CPSR($16) # $2 = current cpsr - nor $4, $5, $0 # $4 = ~store_mask - and $2, $2, $4 # $2 = (cpsr & (~store_mask)) - or $1, $1, $2 # $1 = new cpsr combined with old - extract_flags_body # extract flags from $1 - addiu $sp, $sp, -4 - sw $ra, ($sp) - save_registers - jal execute_store_cpsr_body # do the dirty work in this C function - addu $4, $1, $0 # load the new CPSR (delay slot) - - bne $2, $0, changed_pc_cpsr # this could have changed the pc - nop - - restore_registers - - lw $ra, ($sp) - jr $ra - addiu $sp, $sp, 4 - -changed_pc_cpsr: - jal block_lookup_address_arm # GBA address is in $4 - addu $4, $2, $0 # load new address in $4 (delay slot) - restore_registers # restore registers - jr $2 # jump to the new address - addiu $sp, $sp, 4 # get rid of the old ra (delay slot) - - -# $4: new spsr -# $5: store mask - -execute_store_spsr: - lw $1, CPU_MODE($16) # $1 = cpu_mode - lui $2, %hi(spsr) - sll $1, $1, 2 # adjust to word offset size - addu $1, $2, $1 - lw $2, %lo(spsr)($1) # $2 = spsr[cpu_mode] - and $4, $4, $5 # $4 = new_spsr & store_mask - nor $5, $5, $0 # $5 = ~store_mask - and $2, $2, $5 # $2 = (spsr & (~store_mask)) - or $4, $4, $2 # $4 = new spsr combined with old - jr $ra # return - sw $4, %lo(spsr)($1) # spsr[cpu_mode] = $4 (delay slot) - -# $4: value -# $5: shift - -execute_lsl_flags_reg: - beq $5, $0, lsl_shift_zero # is the shift zero? - sltiu $1, $5, 32 # $1 = (shift < 32) (delay) - beq $1, $0, lsl_shift_high # is the shift >= 32? - li $2, 32 - - subu $2, $2, $5 # $2 = (32 - shift) - srlv $2, $4, $2 # $2 = (value >> (32 - shift)) - andi $22, $2, 1 # c flag = (value >> (32 - shift)) & 0x01 - -lsl_shift_zero: - jr $ra # return - sllv $4, $4, $5 # return (value << shift) (delay) - -lsl_shift_high: - sltiu $1, $5, 33 # $1 = (shift < 33) (delay) - bne $1, $0, lsl_shift_done # jump if shift == 32 - andi $22, $4, 1 # c flag = value & 0x01 (delay) - - add $22, $0, $0 # c flag = 0 otherwise - -lsl_shift_done: - jr $ra # return - add $4, $0, $0 # value = 0 no matter what - - -execute_lsr_flags_reg: - beq $5, $0, lsr_shift_zero # is the shift zero? - sltiu $1, $5, 32 # $1 = (shift < 32) (delay) - beq $1, $0, lsr_shift_high # is the shift >= 32? - addiu $2, $5, -1 # $2 = shift - 1 (delay) - - srlv $2, $4, $2 # $2 = (value >> (shift - 1)) - andi $22, $2, 1 # c flag = (value >> (32 - shift)) & 0x01 - -lsr_shift_zero: - jr $ra # return - srlv $4, $4, $5 # return (value >> shift) (delay) - -lsr_shift_high: - sltiu $1, $5, 33 # $1 = (shift < 33) (delay) - bne $1, $0, lsr_shift_done # jump if shift == 32 - srl $22, $4, 31 # c flag = value >> 31 (delay) - - add $22, $0, $0 # c flag = 0 otherwise - -lsr_shift_done: - jr $ra # return - add $4, $0, $0 # value = 0 no matter what - - -execute_asr_flags_reg: - beq $5, $0, asr_shift_zero # is the shift zero? - sltiu $1, $5, 32 # $1 = (shift < 32) (delay) - beq $1, $0, asr_shift_high # is the shift >= 32? - addiu $2, $5, -1 # $2 = shift - 1 (delay) - - srlv $2, $4, $2 # $2 = (value >> (shift - 1)) - andi $22, $2, 1 # c flag = (value >> (32 - shift)) & 0x01 - -asr_shift_zero: - jr $ra # return - srav $4, $4, $5 # return (value >> shift) (delay) - -asr_shift_high: - sra $4, $4, 31 # value >>= 31 - jr $ra # return - andi $22, $4, 1 # c flag = value & 0x01 - - -execute_ror_flags_reg: - beq $5, $0, ror_zero_shift # is the shift zero? - addiu $1, $5, -1 # $1 = (shift - 1) (delay) - - srav $1, $4, $1 # $1 = (value >> (shift - 1)) - andi $22, $1, 1 # c flag = $1 & 1 - -ror_zero_shift: - jr $ra # return - rotrv $4, $4, $5 # return (value ror shift) delay - -# $4: cycle counter argument - -execute_arm_translate: - addu $17, $4, $0 # load cycle counter register - lui $16, %hi(reg) # load base register - addiu $16, %lo(reg) - extract_flags # load flag variables - - and $1, $1, 0x20 # see if Thumb bit is set in flags - - bne $1, $0, 1f - lw $4, REG_PC($16) # load PC into $4 (delay) - - jal block_lookup_address_arm # lookup initial jump address - nop - restore_registers # load initial register values - jr $2 # jump to return - nop - -1: - jal block_lookup_address_thumb # lookup initial jump address - nop - restore_registers # load initial register values - jr $2 # jump to return - nop - -# sceKernelInvalidateIcacheRange gives me problems, trying this instead -# Invalidates an n byte region starting at the start address -# $4: start location -# $5: length - -invalidate_icache_region: - ins $4, $0, 0, 6 # align to 64 bytes - addiu $2, $5, 63 # align up to 64 bytes - srl $2, $2, 6 # divide by 64 - beq $2, $0, done # exit early on 0 - nop - -iir_loop: - cache 0x08, ($4) # hit invalidate icache line - addiu $2, $2, -1 # next loop iteration - bne $2, $0, iir_loop # loop - addiu $4, $4, 64 # go to next cache line (delay slot) - -done: - jr $ra # return - nop - -# Writes back dcache and invalidates icache. - -invalidate_all_cache: - addu $4, $0, $0 # $4 = 0 - addiu $5, $0, 0x4000 # $5 = 0x4000 - -iac_loop: - cache 0x14, 0($4) # index invalidate/writeback dcache index - addiu $4, $4, 0x40 # goto next cache line - bne $4, $5, iac_loop # next iteration - cache 0x04, -0x40($4) # index invalidate icache index.. maybe? - - jr $ra # return - nop - - -step_debug_mips: - addiu $sp, $sp, -4 - sw $ra, ($sp) - collapse_flags - save_registers - jal step_debug - addiu $5, $17, 0 - restore_registers - lw $ra, ($sp) - jr $ra - addiu $sp, $sp, 4 - -memory_map_read: - .space 0x8000 - -reg: - .space 0x100 - -memory_map_write: - .space 0x8000 - diff --git a/raspberrypi/Makefile b/raspberrypi/Makefile deleted file mode 100644 index 3f78c1ef..00000000 --- a/raspberrypi/Makefile +++ /dev/null @@ -1,45 +0,0 @@ -# gpSP makefile -# Gilead Kutnick - Exophase -# pandora port - notaz -# respberry pi - DPR - -# Global definitions - -CC = gcc - -OBJS = rpi.o main.o cpu.o memory.o video.o input.o sound.o gui.o \ - cheats.o zip.o arm_stub.o warm.o cpu_threaded.o\ - gles_video.o video_blend.o - -BIN = gpsp - -# Platform specific definitions - -VPATH += .. ../arm -CFLAGS += -DARM_ARCH -DRPI_BUILD -Wall -CFLAGS += -O3 -mfpu=vfp -CFLAGS += `sdl-config --cflags` -CFLAGS += -I$(SDKSTAGE)/opt/vc/include -I$(SDKSTAGE)/opt/vc/include/interface/vcos/pthreads -CFLAGS += -I/opt/vc/include/interface/vmcs_host/linux - -# expecting to have PATH set up to get correct sdl-config first - -LIBS += `sdl-config --libs` -LIBS += -ldl -lpthread -lz -LIBS += -L$(SDKSTAGE)/opt/vc/lib/ -lGLESv2 -lEGL -lopenmaxil -lbcm_host -lvcos -lvchiq_arm -lrt - -# Compilation: - -all: $(BIN) - -%.o: %.S - $(CC) $(CFLAGS) -c -o $@ $< - - -cpu.o cpu_threaded.o: CFLAGS += -Wno-unused-variable -Wno-unused-label - -$(BIN): $(OBJS) - $(CC) $(OBJS) $(LIBS) -o $(BIN) - -clean: - rm -f *.o $(BIN) diff --git a/raspberrypi/gles_video.c b/raspberrypi/gles_video.c deleted file mode 100644 index adf9b032..00000000 --- a/raspberrypi/gles_video.c +++ /dev/null @@ -1,417 +0,0 @@ -/* - -This file is based on Portable ZX-Spectrum emulator. -Copyright (C) 2001-2012 SMT, Dexus, Alone Coder, deathsoft, djdron, scor - -C++ to C code conversion by Pate - -Modified by DPR for gpsp for Raspberry Pi - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see . - -*/ - -#include "bcm_host.h" -#include "GLES/gl.h" -#include "EGL/egl.h" -#include "EGL/eglext.h" -#include "GLES2/gl2.h" -#include -#include -#include -#include - -static uint32_t frame_width = 0; -static uint32_t frame_height = 0; - - -#define SHOW_ERROR gles_show_error(); - -static void SetOrtho(GLfloat m[4][4], GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat near, GLfloat far, GLfloat scale_x, GLfloat scale_y); - -static const char* vertex_shader = - "uniform mat4 u_vp_matrix; \n" - "attribute vec4 a_position; \n" - "attribute vec2 a_texcoord; \n" - "varying mediump vec2 v_texcoord; \n" - "void main() \n" - "{ \n" - " v_texcoord = a_texcoord; \n" - " gl_Position = u_vp_matrix * a_position; \n" - "} \n"; - -static const char* fragment_shader = - "varying mediump vec2 v_texcoord; \n" - "uniform sampler2D u_texture; \n" - "void main() \n" - "{ \n" - " gl_FragColor = texture2D(u_texture, v_texcoord); \n" - "} \n"; -/* -static const GLfloat vertices[] = -{ - -0.5f, -0.5f, 0.0f, - +0.5f, -0.5f, 0.0f, - +0.5f, +0.5f, 0.0f, - -0.5f, +0.5f, 0.0f, -}; -*/ -static const GLfloat vertices[] = -{ - -0.5f, -0.5f, 0.0f, - -0.5f, +0.5f, 0.0f, - +0.5f, +0.5f, 0.0f, - +0.5f, -0.5f, 0.0f, -}; - -#define TEX_WIDTH 1024 -#define TEX_HEIGHT 512 - -static const GLfloat uvs[8]; - -static const GLushort indices[] = -{ - 0, 1, 2, - 0, 2, 3, -}; - -static const int kVertexCount = 4; -static const int kIndexCount = 6; - - -void Create_uvs(GLfloat * matrix, GLfloat max_u, GLfloat max_v) { - memset(matrix,0,sizeof(GLfloat)*8); - matrix[3]=max_v; - matrix[4]=max_u; - matrix[5]=max_v; - matrix[6]=max_u; - -} - -void gles_show_error() -{ - GLenum error = GL_NO_ERROR; - error = glGetError(); - if (GL_NO_ERROR != error) - printf("GL Error %x encountered!\n", error); -} - -static GLuint CreateShader(GLenum type, const char *shader_src) -{ - GLuint shader = glCreateShader(type); - if(!shader) - return 0; - - // Load and compile the shader source - glShaderSource(shader, 1, &shader_src, NULL); - glCompileShader(shader); - - // Check the compile status - GLint compiled = 0; - glGetShaderiv(shader, GL_COMPILE_STATUS, &compiled); - if(!compiled) - { - GLint info_len = 0; - glGetShaderiv(shader, GL_INFO_LOG_LENGTH, &info_len); - if(info_len > 1) - { - char* info_log = (char *)malloc(sizeof(char) * info_len); - glGetShaderInfoLog(shader, info_len, NULL, info_log); - // TODO(dspringer): We could really use a logging API. - printf("Error compiling shader:\n%s\n", info_log); - free(info_log); - } - glDeleteShader(shader); - return 0; - } - return shader; -} - -static GLuint CreateProgram(const char *vertex_shader_src, const char *fragment_shader_src) -{ - GLuint vertex_shader = CreateShader(GL_VERTEX_SHADER, vertex_shader_src); - if(!vertex_shader) - return 0; - GLuint fragment_shader = CreateShader(GL_FRAGMENT_SHADER, fragment_shader_src); - if(!fragment_shader) - { - glDeleteShader(vertex_shader); - return 0; - } - - GLuint program_object = glCreateProgram(); - if(!program_object) - return 0; - glAttachShader(program_object, vertex_shader); - glAttachShader(program_object, fragment_shader); - - // Link the program - glLinkProgram(program_object); - - // Check the link status - GLint linked = 0; - glGetProgramiv(program_object, GL_LINK_STATUS, &linked); - if(!linked) - { - GLint info_len = 0; - glGetProgramiv(program_object, GL_INFO_LOG_LENGTH, &info_len); - if(info_len > 1) - { - char* info_log = (char *)malloc(info_len); - glGetProgramInfoLog(program_object, info_len, NULL, info_log); - // TODO(dspringer): We could really use a logging API. - printf("Error linking program:\n%s\n", info_log); - free(info_log); - } - glDeleteProgram(program_object); - return 0; - } - // Delete these here because they are attached to the program object. - glDeleteShader(vertex_shader); - glDeleteShader(fragment_shader); - return program_object; -} - -typedef struct ShaderInfo { - GLuint program; - GLint a_position; - GLint a_texcoord; - GLint u_vp_matrix; - GLint u_texture; -} ShaderInfo; - -static ShaderInfo shader; -static ShaderInfo shader_filtering; -static GLuint buffers[3]; -static GLuint textures[2]; - - -static void gles2_create() -{ - memset(&shader, 0, sizeof(ShaderInfo)); - shader.program = CreateProgram(vertex_shader, fragment_shader); - if(shader.program) - { - shader.a_position = glGetAttribLocation(shader.program, "a_position"); - shader.a_texcoord = glGetAttribLocation(shader.program, "a_texcoord"); - shader.u_vp_matrix = glGetUniformLocation(shader.program, "u_vp_matrix"); - shader.u_texture = glGetUniformLocation(shader.program, "u_texture"); - } - glGenTextures(1, textures); - glBindTexture(GL_TEXTURE_2D, textures[0]); - glTexImage2D(GL_TEXTURE_2D, 0, GL_RGB, TEX_WIDTH, TEX_HEIGHT, 0, GL_RGB, GL_UNSIGNED_SHORT_5_6_5, NULL); - - Create_uvs(uvs, (float)frame_width/TEX_WIDTH, (float)frame_height/TEX_HEIGHT); - - glGenBuffers(3, buffers); - glBindBuffer(GL_ARRAY_BUFFER, buffers[0]); - glBufferData(GL_ARRAY_BUFFER, kVertexCount * sizeof(GLfloat) * 3, vertices, GL_STATIC_DRAW); - glBindBuffer(GL_ARRAY_BUFFER, buffers[1]); - glBufferData(GL_ARRAY_BUFFER, kVertexCount * sizeof(GLfloat) * 2, uvs, GL_STATIC_DRAW); - glBindBuffer(GL_ARRAY_BUFFER, 0); - glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, buffers[2]); - glBufferData(GL_ELEMENT_ARRAY_BUFFER, kIndexCount * sizeof(GL_UNSIGNED_SHORT), indices, GL_STATIC_DRAW); - glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, 0); - - glClearColor(0.0f, 0.0f, 0.0f, 1.0f); - glDisable(GL_DEPTH_TEST); - glDisable(GL_BLEND); - glDisable(GL_DITHER); -} - -static uint32_t screen_width = 0; -static uint32_t screen_height = 0; - -static EGLDisplay display = NULL; -static EGLSurface surface = NULL; -static EGLContext context = NULL; -static EGL_DISPMANX_WINDOW_T nativewindow; - -static GLfloat proj[4][4]; -static GLint filter_min; -static GLint filter_mag; - -void video_set_filter(uint32_t filter) { - if (filter==0) { - filter_min = GL_NEAREST; - filter_mag = GL_NEAREST; - } else { - filter_min = GL_LINEAR; - filter_mag = GL_LINEAR; - } -} - -void video_init(uint32_t _width, uint32_t _height, uint32_t filter) -{ - if ((_width==0)||(_height==0)) - return; - - frame_width = _width; - frame_height = _height; - - //bcm_host_init(); - - // get an EGL display connection - display = eglGetDisplay(EGL_DEFAULT_DISPLAY); - assert(display != EGL_NO_DISPLAY); - - // initialize the EGL display connection - EGLBoolean result = eglInitialize(display, NULL, NULL); - assert(EGL_FALSE != result); - - // get an appropriate EGL frame buffer configuration - EGLint num_config; - EGLConfig config; - static const EGLint attribute_list[] = - { - EGL_RED_SIZE, 8, - EGL_GREEN_SIZE, 8, - EGL_BLUE_SIZE, 8, - EGL_ALPHA_SIZE, 8, - EGL_SURFACE_TYPE, EGL_WINDOW_BIT, - EGL_NONE - }; - result = eglChooseConfig(display, attribute_list, &config, 1, &num_config); - assert(EGL_FALSE != result); - - result = eglBindAPI(EGL_OPENGL_ES_API); - assert(EGL_FALSE != result); - - // create an EGL rendering context - static const EGLint context_attributes[] = - { - EGL_CONTEXT_CLIENT_VERSION, 2, - EGL_NONE - }; - context = eglCreateContext(display, config, EGL_NO_CONTEXT, context_attributes); - assert(context != EGL_NO_CONTEXT); - - // create an EGL window surface - int32_t success = graphics_get_display_size(0, &screen_width, &screen_height); - assert(success >= 0); - - VC_RECT_T dst_rect; - dst_rect.x = 0; - dst_rect.y = 0; - dst_rect.width = screen_width; - dst_rect.height = screen_height; - - VC_RECT_T src_rect; - src_rect.x = 0; - src_rect.y = 0; - src_rect.width = screen_width << 16; - src_rect.height = screen_height << 16; - - DISPMANX_DISPLAY_HANDLE_T dispman_display = vc_dispmanx_display_open(0); - DISPMANX_UPDATE_HANDLE_T dispman_update = vc_dispmanx_update_start(0); - DISPMANX_ELEMENT_HANDLE_T dispman_element = vc_dispmanx_element_add(dispman_update, dispman_display, - 1, &dst_rect, 0, &src_rect, DISPMANX_PROTECTION_NONE, NULL, NULL, DISPMANX_NO_ROTATE); - - nativewindow.element = dispman_element; - nativewindow.width = screen_width; - nativewindow.height = screen_height; - vc_dispmanx_update_submit_sync(dispman_update); - - surface = eglCreateWindowSurface(display, config, &nativewindow, NULL); - assert(surface != EGL_NO_SURFACE); - - // connect the context to the surface - result = eglMakeCurrent(display, surface, surface, context); - assert(EGL_FALSE != result); - - gles2_create(); - - int r=(screen_height*10/frame_height); - int h = (frame_height*r)/10; - int w = (frame_width*r)/10; - if (w>screen_width) { - r = (screen_width*10/frame_width); - h = (frame_height*r)/10; - w = (frame_width*r)/10; - } - glViewport((screen_width-w)/2, (screen_height-h)/2, w, h); - SetOrtho(proj, -0.5f, +0.5f, +0.5f, -0.5f, -1.0f, 1.0f, 1.0f ,1.0f ); - video_set_filter(filter); -} - -static void gles2_destroy() -{ - if(!shader.program) - return; - glDeleteBuffers(3, buffers); SHOW_ERROR - glDeleteProgram(shader.program); SHOW_ERROR -} - -static void SetOrtho(GLfloat m[4][4], GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat near, GLfloat far, GLfloat scale_x, GLfloat scale_y) -{ - memset(m, 0, 4*4*sizeof(GLfloat)); - m[0][0] = 2.0f/(right - left)*scale_x; - m[1][1] = 2.0f/(top - bottom)*scale_y; - m[2][2] = -2.0f/(far - near); - m[3][0] = -(right + left)/(right - left); - m[3][1] = -(top + bottom)/(top - bottom); - m[3][2] = -(far + near)/(far - near); - m[3][3] = 1; -} -#define RGB15(r, g, b) (((r) << (5+6)) | ((g) << 6) | (b)) - -static void gles2_Draw( uint16_t *pixels) -{ - if(!shader.program) - return; - - glClear(GL_COLOR_BUFFER_BIT); - - glUseProgram(shader.program); - - glBindTexture(GL_TEXTURE_2D, textures[0]); - glTexSubImage2D(GL_TEXTURE_2D, 0, 0, 0, frame_width, frame_height, GL_RGB, GL_UNSIGNED_SHORT_5_6_5, pixels); - glActiveTexture(GL_TEXTURE0); - glUniform1i(shader.u_texture, 0); - glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, filter_mag); - glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, filter_min); - glGenerateMipmap(GL_TEXTURE_2D); - - glBindBuffer(GL_ARRAY_BUFFER, buffers[0]); - glVertexAttribPointer(shader.a_position, 3, GL_FLOAT, GL_FALSE, 3 * sizeof(GLfloat), NULL); - glEnableVertexAttribArray(shader.a_position); - - glBindBuffer(GL_ARRAY_BUFFER, buffers[1]); - glVertexAttribPointer(shader.a_texcoord, 2, GL_FLOAT, GL_FALSE, 2 * sizeof(GLfloat), NULL); - glEnableVertexAttribArray(shader.a_texcoord); - - glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, buffers[2]); - glUniformMatrix4fv(shader.u_vp_matrix, 1, GL_FALSE, (const GLfloat * )&proj); - glDrawElements(GL_TRIANGLES, kIndexCount, GL_UNSIGNED_SHORT, 0); - - glBindBuffer(GL_ARRAY_BUFFER, 0); - glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, 0); - //glFlush(); -} - -void video_close() -{ - gles2_destroy(); - // Release OpenGL resources - eglMakeCurrent( display, EGL_NO_SURFACE, EGL_NO_SURFACE, EGL_NO_CONTEXT ); - eglDestroySurface( display, surface ); - eglDestroyContext( display, context ); - eglTerminate( display ); -} - -void video_draw(uint16_t *pixels) -{ - gles2_Draw (pixels); - eglSwapBuffers(display, surface); -} diff --git a/raspberrypi/gles_video.h b/raspberrypi/gles_video.h deleted file mode 100644 index 288889f6..00000000 --- a/raspberrypi/gles_video.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - -This file is based on Portable ZX-Spectrum emulator. -Copyright (C) 2001-2012 SMT, Dexus, Alone Coder, deathsoft, djdron, scor - -C++ to C code conversion by Pate - -Modified by DPR for gpsp for Raspberry Pi - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see . - -*/ - -void video_init(uint32_t width,uint32_t height,uint32_t filter); -void video_close(); -void video_draw(uint16_t *pixels); diff --git a/raspberrypi/keys.txt b/raspberrypi/keys.txt deleted file mode 100644 index 4bfbdd54..00000000 --- a/raspberrypi/keys.txt +++ /dev/null @@ -1,33 +0,0 @@ -gpsp raspberry pi - -CONTROL KEYS -============ -KEYBOARD ---------- -Up Up Arrow -Down Down Arrow -Left Left Arrow -Right Right Arrow -A Z -B X -Start Enter -Select Backspace -L A -R S - -Exit Esc -Menu F10 - -GAMEPAD -------- -Up XAsix - -Down XAsix + -Left YAsix - -Right YAsix + -A Button 1 -B Button 2 -Start Button 3 -Select Button 4 -L Button 5 -R Button 6 - diff --git a/raspberrypi/rpi.c b/raspberrypi/rpi.c deleted file mode 100644 index 3fbecb8b..00000000 --- a/raspberrypi/rpi.c +++ /dev/null @@ -1,111 +0,0 @@ -/* gameplaySP - raspberry backend - * - * Copyright (C) 2013 DPR - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "../common.h" -#include -#include -#include "gles_video.h" -#include "rpi.h" -#include "bcm_host.h" - -u32 gamepad_config_map[PLAT_BUTTON_COUNT] = -{ - BUTTON_ID_UP, // Up - BUTTON_ID_LEFT, // Left - BUTTON_ID_DOWN, // Down - BUTTON_ID_RIGHT, // Right - BUTTON_ID_START, // Start - BUTTON_ID_SELECT, // Select - BUTTON_ID_L, // Ltrigger - BUTTON_ID_R, // Rtrigger - BUTTON_ID_FPS, // A - BUTTON_ID_A, // B - BUTTON_ID_B, // X - BUTTON_ID_MENU, // Y - BUTTON_ID_SAVESTATE, // 1 - BUTTON_ID_LOADSTATE, // 2 - BUTTON_ID_FASTFORWARD, // 3 - BUTTON_ID_NONE, // 4 - BUTTON_ID_MENU // Space -}; - - -#define MAX_VIDEO_MEM (480*270*2) -static int video_started=0; -static uint16_t * video_buff; - - -void gpsp_plat_init(void) -{ - int ret, w, h, fd; - //const char *layer_fb_name; - SDL_Surface* myVideoSurface; - - bcm_host_init(); - - ret = SDL_Init(SDL_INIT_VIDEO | SDL_INIT_AUDIO | SDL_INIT_JOYSTICK | SDL_INIT_NOPARACHUTE); - if (ret != 0) { - fprintf(stderr, "SDL_Init failed: %s\n", SDL_GetError()); - exit(1); - } - - myVideoSurface = SDL_SetVideoMode( 0, 0, 16, SDL_SWSURFACE); - // Print out some information about the video surface - if (myVideoSurface == NULL) { - fprintf(stderr, "SDL_Init failed: %s\n", SDL_GetError()); - exit(1); - } - SDL_ShowCursor(0); - fb_set_mode(240, 160, 0, 0, 0, 0); - screen_scale = 3; -} - -void gpsp_plat_quit(void) -{ - if (video_started) { - video_close(); - free(video_buff); - video_started=0; - } - SDL_Quit(); -} - - -void *fb_flip_screen(void) -{ - video_draw(video_buff); - return video_buff; -} - -void fb_wait_vsync(void) -{ -} - -void fb_set_mode(int w, int h, int buffers, int scale,int filter, int filter2) -{ - if (video_started) { - video_close(); - free(video_buff); - } - video_buff=malloc(w*h*sizeof(uint16_t)); - memset(video_buff,0,w*h*sizeof(uint16_t)); - video_init(w,h,filter); - video_started=1; -} -// vim:shiftwidth=2:expandtab diff --git a/raspberrypi/rpi.h b/raspberrypi/rpi.h deleted file mode 100644 index 65f9cc38..00000000 --- a/raspberrypi/rpi.h +++ /dev/null @@ -1,10 +0,0 @@ -void gpsp_plat_init(void); -void gpsp_plat_quit(void); - -#define PLAT_BUTTON_COUNT 17 -#define PLAT_MENU_BUTTON -1 // have one hardcoded -extern u32 button_plat_mask_to_config[PLAT_BUTTON_COUNT]; - -void *fb_flip_screen(void); -void fb_set_mode(int w, int h, int buffers, int scale, int filter, int filter2); -void fb_wait_vsync(void); diff --git a/raspberrypi/test/Makefile b/raspberrypi/test/Makefile deleted file mode 100644 index 98308341..00000000 --- a/raspberrypi/test/Makefile +++ /dev/null @@ -1,30 +0,0 @@ -# glestest makefile -# Global definitions - -CC = gcc - -OBJS = gles_video.o test.o - -BIN = glestest - -# Platform specific definitions - -CFLAGS+=-D_LINUX - -LIBS +=-L$(SDKSTAGE)/opt/vc/lib/ -lGLESv2 -lEGL -lopenmaxil -lbcm_host -lvcos -lvchiq_arm -lpthread -lrt - -INCLUDES+=-I$(SDKSTAGE)/opt/vc/include -I$(SDKSTAGE)/opt/vc/include/interface/vcos/pthreads - -# Compilation: - -all: $(BIN) - -%.o: %.c - $(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $< - -$(BIN): $(OBJS) - $(CC) $(OBJS) $(LIBS) -o $(BIN) - -clean: - rm -f *.o $(BIN) - diff --git a/raspberrypi/test/gles_video.c b/raspberrypi/test/gles_video.c deleted file mode 100644 index adf9b032..00000000 --- a/raspberrypi/test/gles_video.c +++ /dev/null @@ -1,417 +0,0 @@ -/* - -This file is based on Portable ZX-Spectrum emulator. -Copyright (C) 2001-2012 SMT, Dexus, Alone Coder, deathsoft, djdron, scor - -C++ to C code conversion by Pate - -Modified by DPR for gpsp for Raspberry Pi - -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see . - -*/ - -#include "bcm_host.h" -#include "GLES/gl.h" -#include "EGL/egl.h" -#include "EGL/eglext.h" -#include "GLES2/gl2.h" -#include -#include -#include -#include - -static uint32_t frame_width = 0; -static uint32_t frame_height = 0; - - -#define SHOW_ERROR gles_show_error(); - -static void SetOrtho(GLfloat m[4][4], GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat near, GLfloat far, GLfloat scale_x, GLfloat scale_y); - -static const char* vertex_shader = - "uniform mat4 u_vp_matrix; \n" - "attribute vec4 a_position; \n" - "attribute vec2 a_texcoord; \n" - "varying mediump vec2 v_texcoord; \n" - "void main() \n" - "{ \n" - " v_texcoord = a_texcoord; \n" - " gl_Position = u_vp_matrix * a_position; \n" - "} \n"; - -static const char* fragment_shader = - "varying mediump vec2 v_texcoord; \n" - "uniform sampler2D u_texture; \n" - "void main() \n" - "{ \n" - " gl_FragColor = texture2D(u_texture, v_texcoord); \n" - "} \n"; -/* -static const GLfloat vertices[] = -{ - -0.5f, -0.5f, 0.0f, - +0.5f, -0.5f, 0.0f, - +0.5f, +0.5f, 0.0f, - -0.5f, +0.5f, 0.0f, -}; -*/ -static const GLfloat vertices[] = -{ - -0.5f, -0.5f, 0.0f, - -0.5f, +0.5f, 0.0f, - +0.5f, +0.5f, 0.0f, - +0.5f, -0.5f, 0.0f, -}; - -#define TEX_WIDTH 1024 -#define TEX_HEIGHT 512 - -static const GLfloat uvs[8]; - -static const GLushort indices[] = -{ - 0, 1, 2, - 0, 2, 3, -}; - -static const int kVertexCount = 4; -static const int kIndexCount = 6; - - -void Create_uvs(GLfloat * matrix, GLfloat max_u, GLfloat max_v) { - memset(matrix,0,sizeof(GLfloat)*8); - matrix[3]=max_v; - matrix[4]=max_u; - matrix[5]=max_v; - matrix[6]=max_u; - -} - -void gles_show_error() -{ - GLenum error = GL_NO_ERROR; - error = glGetError(); - if (GL_NO_ERROR != error) - printf("GL Error %x encountered!\n", error); -} - -static GLuint CreateShader(GLenum type, const char *shader_src) -{ - GLuint shader = glCreateShader(type); - if(!shader) - return 0; - - // Load and compile the shader source - glShaderSource(shader, 1, &shader_src, NULL); - glCompileShader(shader); - - // Check the compile status - GLint compiled = 0; - glGetShaderiv(shader, GL_COMPILE_STATUS, &compiled); - if(!compiled) - { - GLint info_len = 0; - glGetShaderiv(shader, GL_INFO_LOG_LENGTH, &info_len); - if(info_len > 1) - { - char* info_log = (char *)malloc(sizeof(char) * info_len); - glGetShaderInfoLog(shader, info_len, NULL, info_log); - // TODO(dspringer): We could really use a logging API. - printf("Error compiling shader:\n%s\n", info_log); - free(info_log); - } - glDeleteShader(shader); - return 0; - } - return shader; -} - -static GLuint CreateProgram(const char *vertex_shader_src, const char *fragment_shader_src) -{ - GLuint vertex_shader = CreateShader(GL_VERTEX_SHADER, vertex_shader_src); - if(!vertex_shader) - return 0; - GLuint fragment_shader = CreateShader(GL_FRAGMENT_SHADER, fragment_shader_src); - if(!fragment_shader) - { - glDeleteShader(vertex_shader); - return 0; - } - - GLuint program_object = glCreateProgram(); - if(!program_object) - return 0; - glAttachShader(program_object, vertex_shader); - glAttachShader(program_object, fragment_shader); - - // Link the program - glLinkProgram(program_object); - - // Check the link status - GLint linked = 0; - glGetProgramiv(program_object, GL_LINK_STATUS, &linked); - if(!linked) - { - GLint info_len = 0; - glGetProgramiv(program_object, GL_INFO_LOG_LENGTH, &info_len); - if(info_len > 1) - { - char* info_log = (char *)malloc(info_len); - glGetProgramInfoLog(program_object, info_len, NULL, info_log); - // TODO(dspringer): We could really use a logging API. - printf("Error linking program:\n%s\n", info_log); - free(info_log); - } - glDeleteProgram(program_object); - return 0; - } - // Delete these here because they are attached to the program object. - glDeleteShader(vertex_shader); - glDeleteShader(fragment_shader); - return program_object; -} - -typedef struct ShaderInfo { - GLuint program; - GLint a_position; - GLint a_texcoord; - GLint u_vp_matrix; - GLint u_texture; -} ShaderInfo; - -static ShaderInfo shader; -static ShaderInfo shader_filtering; -static GLuint buffers[3]; -static GLuint textures[2]; - - -static void gles2_create() -{ - memset(&shader, 0, sizeof(ShaderInfo)); - shader.program = CreateProgram(vertex_shader, fragment_shader); - if(shader.program) - { - shader.a_position = glGetAttribLocation(shader.program, "a_position"); - shader.a_texcoord = glGetAttribLocation(shader.program, "a_texcoord"); - shader.u_vp_matrix = glGetUniformLocation(shader.program, "u_vp_matrix"); - shader.u_texture = glGetUniformLocation(shader.program, "u_texture"); - } - glGenTextures(1, textures); - glBindTexture(GL_TEXTURE_2D, textures[0]); - glTexImage2D(GL_TEXTURE_2D, 0, GL_RGB, TEX_WIDTH, TEX_HEIGHT, 0, GL_RGB, GL_UNSIGNED_SHORT_5_6_5, NULL); - - Create_uvs(uvs, (float)frame_width/TEX_WIDTH, (float)frame_height/TEX_HEIGHT); - - glGenBuffers(3, buffers); - glBindBuffer(GL_ARRAY_BUFFER, buffers[0]); - glBufferData(GL_ARRAY_BUFFER, kVertexCount * sizeof(GLfloat) * 3, vertices, GL_STATIC_DRAW); - glBindBuffer(GL_ARRAY_BUFFER, buffers[1]); - glBufferData(GL_ARRAY_BUFFER, kVertexCount * sizeof(GLfloat) * 2, uvs, GL_STATIC_DRAW); - glBindBuffer(GL_ARRAY_BUFFER, 0); - glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, buffers[2]); - glBufferData(GL_ELEMENT_ARRAY_BUFFER, kIndexCount * sizeof(GL_UNSIGNED_SHORT), indices, GL_STATIC_DRAW); - glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, 0); - - glClearColor(0.0f, 0.0f, 0.0f, 1.0f); - glDisable(GL_DEPTH_TEST); - glDisable(GL_BLEND); - glDisable(GL_DITHER); -} - -static uint32_t screen_width = 0; -static uint32_t screen_height = 0; - -static EGLDisplay display = NULL; -static EGLSurface surface = NULL; -static EGLContext context = NULL; -static EGL_DISPMANX_WINDOW_T nativewindow; - -static GLfloat proj[4][4]; -static GLint filter_min; -static GLint filter_mag; - -void video_set_filter(uint32_t filter) { - if (filter==0) { - filter_min = GL_NEAREST; - filter_mag = GL_NEAREST; - } else { - filter_min = GL_LINEAR; - filter_mag = GL_LINEAR; - } -} - -void video_init(uint32_t _width, uint32_t _height, uint32_t filter) -{ - if ((_width==0)||(_height==0)) - return; - - frame_width = _width; - frame_height = _height; - - //bcm_host_init(); - - // get an EGL display connection - display = eglGetDisplay(EGL_DEFAULT_DISPLAY); - assert(display != EGL_NO_DISPLAY); - - // initialize the EGL display connection - EGLBoolean result = eglInitialize(display, NULL, NULL); - assert(EGL_FALSE != result); - - // get an appropriate EGL frame buffer configuration - EGLint num_config; - EGLConfig config; - static const EGLint attribute_list[] = - { - EGL_RED_SIZE, 8, - EGL_GREEN_SIZE, 8, - EGL_BLUE_SIZE, 8, - EGL_ALPHA_SIZE, 8, - EGL_SURFACE_TYPE, EGL_WINDOW_BIT, - EGL_NONE - }; - result = eglChooseConfig(display, attribute_list, &config, 1, &num_config); - assert(EGL_FALSE != result); - - result = eglBindAPI(EGL_OPENGL_ES_API); - assert(EGL_FALSE != result); - - // create an EGL rendering context - static const EGLint context_attributes[] = - { - EGL_CONTEXT_CLIENT_VERSION, 2, - EGL_NONE - }; - context = eglCreateContext(display, config, EGL_NO_CONTEXT, context_attributes); - assert(context != EGL_NO_CONTEXT); - - // create an EGL window surface - int32_t success = graphics_get_display_size(0, &screen_width, &screen_height); - assert(success >= 0); - - VC_RECT_T dst_rect; - dst_rect.x = 0; - dst_rect.y = 0; - dst_rect.width = screen_width; - dst_rect.height = screen_height; - - VC_RECT_T src_rect; - src_rect.x = 0; - src_rect.y = 0; - src_rect.width = screen_width << 16; - src_rect.height = screen_height << 16; - - DISPMANX_DISPLAY_HANDLE_T dispman_display = vc_dispmanx_display_open(0); - DISPMANX_UPDATE_HANDLE_T dispman_update = vc_dispmanx_update_start(0); - DISPMANX_ELEMENT_HANDLE_T dispman_element = vc_dispmanx_element_add(dispman_update, dispman_display, - 1, &dst_rect, 0, &src_rect, DISPMANX_PROTECTION_NONE, NULL, NULL, DISPMANX_NO_ROTATE); - - nativewindow.element = dispman_element; - nativewindow.width = screen_width; - nativewindow.height = screen_height; - vc_dispmanx_update_submit_sync(dispman_update); - - surface = eglCreateWindowSurface(display, config, &nativewindow, NULL); - assert(surface != EGL_NO_SURFACE); - - // connect the context to the surface - result = eglMakeCurrent(display, surface, surface, context); - assert(EGL_FALSE != result); - - gles2_create(); - - int r=(screen_height*10/frame_height); - int h = (frame_height*r)/10; - int w = (frame_width*r)/10; - if (w>screen_width) { - r = (screen_width*10/frame_width); - h = (frame_height*r)/10; - w = (frame_width*r)/10; - } - glViewport((screen_width-w)/2, (screen_height-h)/2, w, h); - SetOrtho(proj, -0.5f, +0.5f, +0.5f, -0.5f, -1.0f, 1.0f, 1.0f ,1.0f ); - video_set_filter(filter); -} - -static void gles2_destroy() -{ - if(!shader.program) - return; - glDeleteBuffers(3, buffers); SHOW_ERROR - glDeleteProgram(shader.program); SHOW_ERROR -} - -static void SetOrtho(GLfloat m[4][4], GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat near, GLfloat far, GLfloat scale_x, GLfloat scale_y) -{ - memset(m, 0, 4*4*sizeof(GLfloat)); - m[0][0] = 2.0f/(right - left)*scale_x; - m[1][1] = 2.0f/(top - bottom)*scale_y; - m[2][2] = -2.0f/(far - near); - m[3][0] = -(right + left)/(right - left); - m[3][1] = -(top + bottom)/(top - bottom); - m[3][2] = -(far + near)/(far - near); - m[3][3] = 1; -} -#define RGB15(r, g, b) (((r) << (5+6)) | ((g) << 6) | (b)) - -static void gles2_Draw( uint16_t *pixels) -{ - if(!shader.program) - return; - - glClear(GL_COLOR_BUFFER_BIT); - - glUseProgram(shader.program); - - glBindTexture(GL_TEXTURE_2D, textures[0]); - glTexSubImage2D(GL_TEXTURE_2D, 0, 0, 0, frame_width, frame_height, GL_RGB, GL_UNSIGNED_SHORT_5_6_5, pixels); - glActiveTexture(GL_TEXTURE0); - glUniform1i(shader.u_texture, 0); - glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, filter_mag); - glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, filter_min); - glGenerateMipmap(GL_TEXTURE_2D); - - glBindBuffer(GL_ARRAY_BUFFER, buffers[0]); - glVertexAttribPointer(shader.a_position, 3, GL_FLOAT, GL_FALSE, 3 * sizeof(GLfloat), NULL); - glEnableVertexAttribArray(shader.a_position); - - glBindBuffer(GL_ARRAY_BUFFER, buffers[1]); - glVertexAttribPointer(shader.a_texcoord, 2, GL_FLOAT, GL_FALSE, 2 * sizeof(GLfloat), NULL); - glEnableVertexAttribArray(shader.a_texcoord); - - glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, buffers[2]); - glUniformMatrix4fv(shader.u_vp_matrix, 1, GL_FALSE, (const GLfloat * )&proj); - glDrawElements(GL_TRIANGLES, kIndexCount, GL_UNSIGNED_SHORT, 0); - - glBindBuffer(GL_ARRAY_BUFFER, 0); - glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, 0); - //glFlush(); -} - -void video_close() -{ - gles2_destroy(); - // Release OpenGL resources - eglMakeCurrent( display, EGL_NO_SURFACE, EGL_NO_SURFACE, EGL_NO_CONTEXT ); - eglDestroySurface( display, surface ); - eglDestroyContext( display, context ); - eglTerminate( display ); -} - -void video_draw(uint16_t *pixels) -{ - gles2_Draw (pixels); - eglSwapBuffers(display, surface); -} diff --git a/raspberrypi/test/test.c b/raspberrypi/test/test.c deleted file mode 100644 index 17e3d13a..00000000 --- a/raspberrypi/test/test.c +++ /dev/null @@ -1,48 +0,0 @@ -#include -#include -#include - -#define RGB15(r, g, b) (((r) << (5+6)) | ((g) << 6) | (b)) - -void video_init(uint32_t width,uint32_t height, uint32_t f); -void video_close(); -void video_draw(uint16_t *pixels); - - - -void showbitmap( uint32_t wd, uint32_t ht, uint32_t f) { -int index; -uint16_t j,k; -uint8_t r,g,b; -uint16_t * bitmap; - - bitmap=malloc(wd*ht*sizeof(uint16_t)); - - b=16; - index=0; - for (j=0;j> 1) + (((B) & 0xF7DE) >> 1) + ((A) & (B) & 0x0821)) - case 3: - integer_scale_horizontal(3); - break; +/* Calculates the average of two pairs of RGB565 pixels. The result is, in + * the lower bits, the average of both lower pixels, and in the upper bits, + * the average of both upper pixels. */ +#define Average32(A, B) ((((A) & 0xF7DEF7DE) >> 1) + (((B) & 0xF7DEF7DE) >> 1) + ((A) & (B) & 0x08210821)) - default: - case 4: - integer_scale_horizontal(4); - break; +/* Raises a pixel from the lower half to the upper half of a pair. */ +#define Raise(N) ((N) << 16) - } +/* Extracts the upper pixel of a pair into the lower pixel of a pair. */ +#define Hi(N) ((N) >> 16) - for(y = 159, y2 = (160 * video_scale) - 1; y >= 0; y--) - { - for(i = 0; i < video_scale; i++) - { - memcpy(screen_ptr + (y2 * pitch), - screen_ptr + (y * pitch), 480 * video_scale); - y2--; - } - } - } -#ifdef GP2X_BUILD - { - if((resolution_width == small_resolution_width) && - (resolution_height == small_resolution_height)) - { - switch (screen_scale) - { - case unscaled: - { - SDL_Rect srect = {0, 0, 240, 160}; - SDL_Rect drect = {40, 40, 240, 160}; - warm_cache_op_all(WOP_D_CLEAN); - SDL_BlitSurface(screen, &srect, hw_screen, &drect); - return; - } - case scaled_aspect: - { - SDL_Rect drect = {0, 10, 0, 0}; - warm_cache_op_all(WOP_D_CLEAN); - SDL_BlitSurface(screen, NULL, hw_screen, &drect); - return; - } - case scaled_aspect_sw: - { - upscale_aspect(hw_screen->pixels, get_screen_pixels()); - return; - } - case fullscreen: - break; - } - } - warm_cache_op_all(WOP_D_CLEAN); - SDL_BlitSurface(screen, NULL, hw_screen, NULL); - } -#else - SDL_Flip(screen); -#endif +/* Extracts the lower pixel of a pair. */ +#define Lo(N) ((N) & 0xFFFF) + +/* Calculates the average of two RGB565 pixels. The source of the pixels is + * the lower 16 bits of both parameters. The result is in the lower 16 bits. + * The average is weighted so that the first pixel contributes 3/4 of its + * color and the second pixel contributes 1/4. */ +#define AverageQuarters3_1(A, B) ( (((A) & 0xF7DE) >> 1) + (((A) & 0xE79C) >> 2) + (((B) & 0xE79C) >> 2) + ((( (( ((A) & 0x1863) + ((A) & 0x0821) ) << 1) + ((B) & 0x1863) ) >> 2) & 0x1863) ) + +static inline void gba_upscale(uint16_t *to, uint16_t *from, + uint32_t src_x, uint32_t src_y, uint32_t src_pitch, uint32_t dst_pitch) +{ + /* Before: + * a b c d e f + * g h i j k l + * + * After (multiple letters = average): + * a ab bc c d de ef f + * ag abgh bchi ci dj dejk efkl fl + * g gh hi i j jk kl l + */ + + const uint32_t dst_x = src_x * 4 / 3; + const uint32_t src_skip = src_pitch - src_x * sizeof(uint16_t), + dst_skip = dst_pitch - dst_x * sizeof(uint16_t); + + uint32_t x, y; + + for (y = 0; y < src_y; y += 2) { + for (x = 0; x < src_x / 6; x++) { + // -- Row 1 -- + // Read RGB565 elements in the source grid. + // The notation is high_low (little-endian). + uint32_t b_a = (*(uint32_t*) (from )), + d_c = (*(uint32_t*) (from + 2)), + f_e = (*(uint32_t*) (from + 4)); + + // Generate ab_a from b_a. + *(uint32_t*) (to) = likely(Hi(b_a) == Lo(b_a)) + ? b_a + : Lo(b_a) /* 'a' verbatim to low pixel */ | + Raise(Average(Hi(b_a), Lo(b_a))) /* ba to high pixel */; + + // Generate c_bc from b_a and d_c. + *(uint32_t*) (to + 2) = likely(Hi(b_a) == Lo(d_c)) + ? Lo(d_c) | Raise(Lo(d_c)) + : Raise(Lo(d_c)) /* 'c' verbatim to high pixel */ | + Average(Lo(d_c), Hi(b_a)) /* bc to low pixel */; + + // Generate de_d from d_c and f_e. + *(uint32_t*) (to + 4) = likely(Hi(d_c) == Lo(f_e)) + ? Lo(f_e) | Raise(Lo(f_e)) + : Hi(d_c) /* 'd' verbatim to low pixel */ | + Raise(Average(Lo(f_e), Hi(d_c))) /* de to high pixel */; + + // Generate f_ef from f_e. + *(uint32_t*) (to + 6) = likely(Hi(f_e) == Lo(f_e)) + ? f_e + : Raise(Hi(f_e)) /* 'f' verbatim to high pixel */ | + Average(Hi(f_e), Lo(f_e)) /* ef to low pixel */; + + if (likely(y + 1 < src_y)) // Is there a source row 2? + { + // -- Row 2 -- + uint32_t h_g = (*(uint32_t*) ((uint8_t*) from + src_pitch )), + j_i = (*(uint32_t*) ((uint8_t*) from + src_pitch + 4)), + l_k = (*(uint32_t*) ((uint8_t*) from + src_pitch + 8)); + + // Generate abgh_ag from b_a and h_g. + uint32_t bh_ag = Average32(b_a, h_g); + *(uint32_t*) ((uint8_t*) to + dst_pitch) = likely(Hi(bh_ag) == Lo(bh_ag)) + ? bh_ag + : Lo(bh_ag) /* ag verbatim to low pixel */ | + Raise(Average(Hi(bh_ag), Lo(bh_ag))) /* abgh to high pixel */; + + // Generate ci_bchi from b_a, d_c, h_g and j_i. + uint32_t ci_bh = + Hi(bh_ag) /* bh verbatim to low pixel */ | + Raise(Average(Lo(d_c), Lo(j_i))) /* ci to high pixel */; + *(uint32_t*) ((uint8_t*) to + dst_pitch + 4) = likely(Hi(ci_bh) == Lo(ci_bh)) + ? ci_bh + : Raise(Hi(ci_bh)) /* ci verbatim to high pixel */ | + Average(Hi(ci_bh), Lo(ci_bh)) /* bchi to low pixel */; + + // Generate fl_efkl from f_e and l_k. + uint32_t fl_ek = Average32(f_e, l_k); + *(uint32_t*) ((uint8_t*) to + dst_pitch + 12) = likely(Hi(fl_ek) == Lo(fl_ek)) + ? fl_ek + : Raise(Hi(fl_ek)) /* fl verbatim to high pixel */ | + Average(Hi(fl_ek), Lo(fl_ek)) /* efkl to low pixel */; + + // Generate dejk_dj from d_c, f_e, j_i and l_k. + uint32_t ek_dj = + Raise(Lo(fl_ek)) /* ek verbatim to high pixel */ | + Average(Hi(d_c), Hi(j_i)) /* dj to low pixel */; + *(uint32_t*) ((uint8_t*) to + dst_pitch + 8) = likely(Hi(ek_dj) == Lo(ek_dj)) + ? ek_dj + : Lo(ek_dj) /* dj verbatim to low pixel */ | + Raise(Average(Hi(ek_dj), Lo(ek_dj))) /* dejk to high pixel */; + + // -- Row 3 -- + // Generate gh_g from h_g. + *(uint32_t*) ((uint8_t*) to + dst_pitch * 2) = likely(Hi(h_g) == Lo(h_g)) + ? h_g + : Lo(h_g) /* 'g' verbatim to low pixel */ | + Raise(Average(Hi(h_g), Lo(h_g))) /* gh to high pixel */; + + // Generate i_hi from g_h and j_i. + *(uint32_t*) ((uint8_t*) to + dst_pitch * 2 + 4) = likely(Hi(h_g) == Lo(j_i)) + ? Lo(j_i) | Raise(Lo(j_i)) + : Raise(Lo(j_i)) /* 'i' verbatim to high pixel */ | + Average(Lo(j_i), Hi(h_g)) /* hi to low pixel */; + + // Generate jk_j from j_i and l_k. + *(uint32_t*) ((uint8_t*) to + dst_pitch * 2 + 8) = likely(Hi(j_i) == Lo(l_k)) + ? Lo(l_k) | Raise(Lo(l_k)) + : Hi(j_i) /* 'j' verbatim to low pixel */ | + Raise(Average(Hi(j_i), Lo(l_k))) /* jk to high pixel */; + + // Generate l_kl from l_k. + *(uint32_t*) ((uint8_t*) to + dst_pitch * 2 + 12) = likely(Hi(l_k) == Lo(l_k)) + ? l_k + : Raise(Hi(l_k)) /* 'l' verbatim to high pixel */ | + Average(Hi(l_k), Lo(l_k)) /* kl to low pixel */; + } + + from += 6; + to += 8; + } + + // Skip past the waste at the end of the first line, if any, + // then past 1 whole lines of source and 2 of destination. + from = (uint16_t*) ((uint8_t*) from + src_skip + src_pitch); + to = (uint16_t*) ((uint8_t*) to + dst_skip + 2 * dst_pitch); + } +} + +static inline void gba_upscale_aspect(uint16_t *to, uint16_t *from, + uint32_t src_x, uint32_t src_y, uint32_t src_pitch, uint32_t dst_pitch) +{ + /* Before: + * a b c d e f + * g h i j k l + * m n o p q r + * + * After (multiple letters = average): + * a ab bc c d de ef f + * ag abgh bchi ci dj dejk efkl fl + * gm ghmn hino io jp jkpq klqr lr + * m mn no o p pq qr r + */ + + const uint32_t dst_x = src_x * 4 / 3; + const uint32_t src_skip = src_pitch - src_x * sizeof(uint16_t), + dst_skip = dst_pitch - dst_x * sizeof(uint16_t); + + uint32_t x, y; + + for (y = 0; y < src_y; y += 3) { + for (x = 0; x < src_x / 6; x++) { + // -- Row 1 -- + // Read RGB565 elements in the source grid. + // The notation is high_low (little-endian). + uint32_t b_a = (*(uint32_t*) (from )), + d_c = (*(uint32_t*) (from + 2)), + f_e = (*(uint32_t*) (from + 4)); + + // Generate ab_a from b_a. + *(uint32_t*) (to) = likely(Hi(b_a) == Lo(b_a)) + ? b_a + : Lo(b_a) /* 'a' verbatim to low pixel */ | + Raise(Average(Hi(b_a), Lo(b_a))) /* ba to high pixel */; + + // Generate c_bc from b_a and d_c. + *(uint32_t*) (to + 2) = likely(Hi(b_a) == Lo(d_c)) + ? Lo(d_c) | Raise(Lo(d_c)) + : Raise(Lo(d_c)) /* 'c' verbatim to high pixel */ | + Average(Lo(d_c), Hi(b_a)) /* bc to low pixel */; + + // Generate de_d from d_c and f_e. + *(uint32_t*) (to + 4) = likely(Hi(d_c) == Lo(f_e)) + ? Lo(f_e) | Raise(Lo(f_e)) + : Hi(d_c) /* 'd' verbatim to low pixel */ | + Raise(Average(Lo(f_e), Hi(d_c))) /* de to high pixel */; + + // Generate f_ef from f_e. + *(uint32_t*) (to + 6) = likely(Hi(f_e) == Lo(f_e)) + ? f_e + : Raise(Hi(f_e)) /* 'f' verbatim to high pixel */ | + Average(Hi(f_e), Lo(f_e)) /* ef to low pixel */; + + if (likely(y + 1 < src_y)) // Is there a source row 2? + { + // -- Row 2 -- + uint32_t h_g = (*(uint32_t*) ((uint8_t*) from + src_pitch )), + j_i = (*(uint32_t*) ((uint8_t*) from + src_pitch + 4)), + l_k = (*(uint32_t*) ((uint8_t*) from + src_pitch + 8)); + + // Generate abgh_ag from b_a and h_g. + uint32_t bh_ag = Average32(b_a, h_g); + *(uint32_t*) ((uint8_t*) to + dst_pitch) = likely(Hi(bh_ag) == Lo(bh_ag)) + ? bh_ag + : Lo(bh_ag) /* ag verbatim to low pixel */ | + Raise(Average(Hi(bh_ag), Lo(bh_ag))) /* abgh to high pixel */; + + // Generate ci_bchi from b_a, d_c, h_g and j_i. + uint32_t ci_bh = + Hi(bh_ag) /* bh verbatim to low pixel */ | + Raise(Average(Lo(d_c), Lo(j_i))) /* ci to high pixel */; + *(uint32_t*) ((uint8_t*) to + dst_pitch + 4) = likely(Hi(ci_bh) == Lo(ci_bh)) + ? ci_bh + : Raise(Hi(ci_bh)) /* ci verbatim to high pixel */ | + Average(Hi(ci_bh), Lo(ci_bh)) /* bchi to low pixel */; + + // Generate fl_efkl from f_e and l_k. + uint32_t fl_ek = Average32(f_e, l_k); + *(uint32_t*) ((uint8_t*) to + dst_pitch + 12) = likely(Hi(fl_ek) == Lo(fl_ek)) + ? fl_ek + : Raise(Hi(fl_ek)) /* fl verbatim to high pixel */ | + Average(Hi(fl_ek), Lo(fl_ek)) /* efkl to low pixel */; + + // Generate dejk_dj from d_c, f_e, j_i and l_k. + uint32_t ek_dj = + Raise(Lo(fl_ek)) /* ek verbatim to high pixel */ | + Average(Hi(d_c), Hi(j_i)) /* dj to low pixel */; + *(uint32_t*) ((uint8_t*) to + dst_pitch + 8) = likely(Hi(ek_dj) == Lo(ek_dj)) + ? ek_dj + : Lo(ek_dj) /* dj verbatim to low pixel */ | + Raise(Average(Hi(ek_dj), Lo(ek_dj))) /* dejk to high pixel */; + + if (likely(y + 2 < src_y)) // Is there a source row 3? + { + // -- Row 3 -- + uint32_t n_m = (*(uint32_t*) ((uint8_t*) from + src_pitch * 2 )), + p_o = (*(uint32_t*) ((uint8_t*) from + src_pitch * 2 + 4)), + r_q = (*(uint32_t*) ((uint8_t*) from + src_pitch * 2 + 8)); + + // Generate ghmn_gm from h_g and n_m. + uint32_t hn_gm = Average32(h_g, n_m); + *(uint32_t*) ((uint8_t*) to + dst_pitch * 2) = likely(Hi(hn_gm) == Lo(hn_gm)) + ? hn_gm + : Lo(hn_gm) /* gm verbatim to low pixel */ | + Raise(Average(Hi(hn_gm), Lo(hn_gm))) /* ghmn to high pixel */; + + // Generate io_hino from h_g, j_i, n_m and p_o. + uint32_t io_hn = + Hi(hn_gm) /* hn verbatim to low pixel */ | + Raise(Average(Lo(j_i), Lo(p_o))) /* io to high pixel */; + *(uint32_t*) ((uint8_t*) to + dst_pitch * 2 + 4) = likely(Hi(io_hn) == Lo(io_hn)) + ? io_hn + : Raise(Hi(io_hn)) /* io verbatim to high pixel */ | + Average(Hi(io_hn), Lo(io_hn)) /* hino to low pixel */; + + // Generate lr_klqr from l_k and r_q. + uint32_t lr_kq = Average32(l_k, r_q); + *(uint32_t*) ((uint8_t*) to + dst_pitch * 2 + 12) = likely(Hi(lr_kq) == Lo(lr_kq)) + ? lr_kq + : Raise(Hi(lr_kq)) /* lr verbatim to high pixel */ | + Average(Hi(lr_kq), Lo(lr_kq)) /* klqr to low pixel */; + + // Generate jkpq_jp from j_i, l_k, p_o and r_q. + uint32_t kq_jp = + Raise(Lo(lr_kq)) /* kq verbatim to high pixel */ | + Average(Hi(j_i), Hi(p_o)) /* jp to low pixel */; + *(uint32_t*) ((uint8_t*) to + dst_pitch * 2 + 8) = likely(Hi(kq_jp) == Lo(kq_jp)) + ? kq_jp + : Lo(kq_jp) /* jp verbatim to low pixel */ | + Raise(Average(Hi(kq_jp), Lo(kq_jp))) /* jkpq to high pixel */; + + // -- Row 4 -- + // Generate mn_m from n_m. + *(uint32_t*) ((uint8_t*) to + dst_pitch * 3) = likely(Hi(n_m) == Lo(n_m)) + ? n_m + : Lo(n_m) /* 'm' verbatim to low pixel */ | + Raise(Average(Hi(n_m), Lo(n_m))) /* mn to high pixel */; + + // Generate o_no from n_m and p_o. + *(uint32_t*) ((uint8_t*) to + dst_pitch * 3 + 4) = likely(Hi(n_m) == Lo(p_o)) + ? Lo(p_o) | Raise(Lo(p_o)) + : Raise(Lo(p_o)) /* 'o' verbatim to high pixel */ | + Average(Lo(p_o), Hi(n_m)) /* no to low pixel */; + + // Generate pq_p from p_o and r_q. + *(uint32_t*) ((uint8_t*) to + dst_pitch * 3 + 8) = likely(Hi(p_o) == Lo(r_q)) + ? Lo(r_q) | Raise(Lo(r_q)) + : Hi(p_o) /* 'p' verbatim to low pixel */ | + Raise(Average(Hi(p_o), Lo(r_q))) /* pq to high pixel */; + + // Generate r_qr from r_q. + *(uint32_t*) ((uint8_t*) to + dst_pitch * 3 + 12) = likely(Hi(r_q) == Lo(r_q)) + ? r_q + : Raise(Hi(r_q)) /* 'r' verbatim to high pixel */ | + Average(Hi(r_q), Lo(r_q)) /* qr to low pixel */; + } + } + + from += 6; + to += 8; + } + + // Skip past the waste at the end of the first line, if any, + // then past 2 whole lines of source and 3 of destination. + from = (uint16_t*) ((uint8_t*) from + src_skip + 2 * src_pitch); + to = (uint16_t*) ((uint8_t*) to + dst_skip + 3 * dst_pitch); + } +} + +#define GCW0_SCREEN_WIDTH 320 +#define GCW0_SCREEN_HEIGHT 240 + +#define GBA_SCREEN_WIDTH 240 +#define GBA_SCREEN_HEIGHT 160 + +void flip_screen() +{ + SDL_Rect srect, drect; + + if ((video_scale != 1) && (current_scale != unscaled)) + { + s32 x, y; + s32 x2, y2; + u16 *screen_ptr = get_screen_pixels(); + u16 *current_scanline_ptr = screen_ptr; + u32 pitch = get_screen_pitch(); + u16 current_pixel; + u32 i; + + switch(video_scale) + { + case 2: + integer_scale_horizontal(2); + break; + case 3: + integer_scale_horizontal(3); + break; + default: + case 4: + integer_scale_horizontal(4); + break; + } + + for(y = 159, y2 = (160 * video_scale) - 1; y >= 0; y--) + { + for(i = 0; i < video_scale; i++) + { + memcpy(screen_ptr + (y2 * pitch), + screen_ptr + (y * pitch), 480 * video_scale); + y2--; + } + } + + } + + + if ((resolution_width == small_resolution_width) && (resolution_height == small_resolution_height)) + { + switch (screen_scale) + { + case 0: + srect.x = 0; + srect.y = 0; + srect.w = 240; + srect.h = 160; + drect.x = 40; + drect.y = 40; + drect.w = 240; + drect.h = 160; + #ifdef ARM_ARCH + warm_cache_op_all(WOP_D_CLEAN); + #endif + SDL_BlitSurface(screen, &srect, rl_screen, &drect); + break; + case 1: + + gba_upscale_aspect((uint16_t*) ((uint8_t*) + rl_screen->pixels + + (((GCW0_SCREEN_HEIGHT - (GBA_SCREEN_HEIGHT) * 4 / 3) / 2) * rl_screen->pitch)) /* center vertically */, + screen->pixels, GBA_SCREEN_WIDTH, GBA_SCREEN_HEIGHT, screen->pitch, rl_screen->pitch); + break; + default: + gba_upscale(rl_screen->pixels, screen->pixels, GBA_SCREEN_WIDTH, GBA_SCREEN_HEIGHT, screen->pitch, rl_screen->pitch); + break; + } + } + else + { + SDL_BlitSurface(screen, NULL, rl_screen, NULL); + } + SDL_Flip(rl_screen); } #endif @@ -3627,7 +3954,9 @@ void init_video() warm_change_cb_upper(WCB_C_BIT|WCB_B_BIT, 1); #else - screen = SDL_SetVideoMode(240 * video_scale, 160 * video_scale, 16, 0); + rl_screen = SDL_SetVideoMode(320 * video_scale, 240 * video_scale, 16, SDL_HWSURFACE); + screen = SDL_CreateRGBSurface(SDL_SWSURFACE, 240 * video_scale, 160 * video_scale, 16, 0, 0, 0, 0); + //screen = SDL_SetVideoMode(240 * video_scale, 160 * video_scale, 16, 0); #endif SDL_ShowCursor(0); } @@ -3807,9 +4136,9 @@ void video_resolution_large() #if defined (RPI_BUILD) resolution_width = 480; #else - resolution_width = 400; + resolution_width = 320; #endif - resolution_height = 272; + resolution_height = 240; fb_set_mode(resolution_width, resolution_height, 1, 15, screen_filter, screen_filter2); flip_screen(); @@ -3858,9 +4187,12 @@ void video_resolution_large() warm_change_cb_upper(WCB_C_BIT|WCB_B_BIT, 1); #else - screen = SDL_SetVideoMode(480, 272, 16, 0); - resolution_width = 480; - resolution_height = 272; + resolution_width = 320; + resolution_height = 240; + rl_screen = SDL_SetVideoMode(resolution_width * video_scale, resolution_height * video_scale, 16, SDL_HWSURFACE); + screen = SDL_CreateRGBSurface(SDL_SWSURFACE, resolution_width * video_scale, resolution_height * video_scale, 16, 0, 0, 0, 0); + /*screen = SDL_SetVideoMode(320, 240, 16, 0);*/ + #endif } @@ -3893,8 +4225,10 @@ void video_resolution_small() warm_change_cb_upper(WCB_C_BIT|WCB_B_BIT, 1); #else - screen = SDL_SetVideoMode(small_resolution_width * video_scale, - small_resolution_height * video_scale, 16, 0); + rl_screen = SDL_SetVideoMode(320 * video_scale, 240 * video_scale, 16, SDL_HWSURFACE); + screen = SDL_CreateRGBSurface(SDL_SWSURFACE, 320 * video_scale, 240 * video_scale, 16, 0, 0, 0, 0); + /*screen = SDL_SetVideoMode(small_resolution_width * video_scale, + small_resolution_height * video_scale, 16, 0);*/ #endif resolution_width = small_resolution_width; resolution_height = small_resolution_height; diff --git a/video.h b/video.h index a8059bd7..b9b6220f 100644 --- a/video.h +++ b/video.h @@ -75,19 +75,14 @@ typedef struct bitmap_render_function normal_render; } bitmap_layer_render_struct; + + typedef enum { unscaled, scaled_aspect, -#ifdef POLLUX_BUILD - unscaled_rot, - scaled_aspect_rot, -#elif defined(GP2X_BUILD) fullscreen, scaled_aspect_sw, -#else - fullscreen, -#endif } video_scale_type; typedef enum diff --git a/x86/Makefile b/x86/Makefile index c1d772b2..62045722 100644 --- a/x86/Makefile +++ b/x86/Makefile @@ -10,14 +10,14 @@ AS = as PREFIX = /usr OBJS = main.o cpu.o memory.o video.o input.o sound.o \ cpu_threaded.o gui.o x86_stub.o cheats.o zip.o -BIN ?= gpsp.exe +BIN ?= gpsp # Platform specific definitions VPATH += .. CFLAGS += -DPC_BUILD -Wall -m32 -INCLUDES = -I${PREFIX}/include `sdl-config --cflags` -LIBS = -L${PREFIX}/lib `sdl-config --libs` -mconsole -lz -m32 +INCLUDES = `sdl-config --cflags` +LIBS = `sdl-config --libs` -lz -m32 # Compilation: