diff --git a/EWSTM8/vc288.ewp b/EWSTM8/vc288.ewp
index 73f95bc..c6eb067 100644
--- a/EWSTM8/vc288.ewp
+++ b/EWSTM8/vc288.ewp
@@ -1605,6 +1605,808 @@
+
+ Debug_STM8s103
+
+ STM8
+
+ 1
+
+ General
+ 4
+
+ 2
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCSTM8
+ 3
+
+ 9
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ASTM8
+ 3
+
+ 2
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 0
+ 1
+ 1
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 4
+
+ 3
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 3
+
+ 0
+ 1
+ 1
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
src
diff --git a/src/adc.c b/src/adc.c
index 4c07dcc..ab915d1 100644
--- a/src/adc.c
+++ b/src/adc.c
@@ -2,7 +2,50 @@
#include "adc.h"
#include
-#define VAR_ADC_SCAN
+//#define VAR_ADC_SCAN
+
+#define ADC_DB(n,ml) REGVAR(REGVAR(ADC_DB,n), ml);
+#define ADC_DB_VOLTS_RL ADC_DB(CANELADC_VOLTS,_RL)
+#define ADC_DB_VOLTS_RH ADC_DB(CANELADC_VOLTS,_RH)
+
+#if CANELADC_AMPS < CANELADC_VOLTS
+ #define CANELADC_HIGH CANELADC_VOLTS
+#else
+ #define CANELADC_HIGH CANELADC_AMPS
+#endif
+
+#define FREQ_ADC_SAMPLING ((FREQ_AVERAGE_NETWORK*2)*(1< Prescaler = fmaster/8.
+#elif FREQ_ADC_SAMPLING < 9600
+//FREQ_AVERAGE_NETWORK 150
+#define ADC_PRESCALE_DEF (ADC_CR1_SPSEL0|ADC_CR1_SPSEL1) // |> Prescaler = fmaster/6.
+#elif FREQ_ADC_SAMPLING < 28800
+//FREQ_AVERAGE_NETWORK 450
+#define ADC_PRESCALE_DEF (ADC_CR1_SPSEL1) // |> Prescaler = fmaster/4.
+#else
+#error FREQ_ADC_SAMPLING > 30719
+#endif
+#else
+#if FREQ_ADC_SAMPLING < 16384
+//FREQ_AVERAGE_NETWORK 255
+#define ADC_PRESCALE_DEF (ADC_CR1_SPSEL2) // |> Prescaler = fmaster/8.
+#elif FREQ_ADC_SAMPLING < 21845
+//FREQ_AVERAGE_NETWORK 341
+#define ADC_PRESCALE_DEF (ADC_CR1_SPSEL0|ADC_CR1_SPSEL1) // |> Prescaler = fmaster/6.
+#elif FREQ_ADC_SAMPLING < 32768
+//FREQ_AVERAGE_NETWORK 510
+#define ADC_PRESCALE_DEF (ADC_CR1_SPSEL1) // |> Prescaler = fmaster/4.
+#else
+#error FREQ_ADC_SAMPLING > 32767
+#endif
+#endif
+
+
static volatile uint16_t adc_meas_cnt = 0;
static volatile uint32_t adc_ch3_avg = 0;
@@ -32,18 +75,18 @@ ISR(ADC1_EOC_IRQHandler, ITC_IRQ_ADC1)
temp16 = ((uint16_t)templ)<<8 | ADC_DRL;
// Reset the EOC flag, otherwise it will fire again straight away.
CLRBIT(ADC_CSR, ADC_CSR_EOC);
- if((ADC_CSR & ADC_CSR_CH2)==0){
+ if((ADC_CSR & 0x0F) == CANELADC_AMPS){
adc_ch3_avg += temp16;
- CLRBIT(ADC_CSR, ADC_CSR_CH0); // -
- CLRBIT(ADC_CSR, ADC_CSR_CH1); // |> ADC samples AIN4 only.
- SETBIT(ADC_CSR, ADC_CSR_CH2); // |
+
+ ADC_CSR = (ADC_CSR & 0xF0) | CANELADC_VOLTS;
+
SETBIT(ADC_CR1, ADC_CR1_ADON);
}
else{
adc_ch4_avg += temp16;
- SETBIT(ADC_CSR, ADC_CSR_CH0); // -
- SETBIT(ADC_CSR, ADC_CSR_CH1); // |> ADC samples AIN3 only.
- CLRBIT(ADC_CSR, ADC_CSR_CH2); // |
+
+ ADC_CSR = (ADC_CSR & 0xF0) | CANELADC_AMPS;
+
if (adc_meas_cnt++ == (1 << ADC_AVERAGE_SAMPLES_BASE_2))
{
adc_ch3 = adc_ch3_avg >> ADC_AVERAGE_SAMPLES_BASE_2;
@@ -56,11 +99,11 @@ ISR(ADC1_EOC_IRQHandler, ITC_IRQ_ADC1)
}
}
#else
- templ= ADC_DB3RH;
- temp16= ((uint16_t)templ << 8) | ADC_DB3RL;
+ templ= ADC_DB(CANELADC_AMPS,RH);
+ temp16= ((uint16_t)templ << 8) | ADC_DB(CANELADC_AMPS,RL);
adc_ch3_avg += temp16;
- templ= ADC_DB4RH;
- temp16= ((uint16_t)templ << 8) | ADC_DB4RL;
+ templ= ADC_DB(CANELADC_VOLTS,RH);
+ temp16= ((uint16_t)templ << 8) | ADC_DB(CANELADC_VOLTS,RL);
adc_ch4_avg += temp16;
// Reset the EOC flag, otherwise it will fire again straight away.
CLRBIT(ADC_CSR, ADC_CSR_EOC);
@@ -94,16 +137,9 @@ void setup_adc(void)
//SETBIT(ADC_CR1, ADC_CR1_ADON);
CLRBIT(ADC_CR1, ADC_CR1_ADON);
- SETBIT(ADC_CSR, ADC_CSR_CH0); // -
- SETBIT(ADC_CSR, ADC_CSR_CH1); // |> ADC samples AIN3 only.
- CLRBIT(ADC_CSR, ADC_CSR_CH2); // |
- CLRBIT(ADC_CSR, ADC_CSR_CH3); // |
-
- SETBIT(ADC_CSR, ADC_CSR_EOCIE); // Enable the interrupt after conversion completed.
+ ADC_CSR = (ADC_CSR & 0xF0) | CANELADC_AMPS | ADC_CSR_EOCIE;
- CLRBIT(ADC_CR1, ADC_CR1_SPSEL0); // -
- CLRBIT(ADC_CR1, ADC_CR1_SPSEL1); // |> Prescaler = fmaster/8.
- SETBIT(ADC_CR1, ADC_CR1_SPSEL2); // -
+ ADC_CR1 = (ADC_CR1 & ~(ADC_CR1_SPSEL0|ADC_CR1_SPSEL1|ADC_CR1_SPSEL2)) | ADC_PRESCALE_DEF; //Prescaler = fmaster/ADC_PRESCALE_DEF.
//CLRBIT(ADC_CR1, ADC_CR1_CONT); // -
@@ -118,16 +154,10 @@ void setup_adc(void)
//SETBIT(ADC_CR1, ADC_CR1_ADON);
CLRBIT(ADC_CR1, ADC_CR1_ADON);
- CLRBIT(ADC_CSR, ADC_CSR_CH0); // -
- CLRBIT(ADC_CSR, ADC_CSR_CH1); // |> ADC samples AIN4 only.
- SETBIT(ADC_CSR, ADC_CSR_CH2); // |
- CLRBIT(ADC_CSR, ADC_CSR_CH3); // |
+ ADC_CSR = (ADC_CSR & 0xF0) | CANELADC_HIGH | ADC_CSR_EOCIE;
- SETBIT(ADC_CSR, ADC_CSR_EOCIE); // Enable the interrupt after conversion completed.
+ ADC_CR1 = (ADC_CR1 & ~(ADC_CR1_SPSEL0|ADC_CR1_SPSEL1|ADC_CR1_SPSEL2)) | ADC_PRESCALE_DEF; //Prescaler = fmaster/ADC_PRESCALE_DEF.
- CLRBIT(ADC_CR1, ADC_CR1_SPSEL0); // -
- CLRBIT(ADC_CR1, ADC_CR1_SPSEL1); // |> Prescaler = fmaster/8.
- SETBIT(ADC_CR1, ADC_CR1_SPSEL2); // -
//CLRBIT(ADC_CR1, ADC_CR1_CONT); // -
SETBIT(ADC_CR3, ADC_CR3_DBUF); ///< When DBUF is set, converted values are stored in the ADC_DBxRH and ADC_DBxRL registers instead of the ADC_DRH and ADC_DRL registers.
@@ -140,8 +170,8 @@ void setup_adc(void)
/*------------------TDR configuration ---------------------------*/
ADC_TDRH = 0x00;
- ADC_TDRL = (1<<4)|(1<<3);
-
+ ADC_TDRL = (1< 6 || CANELADC_VOLTS == CANELADC_AMPS
+#error defined CANELADC_VOLTS!
+#endif
+
+#if !defined(CANELADC_AMPS) || CANELADC_AMPS < 2 || CANELADC_AMPS > 6
+#error defined CANELADC_AMPS!
+#endif
+
+
#endif /* __CONFIG_8S003_H */
\ No newline at end of file
diff --git a/src/display_7seg.c b/src/display_7seg.c
index a683908..db6b396 100644
--- a/src/display_7seg.c
+++ b/src/display_7seg.c
@@ -52,14 +52,12 @@ void set_display_from_int(uint16_t number,
uint8_t digits)
{
// Note: 8th bit controls the decimal place dot
- display_data[row+2] = (digits & 1 ? seven_seg_lut[number % 10] : 0) |
- (decimal_dots & 1 ? SEG_MASK_DP : 0);
+ display_data[row+2] = (digits & SEVEN_SEG_DIGITS_RIGHTMOST ? seven_seg_lut[number % 10] : 0) |
+ (decimal_dots & SEVEN_SEG_DP_RIGHTMOST ? SEG_MASK_DP : 0);
number /= 10;
- decimal_dots >>= 1;
- display_data[row+1] = (digits & 1 ? seven_seg_lut[number % 10] : 0) |
- (decimal_dots & 1 ? SEG_MASK_DP : 0);
+ display_data[row+1] = (digits & SEVEN_SEG_DIGITS_MIDDLE ? seven_seg_lut[number % 10] : 0) |
+ (decimal_dots & SEVEN_SEG_DP_MIDDLE ? SEG_MASK_DP : 0);
number /= 10;
- decimal_dots >>= 1;
- display_data[row+0] = (digits & 1 ? seven_seg_lut[number % 10] : 0) |
- (decimal_dots & 1 ? SEG_MASK_DP : 0);
+ display_data[row+0] = (digits & SEVEN_SEG_DIGITS_LEFTMOST ? seven_seg_lut[number % 10] : 0) |
+ (decimal_dots & SEVEN_SEG_DP_LEFTMOST ? SEG_MASK_DP : 0);
}
\ No newline at end of file
diff --git a/src/gpio_8s003.c b/src/gpio_8s003.c
index 444bc4e..6864bfc 100644
--- a/src/gpio_8s003.c
+++ b/src/gpio_8s003.c
@@ -50,80 +50,105 @@ void setup_gpios(void)
*/
/* A */
-#if !defined(SWIM_DEBUG_ENABLED)
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_A))
/* Note: PD1 is also used for SWIM. You can't use the segment A while using SWIM */
SETBIT(PORT(MCD_A_PORT,DDR), MCD_A_PIN); /* out */
SETBIT(PORT(MCD_A_PORT,CR1), MCD_A_PIN); /* push pull */
CLRBIT(PORT(MCD_A_PORT,CR2), MCD_A_PIN); /* speed 2MHz*/
#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_B))
/* B */
SETBIT(PORT(MCD_B_PORT,DDR), MCD_B_PIN); /* out */
SETBIT(PORT(MCD_B_PORT,CR1), MCD_B_PIN); /* push pull */
CLRBIT(PORT(MCD_B_PORT,CR2), MCD_B_PIN); /* speed 2MHz*/
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_C))
/* C */
SETBIT(PORT(MCD_C_PORT,DDR), MCD_C_PIN); /* out */
SETBIT(PORT(MCD_C_PORT,CR1), MCD_C_PIN); /* push pull */
CLRBIT(PORT(MCD_C_PORT,CR2), MCD_C_PIN); /* speed 2MHz*/
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_D))
/* D */
SETBIT(PORT(MCD_D_PORT,DDR), MCD_D_PIN); /* out */
SETBIT(PORT(MCD_D_PORT,CR1), MCD_D_PIN); /* push pull */
CLRBIT(PORT(MCD_D_PORT,CR2), MCD_D_PIN); /* speed 2MHz*/
+#endif
+
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_E))
/* E */
SETBIT(PORT(MCD_E_PORT,DDR), MCD_E_PIN); /* out */
SETBIT(PORT(MCD_E_PORT,CR1), MCD_E_PIN); /* push pull */
CLRBIT(PORT(MCD_E_PORT,CR2), MCD_E_PIN); /* speed 2MHz*/
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_F))
/* F */
SETBIT(PORT(MCD_F_PORT,DDR), MCD_F_PIN); /* out */
SETBIT(PORT(MCD_F_PORT,CR1), MCD_F_PIN); /* push pull */
CLRBIT(PORT(MCD_F_PORT,CR2), MCD_F_PIN); /* speed 2MHz*/
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_G))
/* G */
SETBIT(PORT(MCD_G_PORT,DDR), MCD_G_PIN); /* out */
SETBIT(PORT(MCD_G_PORT,CR1), MCD_G_PIN); /* push pull */
CLRBIT(PORT(MCD_G_PORT,CR2), MCD_G_PIN); /* speed 2MHz*/
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_DP))
/* Decimal point */
SETBIT(PORT(MCD_DP_PORT,DDR), MCD_DP_PIN); /* out */
SETBIT(PORT(MCD_DP_PORT,CR1), MCD_DP_PIN); /* push pull */
CLRBIT(PORT(MCD_DP_PORT,CR2), MCD_DP_PIN); /* speed 2MHz*/
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD1_AD1))
/**
* First row of LEDs (common anodes/cathodes)
*/
SETBIT(PORT(MCD1_AD1_PORT,DDR), MCD1_AD1_PIN); /* out */
SETBIT(PORT(MCD1_AD1_PORT,CR1), MCD1_AD1_PIN); /* push pull */
CLRBIT(PORT(MCD1_AD1_PORT,CR2), MCD1_AD1_PIN); /* speed 2MHz*/
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD1_AD2))
SETBIT(PORT(MCD1_AD2_PORT,DDR), MCD1_AD2_PIN); /* out */
SETBIT(PORT(MCD1_AD2_PORT,CR1), MCD1_AD2_PIN); /* push pull */
CLRBIT(PORT(MCD1_AD2_PORT,CR2), MCD1_AD2_PIN); /* speed 2MHz*/
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD1_AD3))
SETBIT(PORT(MCD1_AD3_PORT,DDR), MCD1_AD3_PIN); /* out */
SETBIT(PORT(MCD1_AD3_PORT,CR1), MCD1_AD3_PIN); /* push pull */
CLRBIT(PORT(MCD1_AD3_PORT,CR2), MCD1_AD3_PIN); /* speed 2MHz*/
-
-
- /* PD6 needs to be controlled with programming_pin_control() */
+#endif
+ /* PD6 needs to be controlled with programming_pin_control() */
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD2_AD1))
/**
* Second row of LEDs (common anodes/cathodes)
*/
SETBIT(PORT(MCD2_AD1_PORT,DDR), MCD2_AD1_PIN); /* out */
SETBIT(PORT(MCD2_AD1_PORT,CR1), MCD2_AD1_PIN); /* push pull */
CLRBIT(PORT(MCD2_AD1_PORT,CR2), MCD2_AD1_PIN); /* speed 2MHz*/
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD2_AD2))
SETBIT(PORT(MCD2_AD2_PORT,DDR), MCD2_AD2_PIN); /* out */
SETBIT(PORT(MCD2_AD2_PORT,CR1), MCD2_AD2_PIN); /* push pull */
CLRBIT(PORT(MCD2_AD2_PORT,CR2), MCD2_AD2_PIN); /* speed 2MHz*/
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD2_AD3))
SETBIT(PORT(MCD2_AD3_PORT,DDR), MCD2_AD3_PIN); /* out */
SETBIT(PORT(MCD2_AD3_PORT,CR1), MCD2_AD3_PIN); /* push pull */
CLRBIT(PORT(MCD2_AD3_PORT,CR2), MCD2_AD3_PIN); /* speed 2MHz*/
+#endif
}
uint8_t read_programming_pin(void)
@@ -150,40 +175,66 @@ void programming_pin_control(uint8_t is_input)
void set_segments(uint8_t data)
{
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_G))
// G
if (SEGDATASETS(data, SEG_MASK_G)) { SETBIT(PORT(MCD_G_PORT,ODR), MCD_G_PIN); } else { CLRBIT(PORT(MCD_G_PORT,ODR), MCD_G_PIN); }
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_F))
// F
if (SEGDATASETS(data, SEG_MASK_F)) { SETBIT(PORT(MCD_F_PORT,ODR), MCD_F_PIN); } else { CLRBIT(PORT(MCD_F_PORT,ODR), MCD_F_PIN); }
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_E))
// E
if (SEGDATASETS(data, SEG_MASK_E)) { SETBIT(PORT(MCD_E_PORT,ODR), MCD_E_PIN); } else { CLRBIT(PORT(MCD_E_PORT,ODR), MCD_E_PIN); }
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_D))
// D
if (SEGDATASETS(data, SEG_MASK_D)) { SETBIT(PORT(MCD_D_PORT,ODR), MCD_D_PIN); } else { CLRBIT(PORT(MCD_D_PORT,ODR), MCD_D_PIN); }
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_C))
// C
if (SEGDATASETS(data, SEG_MASK_C)) { SETBIT(PORT(MCD_C_PORT,ODR), MCD_C_PIN); } else { CLRBIT(PORT(MCD_C_PORT,ODR), MCD_C_PIN); }
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_B))
// B
if (SEGDATASETS(data, SEG_MASK_B)) { SETBIT(PORT(MCD_B_PORT,ODR), MCD_B_PIN); } else { CLRBIT(PORT(MCD_B_PORT,ODR), MCD_B_PIN); }
+#endif
-#if !defined(SWIM_DEBUG_ENABLED)
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_A))
// A (same pin of SWIM)
if (SEGDATASETS(data, SEG_MASK_A)) { SETBIT(PORT(MCD_A_PORT,ODR), MCD_A_PIN); } else { CLRBIT(PORT(MCD_A_PORT,ODR), MCD_A_PIN); }
#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD_DP))
// Dp
if (SEGDATASETS(data, SEG_MASK_DP)) { SETBIT(PORT(MCD_DP_PORT,ODR), MCD_DP_PIN); } else { CLRBIT(PORT(MCD_DP_PORT,ODR), MCD_DP_PIN); }
+#endif
}
void select_digit(uint8_t digit)
{
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD1_AD1))
if (SEGROWSELECT(digit, 0)) { SETBIT(PORT(MCD1_AD1_PORT,ODR), MCD1_AD1_PIN); } else { CLRBIT(PORT(MCD1_AD1_PORT,ODR), MCD1_AD1_PIN); }
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD1_AD2))
if (SEGROWSELECT(digit, 1)) { SETBIT(PORT(MCD1_AD2_PORT,ODR), MCD1_AD2_PIN); } else { CLRBIT(PORT(MCD1_AD2_PORT,ODR), MCD1_AD2_PIN); }
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD1_AD3))
if (SEGROWSELECT(digit, 2)) { SETBIT(PORT(MCD1_AD3_PORT,ODR), MCD1_AD3_PIN); } else { CLRBIT(PORT(MCD1_AD3_PORT,ODR), MCD1_AD3_PIN); }
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD2_AD1))
if (SEGROWSELECT(digit, 3)) { SETBIT(PORT(MCD2_AD1_PORT,ODR), MCD2_AD1_PIN); } else { CLRBIT(PORT(MCD2_AD1_PORT,ODR), MCD2_AD1_PIN); }
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD2_AD2))
if (SEGROWSELECT(digit, 4)) { SETBIT(PORT(MCD2_AD2_PORT,ODR), MCD2_AD2_PIN); } else { CLRBIT(PORT(MCD2_AD2_PORT,ODR), MCD2_AD2_PIN); }
+#endif
+#if !(defined(SWIM_DEBUG_ENABLED) && defined(SWIM_DEBUG_MCD2_AD3))
if (SEGROWSELECT(digit, 5)) { SETBIT(PORT(MCD2_AD3_PORT,ODR), MCD2_AD3_PIN); } else { CLRBIT(PORT(MCD2_AD3_PORT,ODR), MCD2_AD3_PIN); }
+#endif
}
\ No newline at end of file
diff --git a/src/main.c b/src/main.c
index b508c62..ced9355 100644
--- a/src/main.c
+++ b/src/main.c
@@ -101,34 +101,58 @@ static void set_display_from_double(
{
/* 10.0 - 99.9 */
value = roundf(value * 10.0);
- set_display_from_int(
- (uint16_t)(value),
- pos,
- SEVEN_SEG_DP_MIDDLE,
- SEVEN_SEG_DIGITS_ALL
- );
+ if(value<1000.0)
+ set_display_from_int(
+ (uint16_t)(value),
+ pos,
+ SEVEN_SEG_DP_MIDDLE,
+ SEVEN_SEG_DIGITS_ALL
+ );
+ else
+ set_display_from_int(
+ (uint16_t)(value/10.0),
+ pos,
+ SEVEN_SEG_DP_RIGHTMOST,
+ SEVEN_SEG_DIGITS_ALL
+ );
}
else if (value >= 1.0)
{
/* 1.00 - 9.99 */
value = roundf(value * 100.0);
- set_display_from_int(
- (uint16_t)(value),
- pos,
- SEVEN_SEG_DP_LEFTMOST,
- SEVEN_SEG_DIGITS_ALL
- );
+ if(value<1000.0)
+ set_display_from_int(
+ (uint16_t)(value),
+ pos,
+ SEVEN_SEG_DP_LEFTMOST,
+ SEVEN_SEG_DIGITS_ALL
+ );
+ else
+ set_display_from_int(
+ (uint16_t)(value/10.0),
+ pos,
+ SEVEN_SEG_DP_MIDDLE,
+ SEVEN_SEG_DIGITS_ALL
+ );
}
else
{
/* .000 - .999 */
value = roundf(value * 1000.0);
- set_display_from_int(
- (uint16_t)(value),
- pos,
- SEVEN_SEG_DP_NONE,
- SEVEN_SEG_DIGITS_ALL
- );
+ if(value<1000.0)
+ set_display_from_int(
+ (uint16_t)(value),
+ pos,
+ SEVEN_SEG_DP_NONE,
+ SEVEN_SEG_DIGITS_ALL
+ );
+ else
+ set_display_from_int(
+ (uint16_t)(value/10.0),
+ pos,
+ SEVEN_SEG_DP_LEFTMOST,
+ SEVEN_SEG_DIGITS_ALL
+ );
}
}
else
@@ -158,23 +182,39 @@ static void set_display_from_double(
{
/* 10.0 - 99.9 */
value = roundf(value * 10.0);
- set_display_from_int(
- (uint16_t)(value),
- pos,
- SEVEN_SEG_DP_MIDDLE,
- SEVEN_SEG_DIGITS_ALL
- );
+ if(value<1000.0)
+ set_display_from_int(
+ (uint16_t)(value),
+ pos,
+ SEVEN_SEG_DP_MIDDLE,
+ SEVEN_SEG_DIGITS_ALL
+ );
+ else
+ set_display_from_int(
+ (uint16_t)(value/10.0),
+ pos,
+ SEVEN_SEG_DP_RIGHTMOST,
+ SEVEN_SEG_DIGITS_ALL
+ );
}
else
{
/* 0.0 - 9.9 */
- value = roundf(value * 100.0);
- set_display_from_int(
- (uint16_t)(value),
- pos,
- SEVEN_SEG_DP_MIDDLE,
- SEVEN_SEG_DIGITS_MIDDLE | SEVEN_SEG_DIGITS_RIGHTMOST
- );
+ value = roundf(value * 10.0);
+ if(value<100.0)
+ set_display_from_int(
+ (uint16_t)(value),
+ pos,
+ SEVEN_SEG_DP_MIDDLE,
+ SEVEN_SEG_DIGITS_MIDDLE | SEVEN_SEG_DIGITS_RIGHTMOST
+ );
+ else
+ set_display_from_int(
+ (uint16_t)(value),
+ pos,
+ SEVEN_SEG_DP_MIDDLE,
+ SEVEN_SEG_DIGITS_ALL
+ );
}
}
}
@@ -206,7 +246,7 @@ static void do_measure(void)
if (value < 0) { value = 0; }
/* Scale */
value *= settings->adc_amps.scaling;
-#ifdef VOLTS_DISPLAY_ALIGN_LEFT
+#ifdef AMPS_DISPLAY_ALIGN_LEFT
set_display_from_double(value, SEVEN_SEG_SECOND_ROW, DISPLAY_ALIGN_LEFT);
#else
set_display_from_double(value, SEVEN_SEG_SECOND_ROW, DISPLAY_ALIGN_RIGHT);
@@ -242,10 +282,10 @@ void main()
*/
programming_pin_control(1);
- if (read_programming_pin() == 0)
+ if (read_programming_pin() == 0 && read_programming_pin() == 0 && read_programming_pin() == 0)
{
/* wait until the user stops removes the jumper on the programming pin */
- while(!read_programming_pin());
+ while(!read_programming_pin()||!read_programming_pin()||!read_programming_pin());
/* execute the calibration routine */
do_calibration();
/* Calibration done, continue */
@@ -276,4 +316,4 @@ void main()
wait_adc_newsets();
do_measure();
}
-}
\ No newline at end of file
+}
diff --git a/src/stm8.h b/src/stm8.h
index 4902b18..69a72e0 100644
--- a/src/stm8.h
+++ b/src/stm8.h
@@ -1,6 +1,10 @@
#ifndef _STH8_H
#define _STH8_H
+/* Handy macros for REG */
+#define CONCATVAR(a, b) a####b
+#define REGVAR(a, b) CONCATVAR(a , b)
+
/* Handy macros for GPIO */
#define CONCAT(a, b) a##_##b
#define PORT(a, b) CONCAT(a , b)
diff --git a/src/timer.c b/src/timer.c
index 659c424..e442e28 100644
--- a/src/timer.c
+++ b/src/timer.c
@@ -1,47 +1,57 @@
-#include "config.h"
-#include "timer.h"
-
-//
-// Setup Timer 1 to generate a 100 Hz TRG0 based upon a 16 MHz timer.
-//
-/* From http://blog.mark-stevens.co.uk/2012/09/single-pulse-generation-with-the-stm8s/ */
-void setup_timer1(void)
-{
- // Enable the Timer 1 clock
- SETBIT(CLK_PCKENR1, CLK_PCKENR1_TIM1);
-
- CLRBIT(TIM1_CR1, TIM_CR1_DIR); // Up counter.
- CLRBIT(TIM1_CR1, TIM_CR1_CMSL); // Edge aligned counter.
- CLRBIT(TIM1_CR1, TIM_CR1_CMSH); // Edge aligned counter.
-
- CLRBIT(TIM1_CR2, TIM_CR2_MMS0); // Update event selected as trigger out.
- SETBIT(TIM1_CR2, TIM_CR2_MMS1); // Update event selected as trigger out.
- CLRBIT(TIM1_CR2, TIM_CR2_MMS2); // Update event selected as trigger out.
-
- TIM1_RCR = 0; // No repetition.
-
- TIM1_PSCRH = 0; // Prescaler = 4
- TIM1_PSCRL = 3;
-
- TIM1_ARRH = 0x9c; // High byte of 40,000.
- TIM1_ARRL = 0x40; // Low byte of 40,000.
-
- SETBIT(TIM1_CR1, TIM_CR1_CEN); // Finally enable the timer.
-}
-
-//
-// Setup Timer 2 to generate a 400 Hz interrupt based upon a 16 MHz timer.
-//
-/* From http://blog.mark-stevens.co.uk/2012/08/using-timers-on-the-stm8s/ */
-void setup_timer2(void)
-{
- // Enable the Timer 2 clock
- SETBIT(CLK_PCKENR1, CLK_PCKENR1_TIM2);
-
- TIM2_PSCR = 0x00; // Prescaler = 1.
- TIM2_ARRH = 0x9c; // High byte of 40,000.
- TIM2_ARRL = 0x40; // Low byte of 40,000.
-
- SETBIT(TIM2_IER, TIM_IER_UIE); // Enable the update interrupts.
- SETBIT(TIM2_CR1, TIM_CR1_CEN); // Finally enable the timer.
+#include
+#include "config.h"
+#include "timer.h"
+
+enum {
+ clockDivider = 0
+ ,ticksCountPerS_AVERAGE = (FREQ_AVERAGE_NETWORK*2)*(1<>8); // Prescaler = 4
+ TIM1_PSCRL = (uint8_t)(TIM1_prescaler);
+
+ TIM1_ARRH = (uint8_t)(TIM1_arr>>8); // High byte of 40,000.
+ TIM1_ARRL = (uint8_t)(TIM1_arr); // Low byte of 40,000.
+
+ SETBIT(TIM1_CR1, TIM_CR1_CEN); // Finally enable the timer.
+}
+
+//
+// Setup Timer 2 to generate a 400 Hz interrupt based upon a 16 MHz timer.
+//
+/* From http://blog.mark-stevens.co.uk/2012/08/using-timers-on-the-stm8s/ */
+void setup_timer2(void)
+{
+ // Enable the Timer 2 clock
+ SETBIT(CLK_PCKENR1, CLK_PCKENR1_TIM2);
+
+ TIM2_PSCR = TIM2_prescaler; // Prescaler = 1.
+ TIM2_ARRH = (uint8_t)(TIM2_arr>>8); // High byte of 40,000.
+ TIM2_ARRL = (uint8_t)(TIM2_arr); // Low byte of 40,000.
+
+ SETBIT(TIM2_IER, TIM_IER_UIE); // Enable the update interrupts.
+ SETBIT(TIM2_CR1, TIM_CR1_CEN); // Finally enable the timer.
}
\ No newline at end of file