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Copy pathnexys2.ucf
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nexys2.ucf
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NET "clk_50" TNM_NET = clk_50;
TIMESPEC TS_clk50 = PERIOD "clk_50" 20 ns HIGH 50%;
NET "clk_50" LOC = "B8"; # Bank = 0, Pin name = IP_L13P_0/GCLK8, Type = GCLK, Sch name = GCLK0
NET "OV7670_PWDN" LOC = "L15" | IOSTANDARD=LVTTL | SLEW=SLOW; # JA0
NET "OV7670_RESET" LOC = "K13" | IOSTANDARD=LVTTL | SLEW=SLOW; # JA4
NET "OV7670_DATA<0>" LOC = "K12" | IOSTANDARD=LVTTL | SLEW=SLOW; # JA1
NET "OV7670_DATA<1>" LOC = "L16" | IOSTANDARD=LVTTL | SLEW=SLOW; # JA5
NET "OV7670_DATA<2>" LOC = "L17" | IOSTANDARD=LVTTL | SLEW=SLOW; # JA2
NET "OV7670_DATA<3>" LOC = "M14" | IOSTANDARD=LVTTL | SLEW=SLOW; # JA6
NET "OV7670_DATA<4>" LOC = "M15" | IOSTANDARD=LVTTL | SLEW=SLOW; # JA3
NET "OV7670_DATA<5>" LOC = "M16" | IOSTANDARD=LVTTL | SLEW=SLOW; # JA7
NET "OV7670_DATA<6>" LOC = "M13" | IOSTANDARD=LVTTL | SLEW=SLOW; # JB0
NET "OV7670_DATA<7>" LOC = "P17" | IOSTANDARD=LVTTL | SLEW=SLOW; # JB4
NET "OV7670_XCLK" LOC = "R18" | IOSTANDARD=LVTTL | SLEW=SLOW; # JB1
NET "OV7670_PCLK" LOC = "R16" | IOSTANDARD=LVTTL | SLEW=SLOW; # JB5
NET "OV7670_HREF" LOC = "R15" | IOSTANDARD=LVTTL | SLEW=SLOW; # JB2
NET "OV7670_VSYNC" LOC = "T18" | IOSTANDARD=LVTTL | SLEW=SLOW; # JB6
NET "OV7670_SIOD" LOC = "T17" | IOSTANDARD=LVTTL | SLEW=SLOW | PULLUP; # JB3
NET "OV7670_SIOC" LOC = "U18" | IOSTANDARD=LVTTL | SLEW=SLOW; # JB7
NET "OV7670_PCLK" CLOCK_DEDICATED_ROUTE = FALSE;
NET "clk_50" CLOCK_DEDICATED_ROUTE = FALSE;
NET "config_finished" LOC = "J14" | IOSTANDARD=LVTTL ; # LED0
NET "vga_R<0>" LOC = "R9";
NET "vga_R<1>" LOC = "T8";
NET "vga_R<2>" LOC = "R8";
NET "vga_G<0>" LOC = "N8";
NET "vga_G<1>" LOC = "P8";
NET "vga_G<2>" LOC = "P6";
NET "vga_B<1>" LOC = "U5";
NET "vga_B<2>" LOC = "U4";
NET "vga_HSync" LOC = "T4";
NET "vga_Vsync" LOC = "U3";
NET "btn" LOC = "B18";