From f392739046999d11150cba1c64f22ffa0f8f8c29 Mon Sep 17 00:00:00 2001
From: Derek Hageman <hageman@inthat.cloud>
Date: Sun, 9 Apr 2023 12:57:30 -0600
Subject: [PATCH] Change to critical_section for thumbv6

Instead of implementing critical sections directly, use the
critical_section crate for abstraction.  A simple implementation that
disables interrupts is available in cortex-m with a feature switch
that preserves existing behavior.
---
 core/Cargo.toml      | 4 ++--
 core/src/bbbuffer.rs | 8 ++++----
 core/src/lib.rs      | 7 +++++--
 3 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/core/Cargo.toml b/core/Cargo.toml
index c1f2044..1bbfbd2 100644
--- a/core/Cargo.toml
+++ b/core/Cargo.toml
@@ -15,10 +15,10 @@ categories = [
 license = "MIT OR Apache-2.0"
 
 [dependencies]
-cortex-m = { version = "0.6.0", optional = true }
+critical-section = { version = "1.1", optional = true }
 
 [features]
-thumbv6 = ["cortex-m"]
+thumbv6 = ["critical-section"]
 
 [package.metadata.docs.rs]
 all-features = true
diff --git a/core/src/bbbuffer.rs b/core/src/bbbuffer.rs
index 1492a55..7d219fd 100644
--- a/core/src/bbbuffer.rs
+++ b/core/src/bbbuffer.rs
@@ -1101,11 +1101,11 @@ mod atomic {
         AtomicBool, AtomicUsize,
         Ordering::{self, Acquire, Release},
     };
-    use cortex_m::interrupt::free;
+    use critical_section::with;
 
     #[inline(always)]
     pub fn fetch_add(atomic: &AtomicUsize, val: usize, _order: Ordering) -> usize {
-        free(|_| {
+        with(|_| {
             let prev = atomic.load(Acquire);
             atomic.store(prev.wrapping_add(val), Release);
             prev
@@ -1114,7 +1114,7 @@ mod atomic {
 
     #[inline(always)]
     pub fn fetch_sub(atomic: &AtomicUsize, val: usize, _order: Ordering) -> usize {
-        free(|_| {
+        with(|_| {
             let prev = atomic.load(Acquire);
             atomic.store(prev.wrapping_sub(val), Release);
             prev
@@ -1123,7 +1123,7 @@ mod atomic {
 
     #[inline(always)]
     pub fn swap(atomic: &AtomicBool, val: bool, _order: Ordering) -> bool {
-        free(|_| {
+        with(|_| {
             let prev = atomic.load(Acquire);
             atomic.store(val, Release);
             prev
diff --git a/core/src/lib.rs b/core/src/lib.rs
index ea2348d..1d716d1 100644
--- a/core/src/lib.rs
+++ b/core/src/lib.rs
@@ -92,8 +92,11 @@
 //!
 //! This crate contains special support for Cortex-M0(+) targets with the `thumbv6` feature. By
 //! enabling the feature, unsupported atomic operations will be replaced with critical sections
-//! implemented by disabling interrupts. The critical sections are very short, a few instructions at
-//! most, so they should make no difference to most applications.
+//! using the `critical_section` crate. The critical sections are very short, a few instructions at
+//! most, so they should make no difference to most applications.  When using this feature an
+//! implementation must be provided for the `critical_section` crate.  A single core version that
+//! disables interrupts is available on the `cortex_m` crate by enabling the feature
+//! `critical-section-single-core` on that crate.
 
 #![cfg_attr(not(feature = "std"), no_std)]
 #![deny(missing_docs)]