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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN"
"http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
<head>
<title>John Wickerson</title>
<meta charset="utf-8">
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<ul class="nav navbar-nav">
<li><a href="#GettingStarted">Getting started</a></li>
<li><a href="#Reproducing">Reproducing results</a></li>
<li><a href="#PTX">PTX testing</a></li>
<li><a href="http://github.com/johnwickerson/memalloy">Download source</a></li>
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<div class="jumbotron">
<h1>Automatically Comparing Memory Consistency Models</h1>
<p>This repository contains materials for recreating and building upon the results
published in the following paper:</p>
<ul>
<li><a href="http://johnwickerson.github.io">John Wickerson</a>,
<a href="https://www.cs.kent.ac.uk/people/staff/mjb211/">Mark Batty</a>,
<a href="https://www.doc.ic.ac.uk/~trs15/">Tyler Sorensen</a>, and
<a href="http://cas.ee.ic.ac.uk/people/gac1/">George A. Constantinides</a>,
“Automatically Comparing Memory Consistency Models”, in
Proc. <em>Principles of Programming Languages (POPL)</em>, 2017. <a href="http://johnwickerson.github.io/papers/memalloy.pdf">[Preprint]</a>.</li>
</ul>
<p>The main results are summarised in Table 2 on
<a href="http://johnwickerson.github.io/papers/memalloy.pdf#page=11">page 11</a>, and this page (<a href="#Reproducing">Section 2</a>) provides instructions for reproducing
them. We also provide the data underlying the experimental testing of our new PTX MCM (<a href="#PTX">Section 3</a>).</p><p>This repository is maintained on <a href="http://github.com/johnwickerson/memalloy">GitHub</a>.</p>
</div>
<div class="container">
<p>The Alloy models in this repository are divided into four subdirectories:</p>
<ul>
<li>
<p><code>hw</code>: architecture-level memory consistency models</p>
</li>
<li>
<p><code>sw</code>: language-level memory consistency models</p>
</li>
<li>
<p><code>mappings</code>: language-to-architecture compiler mappings</p>
</li>
<li>
<p><code>tests</code>: questions about memory consistency models and the
relationships between them</p>
</li>
</ul>
<p>The diagram below depicts how the models build on one another (an arrow from model <i>A</i> to model <i>B</i> indicates that <i>A</i> imports model <i>B</i>):
<img class="img-responsive" src="hierarchy.png" alt="Model dependencies"/>
</p>
<h1><a class="anchor" name="GettingStarted"></a>1. Getting Started</h1>
<h2>Installation</h2>
<p>Most of our models rely only on
<a href="http://alloy.csail.mit.edu/alloy/">the basic Alloy tool</a>, but some
depend on the higher-order quantification that is only supported in
<a href="http://alloy.mit.edu/alloy/hola/">the AlloyStar tool</a>. An unofficial
copy of AlloyStar (incorporating a couple of minor tweaks) can be
downloaded from
<a href="https://github.com/johnwickerson/AlloyStar">our GitHub repository</a>.</p>
<h2>Running Alloy</h2>
<ul>
<li>
<p>Set the solver to <em>Glucose</em> or <em>Plingeling</em> (via <code>Options → Solver</code>). Set the maximum memory usage and stack size as high as possible,
e.g. 4GB of memory and 64MB of stack (via <code>Options → Maximum memory</code> and <code>Options → Maximum stack</code>). Set the maximum number of
CEGIS iterations to 0, which indicates ‘no maximum’ (via <code>Options → Max CEGIS iterations</code>).</p>
</li>
<li>
<p>Open an Alloy model file, e.g. <code>tests/Q2_c11_simp_orig.als</code> (via
<code>File → Open...</code>).</p>
</li>
<li>
<p>Run a command by picking it from the <code>Execute</code> menu (e.g. <code>Execute → Run gp for exactly 1 Exec, 5 E expect 1</code>).</p>
</li>
<li>
<p>Alloy will respond with either “No instance found” or “Instance
found”. In the latter case, click on “Instance” to load the Alloy
Visualizer.</p>
</li>
<li>
<p>When opening an instance in the Alloy Visualizer, change the
<code>Projection</code> setting from <code>none</code> to <code>Exec</code>. This greatly improves
readability. If the instance involves two executions, click on the
<code><<</code> and <code>>></code> buttons at the bottom to switch between them. If the
instance involves separate hardware and software executions, project
over both types of execution at the same time for maximum
readability.</p>
</li>
<li>
<p>In the Alloy Visualizer, the <code>Theme</code> button allows nodes and edges
to be hidden or restyled according to their type.</p>
</li>
</ul>
<h2>Going Further</h2>
<ul>
<li>For learning more about the Alloy language, the definitive reference
is <a href="http://softwareabstractions.org/">Daniel Jackson’s book</a>. There
is also a good
<a href="http://alloy.mit.edu/alloy/tutorials/online/">online tutorial</a>.</li>
</ul>
<h1><a class="anchor" name="Reproducing"></a>2. Reproducing Results</h1>
<p>In the table below, the <strong>Task</strong> column refers to the row in Table 2
on
<a href="http://johnwickerson.github.io/papers/memalloy.pdf#page=11">page 11 of the paper</a>.
The <strong>File</strong> column refers to a file in this repository, and
the <strong>Command</strong> column gives the command in that file that should be
executed (by selecting it from the <code>Execute</code> menu). The <strong>Solver</strong>
column identifies the SAT solver that was found to provide the fastest
result. The <strong>Time</strong> column gives the number of seconds to encode
(first number) and to solve (second number) the task. These numbers
were obtained on a 64-bit Linux machine with four 16-core 2.1 GHz AMD
Opteron processors and 128 GB of RAM; results obtained on different
machines may vary considerably given the highly unpredictable nature
of SAT solving. Finally, the <strong>Instance?</strong> column reports whether an
instance is found or not.</p>
<table class="table table-striped table-bordered">
<thead>
<tr>
<th>Task</th>
<th>File</th>
<th>Command</th>
<th>Solver</th>
<th>Time /s</th>
<th>Instance?</th>
</tr>
</thead>
<tbody>
<tr>
<td>1</td>
<td><a href="tests/Q2_c11_sra_simp.als"><code>tests/Q2_c11_sra_simp.als</code></a></td>
<td>2nd</td>
<td><em>Glucose</em></td>
<td>0.7+0.6</td>
<td>yes</td>
</tr>
<tr>
<td>2</td>
<td><a href="tests/Q2_c11_swrf_simp.als"><code>tests/Q2_c11_swrf_simp.als</code></td>
<td>3rd</td>
<td><em>Glucose</em></td>
<td>0.8+625</td>
<td>no</td>
</tr>
<tr>
<td>3</td>
<td><a href="tests/Q2_c11_swrf_simp.als"><code>tests/Q2_c11_swrf_simp.als</code></td>
<td>1st</td>
<td><em>Plingeling</em></td>
<td>2+214</td>
<td>yes</td>
</tr>
<tr>
<td>4</td>
<td><a href="tests/Q2_c11_simp_orig.als"><code>tests/Q2_c11_simp_orig.als</code></td>
<td>2nd</td>
<td><em>Glucose</em></td>
<td>0.4+0.3</td>
<td>yes</td>
</tr>
<tr>
<td>5</td>
<td><a href="tests/Q2_x86_mca.als"><code>tests/Q2_x86_mca.als</code></td>
<td>2nd</td>
<td><em>Plingeling</em></td>
<td>0.8+607</td>
<td>no</td>
</tr>
<tr>
<td>6</td>
<td><a href="tests/Q2_ppc_mca.als"><code>tests/Q2_ppc_mca.als</code></td>
<td>2nd</td>
<td><em>Glucose</em></td>
<td>1.5+0.06</td>
<td>yes</td>
</tr>
<tr>
<td>7</td>
<td><a href="tests/Q2_sc_c11nodrf.als"><code>tests/Q2_sc_c11nodrf.als</code></td>
<td>1st</td>
<td><em>Glucose</em></td>
<td>0.4+0.04</td>
<td>yes</td>
</tr>
<tr>
<td>8</td>
<td><a href="tests/Q2_ptx.als"><code>tests/Q2_ptx.als</code></td>
<td>2nd</td>
<td><em>Glucose</em></td>
<td>0.7+4</td>
<td>yes</td>
</tr>
<tr>
<td>9</td>
<td><a href="tests/Q3_c11_seq.als"><code>tests/Q3_c11_seq.als</code></td>
<td>1st</td>
<td><em>MiniSat</em></td>
<td>0.5+163</td>
<td>no</td>
</tr>
<tr>
<td>10</td>
<td><a href="tests/Q3_c11_seq.als"><code>tests/Q3_c11_seq.als</code></td>
<td>2nd</td>
<td><em>Plingeling</em></td>
<td>0.7+5</td>
<td>yes</td>
</tr>
<tr>
<td>11</td>
<td><a href="tests/Q3_c11_mo.als"><code>tests/Q3_c11_mo.als</code></td>
<td>2nd</td>
<td><em>Glucose</em></td>
<td>0.9+51</td>
<td>yes</td>
</tr>
<tr>
<td>12</td>
<td><a href="tests/Q4_c11_x86a.als"><code>tests/Q4_c11_x86a.als</code></td>
<td>1st</td>
<td><em>Plingeling</em></td>
<td>0.7+13029</td>
<td>no</td>
</tr>
<tr>
<td>13</td>
<td><a href="tests/Q4_c11_ppc_trimmed.als"><code>tests/Q4_c11_ppc_trimmed.als</code></td>
<td>1st</td>
<td><em>Plingeling</em></td>
<td>8+91</td>
<td>yes</td>
</tr>
<tr>
<td>14</td>
<td><a href="tests/Q4_opencl_amd.als"><code>tests/Q4_opencl_amd.als</code></td>
<td>2nd</td>
<td><em>Glucose</em></td>
<td>6+1355</td>
<td>yes</td>
</tr>
<tr>
<td>15</td>
<td><a href="tests/Q4_opencl_amd.als"><code>tests/Q4_opencl_amd.als</code></td>
<td>1st</td>
<td><em>Plingeling</em></td>
<td>16+4743</td>
<td>yes</td>
</tr>
<tr>
<td>16</td>
<td><a href="tests/Q4_opencl_ptx_orig.als"><code>tests/Q4_opencl_ptx_orig.als</code></td>
<td>2nd</td>
<td><em>Plingeling</em></td>
<td>2+11</td>
<td>yes</td>
</tr>
<tr>
<td>17</td>
<td><a href="tests/Q4_opencl_ptx_cumul.als"><code>tests/Q4_opencl_ptx_cumul.als</code></td>
<td>1st</td>
<td><em>Plingeling</em></td>
<td>4+9719</td>
<td>no</td>
</tr>
</tbody>
</table>
<h1><a class="anchor" name="PTX"></a>3. Testing our stronger PTX MCM</h1> This
section shows tests that differentiate the <a
href="hw/ptx_orig.als">PTX1</a> model against the <a
href="hw/ptx_cumul.als">PTX2</a> model. That is,
tests that can pass under PTX1, but not under PTX2. The test names
refer to Sarkar et al.'s <a
href="https://www.cl.cam.ac.uk/~pes20/ppc-supplemental/test6.pdf">periodic
table of litmus tests</a>. <br> <br> In order to show that PTX2
remains empirically sound, we must show that these tests are not
observable on Nvidia chips. Many of the tests are available from
Alglave et al.'s <a
href="http://multicore.doc.ic.ac.uk/gpu-litmus/flat.html">publicly-available
experimental data</a>. For these tests, we link to the
existing results. Some tests are not included in Alglave et al.'s
set. These tests are all single-address tests. Alglave et al. only
consider the 4 traditional single-address tests (CoRR, CoRW, CoWR,
CoWW). However, due to a combination of the PTX model not
providing full coherence, and GPU scopes, we obtain larger
single-address tests that do not reduce to any of those tests. For
tests that are unavailable in Alglave et al.'s set, we run new
tests on a GTX Titan chip. </p>
<h2>7-event executions</h2>
<p>
<b>Existing test results</b> There are a total of 12 tests with 7 events that are allowed under
PTX1 but disallowed under PTX2 and for which Alglave et al. provide
testing results. In no case is the weak behaviour observed.
</p>
<div class="table-responsive">
<table class="table table-striped table-bordered">
<thead>
<tr>
<th>Test shape</th>
<th>GPU config</th>
<th>GTX 540</th>
<th>GTX 660</th>
<th>GTX 750 Ti</th>
<th>GTX Titan</th>
<th>Tesla C2075</th>
</tr>
</thead>
<tr>
<td> <a href="ptx_testing/RWC1.txt">RWC + membar.cta + membar.gl</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-RWC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-RWC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-RWC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-RWC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-RWC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/RWC2.txt">RWC + membar.gl + membar.cta</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-RWC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-RWC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-RWC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-RWC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-RWC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WRR+2W1.txt">WRR+2W + membar.cta + membar.gl</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-WRR+2W+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-WRR+2W+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-WRR+2W+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-WRR+2W+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-WRR+2W+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WRR+2W2.txt">WRR+2W + membar.gl + membar.cta</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-WRR+2W+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-WRR+2W+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-WRR+2W+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-WRR+2W+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-WRR+2W+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WRC1.txt">WRC + membar.cta + membar.gl</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-WRC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-WRC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-WRC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-WRC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-WRC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WRC2.txt">WRC + membar.gl + membar.cta</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-WRC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-WRC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-WRC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-WRC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-WRC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WWC1.txt">WWC + membar.cta + membar.gl</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-WWC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-WWC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-WWC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-WWC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-WWC+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WWC2.txt">WWC + membar.gl + membar.cta</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-WWC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-WWC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-WWC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-WWC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-WWC+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WRW+WR1.txt">WRW+WR + membar.cta + membar.gl</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-WRW+WR+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-WRW+WR+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-WRW+WR+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-WRW+WR+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-WRW+WR+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WRW+WR2.txt">WRW+WR + membar.gl + membar.cta</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-WRW+WR+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-WRW+WR+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-WRW+WR+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-WRW+WR+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-WRW+WR+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WRW+2W1.txt">WRW+2W + membar.cta + membar.gl</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-WRW+2W+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-WRW+2W+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-WRW+2W+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-WRW+2W+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-WRW+2W+membar.cta+membar.gl-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WRW+2W2.txt">WRW+2W + membar.gl + membar.cta</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-WRW+2W+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-WRW+2W+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-WRW+2W+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-WRW+2W+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-WRW+2W+membar.gl+membar.cta-p0::p1:p2-xgyg.txt"> 0/50k </a> </td>
</tr>
</table>
</div>
<p> <b>New test results</b> There are a total of 2
tests with 7 events that are allowed under PTX1 but disallowed under
PTX2, and for which Alglave et al. do not provide testing results.
We ran these two tests on a GTX Titan using Alglave et al.'s
GPU-litmus tool. We do not observe the weak behaviour. </p>
<div class="table-responsive">
<table class="table table-striped table-bordered">
<thead>
<tr>
<th>Test shape</th>
<th>GPU config</th>
<th>GTX Titan</th>
</tr>
</thead>
<tr>
<td> <a href="ptx_testing/RWC_uniproc.txt">RWC + membar.cta + membar.gl (single-address)</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="ptx_testing/RWC_uniproc/RWC_uniproc.txt"> 0/100k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/WRR+2W_uniproc.txt">WRR+2W + membar.cta + membar.gl (single-address)</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub>)</td>
<td> <a href="ptx_testing/WRR+2W_uniproc/WRR+2W_uniproc.txt"> 0/100k </a> </td>
</tr>
</table>
</div>
<h2>8-event executions</h2> <p><b>Existing test
results</b> Alloy found 10 tests with 8 events that
are allowed under PTX1 but disallowed under PTX2 and for which
Alglave et al. provide testing results. In no case do we observe the
weak behaviour.
</p> <div class="table-responsive"> <table
class="table table-striped table-bordered">
<thead>
<tr>
<th>Test shape</th>
<th>GPU config</th>
<th>GTX 540</th>
<th>GTX 660</th>
<th>GTX 750 Ti</th>
<th>GTX Titan</th>
<th>Tesla C2075</th>
</tr>
</thead>
<tr>
<td> <a href="ptx_testing/IRIW1.txt">IRIW + membar.cta + membar.gl</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub> |<sub>warp</sub> P<sub>3</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-IRIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-IRIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-IRIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-IRIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-IRIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/IRIW2.txt">IRIW + membar.gl + membar.cta</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub> |<sub>warp</sub> P<sub>3</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-IRIW+membar.cta+membar.gl-p0:p1:p3::p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-IRIW+membar.cta+membar.gl-p0:p1:p3::p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-IRIW+membar.cta+membar.gl-p0:p1:p3::p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-IRIW+membar.cta+membar.gl-p0:p1:p3::p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-IRIW+membar.cta+membar.gl-p0:p1:p3::p2-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/IRRWIW1.txt">IRRWIW + membar.cta + membar.gl</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub> |<sub>warp</sub> P<sub>3</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-IRRWIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-IRRWIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-IRRWIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-IRRWIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-IRRWIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/IRRWIW2.txt">IRRWIW + membar.gl + membar.cta</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub> |<sub>warp</sub> P<sub>3</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-IRRWIW+membar.gl+membar.cta-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-IRRWIW+membar.gl+membar.cta-p0::p1:p2:p3-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-IRRWIW+membar.gl+membar.cta-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-IRRWIW+membar.gl+membar.cta-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-IRRWIW+membar.gl+membar.cta-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/IRRWIW3.txt">IRRWIW + membar.gl + membar.cta</a> </td>
<td> P<sub>2</sub> |<sub>cta</sub> (P<sub>0</sub> |<sub>warp</sub> P<sub>1</sub> |<sub>warp</sub> P<sub>3</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-IRRWIW+membar.gl+membar.cta-p0:p1:p3::p2-xsyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-IRRWIW+membar.gl+membar.cta-p0:p1:p3::p2-xsyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-IRRWIW+membar.gl+membar.cta-p0:p1:p3::p2-xsyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-IRRWIW+membar.gl+membar.cta-p0:p1:p3::p2-xsyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-IRRWIW+membar.gl+membar.cta-p0:p1:p3::p2-xsyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/IRRWIW4.txt">IRRWIW + membar.cta + membar.gl</a> </td>
<td> P<sub>2</sub> |<sub>cta</sub> (P<sub>0</sub> |<sub>warp</sub> P<sub>1</sub> |<sub>warp</sub> P<sub>3</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-IRRWIW+membar.cta+membar.gl-p0:p1:p3::p2-xsyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-IRRWIW+membar.cta+membar.gl-p0:p1:p3::p2-xsyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-IRRWIW+membar.cta+membar.gl-p0:p1:p3::p2-xsyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-IRRWIW+membar.cta+membar.gl-p0:p1:p3::p2-xsyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-IRRWIW+membar.cta+membar.gl-p0:p1:p3::p2-xsyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/IRWIW2.txt">IRWIW + membar.cta + membar.gl</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub> |<sub>warp</sub> P<sub>3</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-IRWIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-IRWIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-IRWIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-IRWIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-IRWIW+membar.cta+membar.gl-p0::p1:p2:p3-xgyg.txt"> 0/50k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/IRWIW1.txt">IRWIW + membar.gl + membar.cta</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub> |<sub>warp</sub> P<sub>3</sub>)</td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx540-IRWIW+membar.cta+membar.gl-p0:p1:p3::p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx660-IRWIW+membar.cta+membar.gl-p0:p1:p3::p2-xgyg.txt"> 0/100k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx750ti-IRWIW+membar.cta+membar.gl-p0:p1:p3::p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/gtx-titan-IRWIW+membar.cta+membar.gl-p0:p1:p3::p2-xgyg.txt"> 0/50k </a> </td>
<td> <a href="http://multicore.doc.ic.ac.uk/gpu-litmus/entries/tesla-c2075-IRWIW+membar.cta+membar.gl-p0:p1:p3::p2-xgyg.txt"> 0/50k </a> </td>
</tr>
</table>
</div>
<p><b>New test results</b> There are a total of 2
tests with 8 events that are allowed under PTX1 but disallowed under
PTX2, and for which Alglave et al. do not provide testing results.
We ran these two tests on a GTX Titan using Alglave et al.'s
GPU-litmus tool. We do not observe the weak behaviour.</p>
<div class="table-responsive">
<table class="table table-striped table-bordered">
<thead>
<tr>
<th>Test shape</th>
<th>GPU config</th>
<th>GTX Titan</th>
</tr>
</thead>
<tr>
<td> <a href="ptx_testing/IRIW_uniproc.txt">IRIW + membar.cta + membar.gl (single-address)</a> </td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub> |<sub>warp</sub> P<sub>3</sub>)</td>
<td> <a href="ptx_testing/IRIW_uniproc/IRIW_uniproc.txt"> 0/100k </a> </td>
</tr>
<tr>
<td> <a href="ptx_testing/IRRWIW_uniproc.txt">IRRWIW + membar.cta + membar.gl (single-address)</a></td>
<td> P<sub>0</sub> |<sub>cta</sub> (P<sub>1</sub> |<sub>warp</sub> P<sub>2</sub> |<sub>warp</sub> P<sub>3</sub>)</td>
<td> <a href="ptx_testing/IRRWIW_uniproc/IRRWIW_uniproc.txt">
0/100k
</a> </td>
</tr>
</table>
</div>
</div>
</body> </html>