headstage-64.dru

description[de] = <b>EAGLE Design Rules</b>\n<p>\nDie Standard-Design-Rules sind so gewählt, dass sie für \ndie meisten Anwendungen passen. Sollte ihre Platine \nbesondere Anforderungen haben, treffen Sie die erforderlichen\nEinstellungen hier und speichern die Design Rules unter \neinem neuen Namen ab.
description[en] = <b>Speedy Circuits 8 Layer 2 mil/trace space"</b>
layerSetup = ((1*2*3*4*5*6)+(7*16))
mtCopper = 0.036mm 0.036mm 0.036mm 0.036mm 0.036mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.036mm
mtIsolate = 4mil 5mil 0.10921875mm 5mil 4mil 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
mdWireWire = 2mil
mdWirePad = 2mil
mdWireVia = 2mil
mdPadPad = 2mil
mdPadVia = 2mil
mdViaVia = 2mil
mdSmdPad = 0mil
mdSmdVia = 0mil
mdSmdSmd = 2mil
mdViaViaSameLayer = 8mil
mnLayersViaInSmd = 2
mdCopperDimension = 5mil
mdDrill = 5mil
mdSmdStop = 0mil
msWidth = 2mil
msDrill = 3mil
msMicroVia = 0.1mm
msBlindViaRatio = 0.500000
rvPadTop = 0.250000
rvPadInner = 0.250000
rvPadBottom = 0.250000
rvViaOuter = 0.250000
rvViaInner = 0.250000
rvMicroViaOuter = 0.250000
rvMicroViaInner = 0.250000
rlMinPadTop = 2mil
rlMaxPadTop = 12mil
rlMinPadInner = 3mil
rlMaxPadInner = 12mil
rlMinPadBottom = 2mil
rlMaxPadBottom = 12mil
rlMinViaOuter = 2mil
rlMaxViaOuter = 12mil
rlMinViaInner = 2mil
rlMaxViaInner = 12mil
rlMinMicroViaOuter = 3mil
rlMaxMicroViaOuter = 12mil
rlMinMicroViaInner = 3mil
rlMaxMicroViaInner = 12mil
psTop = -1
psBottom = -1
psFirst = -1
psElongationLong = 100
psElongationOffset = 100
mvStopFrame = 1.000000
mvCreamFrame = 0.000000
mlMinStopFrame = 1mil
mlMaxStopFrame = 1mil
mlMinCreamFrame = 0mil
mlMaxCreamFrame = 0mil
mlViaStopLimit = 1mm
srRoundness = 0.000000
srMinRoundness = 0mil
srMaxRoundness = 0mil
slThermalIsolate = 10mil
slThermalsForVias = 0
dpMaxLengthDifference = 10mm
dpGapFactor = 2.500000
checkGrid = 0
checkAngle = 0
checkFont = 1
checkRestrict = 1
useDiameter = 13
maxErrors = 50