diff --git a/devices/common/patches/fix.patch b/devices/common/patches/fix.patch index c21654add9fd..33b006041ba8 100644 --- a/devices/common/patches/fix.patch +++ b/devices/common/patches/fix.patch @@ -110,3 +110,15 @@ "images": [ { "type": getenv("FILE_TYPE"), + +--- a/package/system/procd/files/procd.sh ++++ b/package/system/procd/files/procd.sh +@@ -260,7 +260,7 @@ _procd_set_param() { + reload_signal) + json_add_int "$type" $(kill -l "$1") + ;; +- pidfile|user|group|seccomp|capabilities|facility|\ ++ pidfile|user|group|capabilities|facility|\ + extroot|overlaydir|tmpoverlaysize) + json_add_string "$type" "$1" + ;; diff --git a/devices/mediatek_filogic/.config b/devices/mediatek_filogic/.config index 946a8229a00d..e8865da9aad6 100644 --- a/devices/mediatek_filogic/.config +++ b/devices/mediatek_filogic/.config @@ -13,4 +13,6 @@ CONFIG_TARGET_DEVICE_mediatek_filogic_DEVICE_xiaomi_mi-router-wr30u-112m-nmbm=y CONFIG_TARGET_DEVICE_mediatek_filogic_DEVICE_xiaomi_redmi-router-ax6000=y CONFIG_TARGET_DEVICE_mediatek_filogic_DEVICE_qihoo_360t7=y CONFIG_TARGET_DEVICE_mediatek_filogic_DEVICE_xiaomi_mi-router-ax3000t=y +CONFIG_TARGET_DEVICE_mediatek_filogic_DEVICE_jcg_q30-pro=y +CONFIG_TARGET_DEVICE_mediatek_filogic_DEVICE_glinet_gl-mt6000=y CONFIG_PACKAGE_luci-ssl=y # uhttpd服务 diff --git a/devices/mediatek_filogic/patches/5-gl-mt6000.patch b/devices/mediatek_filogic/patches/5-gl-mt6000.patch new file mode 100644 index 000000000000..a340c58f3e0b --- /dev/null +++ b/devices/mediatek_filogic/patches/5-gl-mt6000.patch @@ -0,0 +1,791 @@ +From fe10f9743935d6986e80e7cb082469e6bc5a03f0 Mon Sep 17 00:00:00 2001 +From: Jianhui Zhao +Date: Sun, 24 Sep 2023 22:34:12 +0800 +Subject: [PATCH] filogic: add support for GL.iNet GL-MT6000 + +Hardware specification: +* SoC: MediaTek MT7986A 4x A53 +* Flash: 8GB EMMC +* RAM: 1GB DDR4 +* Ethernet: + * 2x2.5G RJ45 port (RTL8221B) + * 4x1G RJ45 ports (MT7531AE) +* WLAN: + * 2.4GHz: MT7976GN 4T4R + * 5GHz: MT7976AN 4T4R +* Button: Reset +* LED: 1 x dual color LED +* USB: 1 x USB 3.0 +* Power: DC 12V 4A +* UART: 3V3 115200 8N1 (Pinout: GND TX RX VCC) +* JTAG: 9 PIN + +If you want to use u-boot from OpenWrt, you can upgrade it safely. +* bl2: openwrt-mediatek-filogic-glinet_gl-mt6000-preloader.bin +* fip: openwrt-mediatek-filogic-glinet_gl-mt6000-bl31-uboot.fip + +`openwrt-mediatek-filogic-glinet_gl-mt6000-squashfs-factory.bin` is used in OpenWrt's u-boot. + +Signed-off-by: Jianhui Zhao +--- + .../uboot-envtools/files/mediatek_filogic | 4 + + package/boot/uboot-mediatek/Makefile | 13 + + .../patches/436-add-glinet-mt6000.patch | 274 ++++++++++++++++ + .../mediatek/dts/mt7986a-glinet-gl-mt6000.dts | 306 ++++++++++++++++++ + .../filogic/base-files/etc/board.d/02_network | 6 + + .../etc/hotplug.d/firmware/11-mt76-caldata | 7 + + .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 5 + + .../base-files/lib/upgrade/platform.sh | 6 + + target/linux/mediatek/image/filogic.mk | 15 + + 9 files changed, 636 insertions(+) + create mode 100644 package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch + create mode 100644 target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts + +diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic +index 803800ce1c751..4b8fe6b80126e 100644 +--- a/package/boot/uboot-envtools/files/mediatek_filogic ++++ b/package/boot/uboot-envtools/files/mediatek_filogic +@@ -40,6 +40,10 @@ bananapi,bpi-r3) + glinet,gl-mt3000) + ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x20000" + ;; ++glinet,gl-mt6000) ++ local envdev=$(find_mmc_part "u-boot-env") ++ ubootenv_add_uci_config "$envdev" "0x0" "0x80000" ++ ;; + mercusys,mr90x-v1) + local envdev=/dev/mtd$(find_mtd_index "u-boot-env") + ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1" +diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile +index 62199871e6b33..1a97570031c43 100644 +--- a/package/boot/uboot-mediatek/Makefile ++++ b/package/boot/uboot-mediatek/Makefile +@@ -357,6 +357,18 @@ define U-Boot/mt7986_bananapi_bpi-r3-nor + FIP_COMPRESS:=1 + endef + ++define U-Boot/mt7986_glinet_gl-mt6000 ++ NAME:=GL.iNet GL-MT6000 ++ BUILD_SUBTARGET:=filogic ++ BUILD_DEVICES:=glinet_gl-mt6000 ++ UBOOT_CONFIG:=mt7986a_glinet_gl-mt6000 ++ UBOOT_IMAGE:=u-boot.fip ++ BL2_BOOTDEV:=emmc ++ BL2_SOC:=mt7986 ++ BL2_DDRTYPE:=ddr4 ++ DEPENDS:=+trusted-firmware-a-mt7986-emmc-ddr4 ++endef ++ + define U-Boot/mt7986_tplink_tl-xdr4288 + NAME:=TP-LINK TL-XDR4288 + BUILD_SUBTARGET:=filogic +@@ -496,6 +508,7 @@ UBOOT_TARGETS := \ + mt7986_bananapi_bpi-r3-sdmmc \ + mt7986_bananapi_bpi-r3-snand \ + mt7986_bananapi_bpi-r3-nor \ ++ mt7986_glinet_gl-mt6000 \ + mt7986_tplink_tl-xdr4288 \ + mt7986_tplink_tl-xdr6086 \ + mt7986_tplink_tl-xdr6088 \ +diff --git a/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch b/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch +new file mode 100644 +index 0000000000000..ad138acfd921d +--- /dev/null ++++ b/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch +@@ -0,0 +1,274 @@ ++--- /dev/null +++++ b/arch/arm/dts/mt7986a-glinet-gl-mt6000.dts ++@@ -0,0 +1,135 @@ +++// SPDX-License-Identifier: GPL-2.0 +++ +++/dts-v1/; +++#include +++#include +++ +++#include "mt7986.dtsi" +++ +++/ { +++ model = "GL.iNet GL-MT6000"; +++ compatible = "glinet,gl-mt6000", "mediatek,mt7986-emmc-rfb", "mediatek,mt7986"; +++ +++ chosen { +++ stdout-path = &uart0; +++ tick-timer = &timer0; +++ }; +++ +++ memory@40000000 { +++ device_type = "memory"; +++ reg = <0x40000000 0x40000000>; +++ }; +++ +++ reg_1p8v: regulator-1p8v { +++ compatible = "regulator-fixed"; +++ regulator-name = "fixed-1.8V"; +++ regulator-min-microvolt = <1800000>; +++ regulator-max-microvolt = <1800000>; +++ regulator-boot-on; +++ regulator-always-on; +++ }; +++ +++ reg_3p3v: regulator-3p3v { +++ compatible = "regulator-fixed"; +++ regulator-name = "fixed-3.3V"; +++ regulator-min-microvolt = <3300000>; +++ regulator-max-microvolt = <3300000>; +++ regulator-boot-on; +++ regulator-always-on; +++ }; +++ +++ keys { +++ compatible = "gpio-keys"; +++ +++ wps { +++ label = "reset"; +++ gpios = <&gpio 9 GPIO_ACTIVE_LOW>; +++ linux,code = ; +++ }; +++ }; +++ +++ leds { +++ compatible = "gpio-leds"; +++ +++ led_status_blue: green { +++ label = "blue:status"; +++ gpios = <&gpio 28 GPIO_ACTIVE_LOW>; +++ }; +++ +++ led_status_white: blue { +++ label = "white:status"; +++ gpios = <&gpio 27 GPIO_ACTIVE_LOW>; +++ }; +++ }; +++ +++}; +++ +++&uart0 { +++ mediatek,force-highspeed; +++ status = "okay"; +++}; +++ +++ð { +++ status = "okay"; +++ mediatek,gmac-id = <0>; +++ phy-mode = "2500base-x"; +++ mediatek,switch = "mt7531"; +++ reset-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; +++ +++ fixed-link { +++ speed = <2500>; +++ full-duplex; +++ }; +++}; +++ +++&pinctrl { +++ mmc0_pins_default: mmc0default { +++ mux { +++ function = "flash"; +++ groups = "emmc_51"; +++ }; +++ +++ conf-cmd-dat { +++ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", +++ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", +++ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; +++ input-enable; +++ drive-strength = ; +++ bias-pull-up = ; +++ }; +++ +++ conf-clk { +++ pins = "EMMC_CK"; +++ drive-strength = ; +++ bias-pull-down = ; +++ }; +++ +++ conf-dsl { +++ pins = "EMMC_DSL"; +++ bias-pull-down = ; +++ }; +++ +++ conf-rst { +++ pins = "EMMC_RSTB"; +++ drive-strength = ; +++ bias-pull-up = ; +++ }; +++ }; +++}; +++ +++&mmc0 { +++ pinctrl-names = "default"; +++ pinctrl-0 = <&mmc0_pins_default>; +++ bus-width = <8>; +++ max-frequency = <200000000>; +++ cap-mmc-highspeed; +++ cap-mmc-hw-reset; +++ vmmc-supply = <®_3p3v>; +++ vqmmc-supply = <®_1p8v>; +++ non-removable; +++ status = "okay"; +++}; +++ +++&wmcpu_emi { +++ status = "disabled"; +++}; ++--- /dev/null +++++ b/configs/mt7986a_glinet_gl-mt6000_defconfig ++@@ -0,0 +1,105 @@ +++CONFIG_ARM=y +++CONFIG_SYS_HAS_NONCACHED_MEMORY=y +++CONFIG_POSITION_INDEPENDENT=y +++CONFIG_ARCH_MEDIATEK=y +++CONFIG_TEXT_BASE=0x41e00000 +++CONFIG_SYS_MALLOC_F_LEN=0x4000 +++CONFIG_NR_DRAM_BANKS=1 +++CONFIG_ENV_SIZE=0x80000 +++CONFIG_ENV_OFFSET=0x400000 +++CONFIG_DEFAULT_DEVICE_TREE="mt7986a-glinet-gl-mt6000" +++CONFIG_SYS_PROMPT="MT7986> " +++CONFIG_OF_LIBFDT_OVERLAY=y +++CONFIG_TARGET_MT7986=y +++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00 +++CONFIG_DEBUG_UART_BASE=0x11002000 +++CONFIG_DEBUG_UART_CLOCK=40000000 +++CONFIG_SYS_LOAD_ADDR=0x46000000 +++CONFIG_DEBUG_UART=y +++CONFIG_AHCI=y +++CONFIG_FIT=y +++CONFIG_AUTOBOOT_KEYED=y +++CONFIG_AUTOBOOT_MENU_SHOW=y +++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-glinet-gl-mt6000.dtb" +++CONFIG_LOGLEVEL=7 +++CONFIG_PRE_CONSOLE_BUFFER=y +++CONFIG_LOG=y +++CONFIG_BOARD_LATE_INIT=y +++CONFIG_HUSH_PARSER=y +++CONFIG_CMD_CPU=y +++CONFIG_CMD_LICENSE=y +++CONFIG_CMD_BOOTMENU=y +++CONFIG_CMD_ASKENV=y +++CONFIG_CMD_ERASEENV=y +++CONFIG_CMD_ENV_FLAGS=y +++CONFIG_CMD_STRINGS=y +++CONFIG_CMD_DM=y +++CONFIG_CMD_GPIO=y +++CONFIG_CMD_PWM=y +++CONFIG_CMD_GPT=y +++CONFIG_CMD_MMC=y +++CONFIG_CMD_PART=y +++CONFIG_CMD_USB=y +++CONFIG_CMD_DHCP=y +++CONFIG_CMD_TFTPSRV=y +++CONFIG_CMD_RARP=y +++CONFIG_CMD_PING=y +++CONFIG_CMD_CDP=y +++CONFIG_CMD_SNTP=y +++CONFIG_CMD_DNS=y +++CONFIG_CMD_LINK_LOCAL=y +++CONFIG_CMD_CACHE=y +++CONFIG_CMD_PSTORE=y +++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 +++CONFIG_CMD_UUID=y +++CONFIG_CMD_HASH=y +++CONFIG_CMD_SMC=y +++CONFIG_OF_EMBED=y +++CONFIG_ENV_OVERWRITE=y +++CONFIG_ENV_IS_IN_MMC=y +++CONFIG_SYS_RELOC_GD_ENV_ADDR=y +++CONFIG_USE_DEFAULT_ENV_FILE=y +++CONFIG_DEFAULT_ENV_FILE="glinet_gl-mt6000_env" +++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +++CONFIG_VERSION_VARIABLE=y +++CONFIG_NET_RANDOM_ETHADDR=y +++CONFIG_NETCONSOLE=y +++CONFIG_USE_IPADDR=y +++CONFIG_IPADDR="192.168.1.1" +++CONFIG_USE_SERVERIP=y +++CONFIG_SERVERIP="192.168.1.254" +++CONFIG_REGMAP=y +++CONFIG_SYSCON=y +++CONFIG_BUTTON=y +++CONFIG_BUTTON_GPIO=y +++CONFIG_CLK=y +++CONFIG_GPIO_HOG=y +++CONFIG_LED=y +++CONFIG_LED_BLINK=y +++CONFIG_LED_GPIO=y +++CONFIG_SUPPORT_EMMC_BOOT=y +++CONFIG_MMC_HS200_SUPPORT=y +++CONFIG_MMC_MTK=y +++CONFIG_PHY_FIXED=y +++CONFIG_MEDIATEK_ETH=y +++CONFIG_PHY=y +++CONFIG_PHY_MTK_TPHY=y +++CONFIG_PINCTRL=y +++CONFIG_PINCONF=y +++CONFIG_PINCTRL_MT7986=y +++CONFIG_POWER_DOMAIN=y +++CONFIG_MTK_POWER_DOMAIN=y +++CONFIG_DM_REGULATOR=y +++CONFIG_DM_REGULATOR_FIXED=y +++CONFIG_DM_REGULATOR_GPIO=y +++CONFIG_DM_PWM=y +++CONFIG_PWM_MTK=y +++CONFIG_RAM=y +++CONFIG_DM_SERIAL=y +++CONFIG_MTK_SERIAL=y +++CONFIG_USB=y +++CONFIG_USB_XHCI_HCD=y +++CONFIG_USB_XHCI_MTK=y +++CONFIG_USB_STORAGE=y +++CONFIG_HEXDUMP=y +++CONFIG_LMB_MAX_REGIONS=64 ++--- /dev/null +++++ b/glinet_gl-mt6000_env ++@@ -0,0 +1,25 @@ +++ipaddr=192.168.1.1 +++serverip=192.168.1.254 +++loadaddr=0x46000000 +++bootdelay=3 +++bootfile_bl2=openwrt-mediatek-filogic-glinet_gl-mt6000-preloader.bin +++bootfile_fip=openwrt-mediatek-filogic-glinet_gl-mt6000-bl31-uboot.fip +++bootfile_firmware=openwrt-mediatek-filogic-glinet_gl-mt6000-squashfs-factory.bin +++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 +++bootmenu_title= *** U-Boot Boot Menu for GL-iNet GL-MT6000 *** +++bootmenu_0=Startup system (Default).=run boot_system +++bootmenu_1=Load Firmware via TFTP then write to eMMC.=run boot_tftp_firmware ; run bootmenu_confirm_return +++bootmenu_2=Load BL31+U-Boot FIP via TFTP then write to eMMC.=run boot_tftp_write_fip ; run bootmenu_confirm_return +++bootmenu_3=mLoad BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return +++bootmenu_4=Reboot.=reset +++bootmenu_5=Reset all settings to factory defaults.=run reset_factory ; reset +++filesize_to_blk=setexpr cnt $filesize + 0x1ff && setexpr cnt $cnt / 0x200 +++mmc_read_kernel=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr $part_addr $image_size +++boot_system=part start mmc 0 kernel part_addr && part size mmc 0 kernel part_size && run mmc_read_kernel && bootm +++boot_tftp_firmware=tftpboot $loadaddr $bootfile_firmware && run emmc_write_firmware +++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip +++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2 +++emmc_write_firmware=part start mmc 0 kernel part_addr && run filesize_to_blk && mmc write $loadaddr $part_addr $cnt +++emmc_write_bl2=run filesize_to_blk && test 0x$cnt -le 0x800 && mmc partconf 0 1 1 1 && && mmc write $loadaddr 0x0 0x800 ; mmc partconf 0 1 1 0 +++emmc_write_fip=part start mmc 0 fip part_addr && part size mmc 0 fip part_size && run filesize_to_blk && test 0x$cnt -le 0x$part_size && mmc write $loadaddr $part_addr $cnt +++reset_factory=eraseenv && reset +diff --git a/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts b/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts +new file mode 100644 +index 0000000000000..2be1907f632f1 +--- /dev/null ++++ b/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts +@@ -0,0 +1,306 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++ ++/dts-v1/; ++#include ++#include ++#include ++ ++#include "mt7986a.dtsi" ++ ++/ { ++ model = "GL.iNet GL-MT6000"; ++ compatible = "glinet,gl-mt6000", "mediatek,mt7986a"; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ bootargs-append = " root=PARTLABEL=rootfs rootwait"; ++ }; ++ ++ reg_1p8v: regulator-1p8v { ++ compatible = "regulator-fixed"; ++ regulator-name = "1.8vd"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-3.3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ ++ reset { ++ label = "reset"; ++ linux,code = ; ++ gpios = <&pio 9 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led_run: led@0 { ++ label = "blue:run"; ++ gpios = <&pio 38 GPIO_ACTIVE_LOW>; ++ default-state = "on"; ++ }; ++ ++ led@1 { ++ label = "white:system"; ++ gpios = <&pio 37 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ usb_vbus: regulator-usb-vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpios = <&pio 24 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ regulator-boot-on; ++ }; ++}; ++ ++ð { ++ status = "okay"; ++ ++ gmac0: mac@0 { ++ compatible = "mediatek,eth-mac"; ++ reg = <0>; ++ phy-mode = "2500base-x"; ++ ++ fixed-link { ++ speed = <2500>; ++ full-duplex; ++ pause; ++ }; ++ }; ++ ++ gmac1: mac@1 { ++ compatible = "mediatek,eth-mac"; ++ reg = <1>; ++ phy-mode = "2500base-x"; ++ phy-handle = <&phy1>; ++ }; ++ ++ mdio: mdio-bus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy1: phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ reg = <1>; ++ reset-assert-us = <100000>; ++ reset-deassert-us = <100000>; ++ reset-gpios = <&pio 10 GPIO_ACTIVE_LOW>; ++ interrupt-parent = <&pio>; ++ interrupts = <46 IRQ_TYPE_LEVEL_LOW>; ++ realtek,aldps-enable; ++ }; ++ ++ phy7: ethernet-phy@7 { ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ reg = <7>; ++ reset-assert-us = <100000>; ++ reset-deassert-us = <100000>; ++ reset-gpios = <&pio 19 GPIO_ACTIVE_LOW>; ++ interrupt-parent = <&pio>; ++ interrupts = <47 IRQ_TYPE_LEVEL_LOW>; ++ realtek,aldps-enable; ++ }; ++ ++ switch: switch@31 { ++ compatible = "mediatek,mt7531"; ++ reg = <31>; ++ reset-gpios = <&pio 18 GPIO_ACTIVE_HIGH>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ interrupt-parent = <&pio>; ++ interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ label = "lan2"; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ label = "lan3"; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ label = "lan4"; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ label = "lan5"; ++ }; ++ ++ port@5 { ++ reg = <5>; ++ label = "lan1"; ++ phy-handle = <&phy7>; ++ phy-mode = "2500base-x"; ++ }; ++ ++ port@6 { ++ reg = <6>; ++ ethernet = <&gmac0>; ++ phy-mode = "2500base-x"; ++ ++ fixed-link { ++ speed = <2500>; ++ full-duplex; ++ pause; ++ }; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&pio { ++ wf_2g_5g_pins: wf_2g_5g-pins { ++ mux { ++ function = "wifi"; ++ groups = "wf_2g", "wf_5g"; ++ }; ++ conf { ++ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", ++ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", ++ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", ++ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", ++ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", ++ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", ++ "WF1_TOP_CLK", "WF1_TOP_DATA"; ++ drive-strength = <4>; ++ }; ++ }; ++ ++ mmc0_pins_default: mmc0-pins { ++ mux { ++ function = "emmc"; ++ groups = "emmc_51"; ++ }; ++ conf-cmd-dat { ++ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", ++ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", ++ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; ++ input-enable; ++ drive-strength = <4>; ++ mediatek,pull-up-adv = <1>; /* pull-up 10K */ ++ }; ++ conf-clk { ++ pins = "EMMC_CK"; ++ drive-strength = <6>; ++ mediatek,pull-down-adv = <2>; /* pull-down 50K */ ++ }; ++ conf-ds { ++ pins = "EMMC_DSL"; ++ mediatek,pull-down-adv = <2>; /* pull-down 50K */ ++ }; ++ conf-rst { ++ pins = "EMMC_RSTB"; ++ drive-strength = <4>; ++ mediatek,pull-up-adv = <1>; /* pull-up 10K */ ++ }; ++ }; ++ ++ mmc0_pins_uhs: mmc0-uhs-pins { ++ mux { ++ function = "emmc"; ++ groups = "emmc_51"; ++ }; ++ conf-cmd-dat { ++ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", ++ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", ++ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; ++ input-enable; ++ drive-strength = <4>; ++ mediatek,pull-up-adv = <1>; /* pull-up 10K */ ++ }; ++ conf-clk { ++ pins = "EMMC_CK"; ++ drive-strength = <6>; ++ mediatek,pull-down-adv = <2>; /* pull-down 50K */ ++ }; ++ conf-ds { ++ pins = "EMMC_DSL"; ++ mediatek,pull-down-adv = <2>; /* pull-down 50K */ ++ }; ++ conf-rst { ++ pins = "EMMC_RSTB"; ++ drive-strength = <4>; ++ mediatek,pull-up-adv = <1>; /* pull-up 10K */ ++ }; ++ }; ++}; ++ ++&crypto { ++ status = "okay"; ++}; ++ ++&ssusb { ++ vusb33-supply = <®_3p3v>; ++ vbus-supply = <&usb_vbus>; ++ status = "okay"; ++}; ++ ++&trng { ++ status = "okay"; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&usb_phy { ++ status = "okay"; ++}; ++ ++&watchdog { ++ status = "okay"; ++}; ++ ++&wifi { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wf_2g_5g_pins>; ++ status = "okay"; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default", "state_uhs"; ++ pinctrl-0 = <&mmc0_pins_default>; ++ pinctrl-1 = <&mmc0_pins_uhs>; ++ bus-width = <8>; ++ max-frequency = <200000000>; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ mmc-hs400-1_8v; ++ hs400-ds-delay = <0x14014>; ++ vmmc-supply = <®_3p3v>; ++ vqmmc-supply = <®_1p8v>; ++ non-removable; ++ no-sd; ++ no-sdio; ++ status = "okay"; ++}; +diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +index 42490cf8b3a0d..590c1fb2a6648 100644 +--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network ++++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +@@ -48,6 +48,7 @@ mediatek_setup_interfaces() + qihoo,360t7) + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan + ;; ++ glinet,gl-mt6000|\ + tplink,tl-xdr4288|\ + tplink,tl-xdr6088) + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" eth1 +@@ -90,6 +91,11 @@ mediatek_setup_macs() + wan_mac=$(macaddr_add "$lan_mac" 3) + label_mac=$lan_mac + ;; ++ glinet,gl-mt6000) ++ label_mac=$(mmc_get_mac_binary factory 0x0a) ++ wan_mac=$label_mac ++ lan_mac=$(macaddr_add "$label_mac" 2) ++ ;; + h3c,magic-nx30-pro) + wan_mac=$(mtd_get_mac_ascii pdt_data_1 ethaddr) + lan_mac=$(macaddr_add "$wan_mac" 1) +diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata +index f6f18272cc3d0..e4d33879c6d14 100644 +--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata ++++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata +@@ -36,6 +36,13 @@ case "$FIRMWARE" in + ;; + esac + ;; ++"mediatek/mt7986_eeprom_mt7976_dual.bin") ++ case "$board" in ++ glinet,gl-mt6000) ++ caldata_extract_mmc "factory" 0x0 0x1000 ++ ;; ++ esac ++ ;; + *) + exit 1 + ;; +diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +index 0fc90bd41b107..115ff2201ece6 100644 +--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac ++++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +@@ -43,6 +43,11 @@ case "$board" in + [ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 1) > /sys${DEVPATH}/macaddress + ;; ++ glinet,gl-mt6000) ++ addr=$(mmc_get_mac_binary factory 0x04) ++ [ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress ++ [ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress ++ ;; + h3c,magic-nx30-pro) + addr=$(mtd_get_mac_ascii pdt_data_1 ethaddr) + [ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress +diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +index 6155ddab72687..42156aefb4d66 100755 +--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh ++++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +@@ -100,6 +100,11 @@ + CI_UBIPART="ubi0" + nand_do_upgrade "$1" + ;; ++ glinet,gl-mt6000) ++ CI_KERNPART="kernel" ++ CI_ROOTPART="rootfs" ++ emmc_do_upgrade "$1" ++ ;; + h3c,magic-nx30-pro|\ + mediatek,mt7981-rfb|\ + qihoo,360t7|\ +@@ -161,6 +166,9 @@ + ;; + esac + ;; ++ glinet,gl-mt6000) ++ emmc_copy_config ++ ;; + esac + } + +diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk +index c9cf30b1cea1c..6082cf5f47ebd 100644 +--- a/target/linux/mediatek/image/filogic.mk ++++ b/target/linux/mediatek/image/filogic.mk +@@ -239,6 +239,21 @@ define Device/glinet_gl-mt3000 + endef + TARGET_DEVICES += glinet_gl-mt3000 + ++define Device/glinet_gl-mt6000 ++ DEVICE_VENDOR := GL.iNet ++ DEVICE_MODEL := GL-MT6000 ++ DEVICE_DTS := mt7986a-glinet-gl-mt6000 ++ DEVICE_DTS_DIR := ../dts ++ DEVICE_PACKAGES := kmod-usb2 kmod-usb3 kmod-mt7986-firmware mt7986-wo-firmware e2fsprogs f2fsck mkf2fs ++ IMAGES += factory.bin ++ IMAGE/factory.bin := append-kernel | pad-to 32M | append-rootfs ++ IMAGE/sysupgrade.bin := sysupgrade-tar | append-gl-metadata ++ ARTIFACTS := preloader.bin bl31-uboot.fip ++ ARTIFACT/preloader.bin := mt7986-bl2 emmc-ddr4 ++ ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot glinet_gl-mt6000 ++endef ++TARGET_DEVICES += glinet_gl-mt6000 ++ + define Device/h3c_magic-nx30-pro + DEVICE_VENDOR := H3C + DEVICE_MODEL := Magic NX30 Pro diff --git a/devices/mediatek_filogic/patches/6-jcg_q30-pro.patch b/devices/mediatek_filogic/patches/6-jcg_q30-pro.patch new file mode 100644 index 000000000000..04cb4427ca03 --- /dev/null +++ b/devices/mediatek_filogic/patches/6-jcg_q30-pro.patch @@ -0,0 +1,819 @@ +From 626344c9926dcf2db2e10681c19aab0328fee160 Mon Sep 17 00:00:00 2001 +From: Chukun Pan +Date: Fri, 16 Jun 2023 23:16:30 +0800 +Subject: [PATCH] mediatek: filogic: add JCG Q30 PRO support + +Hardware specification: + SoC: MediaTek MT7981B 2x A53 + Flash: Winbond 128MB + RAM: DDR3 256MB + Ethernet: 4x 10/100/1000 Mbps + Switch: MediaTek MT7531AE + WiFi: MediaTek MT7976C + Button: Reset + Power: DC 12V 1A + +Flash instructions: + 1. Connect to your PC via the Gigabit port of the router, + set a static ip on the ethernet interface of your PC. + (ip 192.168.1.254, gateway 192.168.1.1) + 2. Attach UART, pause at u-boot menu. + 3. Select "Upgrade ATF BL2", then use preloader.bin + 4. Select "Upgrade ATF FIP", then use bl31-uboot.fip + 5. Download the initramfs image, and type "reset", + waiting for tftp recovery to complete. + 6. After openwrt boots up, perform sysupgrade. + +Note: + 1. Since NMBM is disabled, we must back up all partitions. + 2. Although we can upgrade new firmware in the stock firmware, + we need the special fit image signature of MediaTek and + dual boot (hack kernel) to make u-boot boot it. So just + abandon these hacks and flash it via the serial port. + +Signed-off-by: Chukun Pan +--- + .../mediatek/dts/mt7981b-jcg-q30-pro.dts | 225 ++++++++++++++++++ + .../filogic/base-files/etc/board.d/02_network | 1 + + .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 5 + + .../base-files/lib/upgrade/platform.sh | 1 + + target/linux/mediatek/image/filogic.mk | 24 ++ + 5 files changed, 256 insertions(+) + create mode 100644 target/linux/mediatek/dts/mt7981b-jcg-q30-pro.dts + +diff --git a/target/linux/mediatek/dts/mt7981b-jcg-q30-pro.dts b/target/linux/mediatek/dts/mt7981b-jcg-q30-pro.dts +new file mode 100644 +index 0000000000000..adb86d9ebd06f +--- /dev/null ++++ b/target/linux/mediatek/dts/mt7981b-jcg-q30-pro.dts +@@ -0,0 +1,225 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++ ++/dts-v1/; ++#include ++#include ++ ++#include "mt7981.dtsi" ++ ++/ { ++ model = "JCG Q30 PRO"; ++ compatible = "jcg,q30-pro", "mediatek,mt7981"; ++ ++ aliases { ++ serial0 = &uart0; ++ label-mac-device = &gmac0; ++ led-boot = &led_status_red; ++ led-failsafe = &led_status_red; ++ led-running = &led_status_blue; ++ led-upgrade = &led_status_blue; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory { ++ reg = <0 0x40000000 0 0x10000000>; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ ++ reset { ++ label = "reset"; ++ linux,code = ; ++ gpios = <&pio 1 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led_status_red: red { ++ label = "red:status"; ++ gpios = <&pio 8 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ led_status_blue: blue { ++ label = "blue:status"; ++ gpios = <&pio 13 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++ð { ++ status = "okay"; ++ ++ gmac0: mac@0 { ++ compatible = "mediatek,eth-mac"; ++ reg = <0>; ++ phy-mode = "2500base-x"; ++ ++ nvmem-cells = <&macaddr_lan>; ++ nvmem-cell-names = "mac-address"; ++ ++ fixed-link { ++ speed = <2500>; ++ full-duplex; ++ pause; ++ }; ++ }; ++}; ++ ++&mdio_bus { ++ switch: switch@0 { ++ compatible = "mediatek,mt7531"; ++ reg = <31>; ++ reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ interrupt-parent = <&pio>; ++ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; ++ }; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_flash_pins>; ++ status = "okay"; ++ ++ spi_nand@0 { ++ compatible = "spi-nand"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ reg = <0>; ++ ++ spi-max-frequency = <52000000>; ++ spi-tx-bus-width = <4>; ++ spi-rx-bus-width = <4>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ label = "bl2"; ++ reg = <0x0000000 0x0100000>; ++ read-only; ++ }; ++ ++ partition@100000 { ++ label = "u-boot-env"; ++ reg = <0x0100000 0x0080000>; ++ }; ++ ++ factory: partition@180000 { ++ label = "Factory"; ++ reg = <0x0180000 0x0200000>; ++ read-only; ++ }; ++ ++ partition@380000 { ++ label = "fip"; ++ reg = <0x0380000 0x0200000>; ++ read-only; ++ }; ++ ++ partition@580000 { ++ label = "ubi"; ++ reg = <0x0580000 0x7000000>; ++ }; ++ }; ++ }; ++}; ++ ++&switch { ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ label = "wan"; ++ nvmem-cells = <&macaddr_wan>; ++ nvmem-cell-names = "mac-address"; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ label = "lan1"; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ label = "lan2"; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ label = "lan3"; ++ }; ++ ++ port@6 { ++ reg = <6>; ++ ethernet = <&gmac0>; ++ phy-mode = "2500base-x"; ++ ++ fixed-link { ++ speed = <2500>; ++ full-duplex; ++ pause; ++ }; ++ }; ++ }; ++}; ++ ++&pio { ++ spi0_flash_pins: spi0-pins { ++ mux { ++ function = "spi"; ++ groups = "spi0", "spi0_wp_hold"; ++ }; ++ ++ conf-pu { ++ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; ++ drive-strength = <8>; ++ mediatek,pull-up-adv = <0>; /* bias-disable */ ++ }; ++ ++ conf-pd { ++ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; ++ drive-strength = <8>; ++ mediatek,pull-up-adv = <0>; /* bias-disable */ ++ }; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&watchdog { ++ status = "okay"; ++}; ++ ++&wifi { ++ status = "okay"; ++ ++ mediatek,mtd-eeprom = <&factory 0x0>; ++}; ++ ++&factory { ++ compatible = "nvmem-cells"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ macaddr_wan: macaddr@a0024 { ++ reg = <0xa0024 0x6>; ++ }; ++ ++ macaddr_lan: macaddr@a002a { ++ reg = <0xa002a 0x6>; ++ }; ++}; +diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +index aad1d67ff6fde..0760d17a8e276 100644 +--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network ++++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +@@ -44,6 +44,7 @@ + mercusys,mr90x-v1) + ucidef_set_interfaces_lan_wan "lan0 lan1 lan2" eth1 + ;; ++ jcg,q30-pro|\ + qihoo,360t7) + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan + ;; +diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +index 395cc0f2dc546..a9de563a4bf09 100644 +--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac ++++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +@@ -65,6 +65,11 @@ case "$board" in + [ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress + ;; ++ jcg,q30-pro) ++ # Originally, phy1 is phy0 mac with LA bit set. However, this would conflict ++ # addresses on multiple VIFs with the other radio. Use label mac to set LA bit. ++ [ "$PHYNBR" = "1" ] && macaddr_setbit_la $(get_mac_label) > /sys${DEVPATH}/macaddress ++ ;; + mercusys,mr90x-v1) + addr=$(get_mac_binary "/tmp/tp_data/default-mac" 0) + [ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress +diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +index b7b9d65993256..cef1131ddb107 100755 +--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh ++++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +@@ -112,6 +112,7 @@ platform_do_upgrade() { + emmc_do_upgrade "$1" + ;; + h3c,magic-nx30-pro|\ ++ jcg,q30-pro|\ + mediatek,mt7981-rfb|\ + qihoo,360t7|\ + tplink,tl-xdr4288|\ +diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk +index 0ef3e94575689..4d4f3b62a2e85 100644 +--- a/target/linux/mediatek/image/filogic.mk ++++ b/target/linux/mediatek/image/filogic.mk +@@ -330,6 +330,30 @@ define Device/h3c_magic-nx30-pro + endef + TARGET_DEVICES += h3c_magic-nx30-pro + ++define Device/jcg_q30-pro ++ DEVICE_VENDOR := JCG ++ DEVICE_MODEL := Q30 PRO ++ DEVICE_DTS := mt7981b-jcg-q30-pro ++ DEVICE_DTS_DIR := ../dts ++ UBINIZE_OPTS := -E 5 ++ BLOCKSIZE := 128k ++ PAGESIZE := 2048 ++ KERNEL_IN_UBI := 1 ++ UBOOTENV_IN_UBI := 1 ++ IMAGES := sysupgrade.itb ++ KERNEL_INITRAMFS_SUFFIX := -recovery.itb ++ KERNEL := kernel-bin | gzip ++ KERNEL_INITRAMFS := kernel-bin | lzma | \ ++ fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k ++ IMAGE/sysupgrade.itb := append-kernel | \ ++ fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata ++ DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware ++ ARTIFACTS := preloader.bin bl31-uboot.fip ++ ARTIFACT/preloader.bin := mt7981-bl2 spim-nand-ddr3 ++ ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot jcg_q30-pro ++endef ++TARGET_DEVICES += jcg_q30-pro ++ + define Device/netgear_wax220 + DEVICE_VENDOR := NETGEAR + DEVICE_MODEL := WAX220 + +diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic +index d4d0969b7af3a..5cd63a46e612f 100644 +--- a/package/boot/uboot-envtools/files/mediatek_filogic ++++ b/package/boot/uboot-envtools/files/mediatek_filogic +@@ -80,6 +80,7 @@ + h3c,magic-nx30-pro) + ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x80000" "0x20000" "4" + ;; ++jcg,q30-pro|\ + tplink,tl-xdr4288|\ + tplink,tl-xdr6086|\ + tplink,tl-xdr6088|\ +diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile +index ad25d051fed90..a06d323bae81d 100644 +--- a/package/boot/uboot-mediatek/Makefile ++++ b/package/boot/uboot-mediatek/Makefile +@@ -236,6 +236,18 @@ define U-Boot/mt7981_h3c_magic-nx30-pro + DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3 + endef + ++define U-Boot/mt7981_jcg_q30-pro ++ NAME:=JCG Q30 PRO ++ BUILD_SUBTARGET:=filogic ++ BUILD_DEVICES:=jcg_q30-pro ++ UBOOT_CONFIG:=mt7981_jcg_q30-pro ++ UBOOT_IMAGE:=u-boot.fip ++ BL2_BOOTDEV:=spim-nand ++ BL2_SOC:=mt7981 ++ BL2_DDRTYPE:=ddr3 ++ DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3 ++endef ++ + define U-Boot/mt7981_rfb-spim-nand + NAME:=MT7981 Reference Board + BUILD_SUBTARGET:=filogic +@@ -522,6 +534,7 @@ + mt7629_rfb \ + mt7981_cmcc_rax3000m-emmc \ + mt7981_cmcc_rax3000m-nand \ ++ mt7981_jcg_q30-pro \ + mt7981_rfb-spim-nand \ + mt7981_rfb-emmc \ + mt7981_rfb-nor \ +diff --git a/package/boot/uboot-mediatek/patches/438-add-jcg_q30-pro.patch b/package/boot/uboot-mediatek/patches/438-add-jcg_q30-pro.patch +new file mode 100644 +index 0000000000000..639cae174e752 +--- /dev/null ++++ b/package/boot/uboot-mediatek/patches/438-add-jcg_q30-pro.patch +@@ -0,0 +1,420 @@ ++--- /dev/null +++++ b/configs/mt7981_jcg_q30-pro_defconfig ++@@ -0,0 +1,175 @@ +++CONFIG_ARM=y +++CONFIG_POSITION_INDEPENDENT=y +++CONFIG_ARCH_MEDIATEK=y +++CONFIG_TARGET_MT7981=y +++CONFIG_TEXT_BASE=0x41e00000 +++CONFIG_SYS_MALLOC_F_LEN=0x4000 +++CONFIG_SYS_HAS_NONCACHED_MEMORY=y +++CONFIG_NR_DRAM_BANKS=1 +++CONFIG_DEFAULT_DEVICE_TREE="mt7981_jcg_q30-pro" +++CONFIG_DEFAULT_ENV_FILE="jcg_q30-pro_env" +++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_jcg_q30-pro.dtb" +++CONFIG_OF_LIBFDT_OVERLAY=y +++CONFIG_DEBUG_UART_BASE=0x11002000 +++CONFIG_DEBUG_UART_CLOCK=40000000 +++CONFIG_DEBUG_UART=y +++CONFIG_SYS_LOAD_ADDR=0x46000000 +++CONFIG_SMBIOS_PRODUCT_NAME="" +++CONFIG_AUTOBOOT_KEYED=y +++CONFIG_BOOTDELAY=30 +++CONFIG_AUTOBOOT_MENU_SHOW=y +++CONFIG_CFB_CONSOLE_ANSI=y +++CONFIG_BOARD_LATE_INIT=y +++CONFIG_BUTTON=y +++CONFIG_BUTTON_GPIO=y +++CONFIG_GPIO_HOG=y +++CONFIG_CMD_ENV_FLAGS=y +++CONFIG_FIT=y +++CONFIG_FIT_ENABLE_SHA256_SUPPORT=y +++CONFIG_LED=y +++CONFIG_LED_BLINK=y +++CONFIG_LED_GPIO=y +++CONFIG_LOGLEVEL=7 +++CONFIG_LOG=y +++CONFIG_SYS_PROMPT="MT7981> " +++CONFIG_CMD_BOOTMENU=y +++CONFIG_CMD_BOOTP=y +++CONFIG_CMD_BUTTON=y +++CONFIG_CMD_CACHE=y +++CONFIG_CMD_CDP=y +++CONFIG_CMD_CPU=y +++CONFIG_CMD_DHCP=y +++CONFIG_CMD_DM=y +++CONFIG_CMD_DNS=y +++CONFIG_CMD_ECHO=y +++CONFIG_CMD_ENV_READMEM=y +++CONFIG_CMD_ERASEENV=y +++CONFIG_CMD_EXT4=y +++CONFIG_CMD_FAT=y +++CONFIG_CMD_FDT=y +++CONFIG_CMD_FS_GENERIC=y +++CONFIG_CMD_FS_UUID=y +++CONFIG_CMD_GPIO=y +++CONFIG_CMD_GPT=y +++CONFIG_CMD_HASH=y +++CONFIG_CMD_ITEST=y +++CONFIG_CMD_LED=y +++CONFIG_CMD_LICENSE=y +++CONFIG_CMD_LINK_LOCAL=y +++# CONFIG_CMD_MBR is not set +++CONFIG_CMD_PCI=y +++CONFIG_CMD_PSTORE=y +++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 +++CONFIG_CMD_SF_TEST=y +++CONFIG_CMD_PING=y +++CONFIG_CMD_PXE=y +++CONFIG_CMD_PWM=y +++CONFIG_CMD_SMC=y +++CONFIG_CMD_TFTPBOOT=y +++CONFIG_CMD_TFTPSRV=y +++CONFIG_CMD_UBI=y +++CONFIG_CMD_UBI_RENAME=y +++CONFIG_CMD_UBIFS=y +++CONFIG_CMD_ASKENV=y +++CONFIG_CMD_PART=y +++CONFIG_CMD_RARP=y +++CONFIG_CMD_SETEXPR=y +++CONFIG_CMD_SLEEP=y +++CONFIG_CMD_SNTP=y +++CONFIG_CMD_SOURCE=y +++CONFIG_CMD_STRINGS=y +++CONFIG_CMD_UUID=y +++CONFIG_DISPLAY_CPUINFO=y +++CONFIG_DM_MTD=y +++CONFIG_DM_REGULATOR=y +++CONFIG_DM_REGULATOR_FIXED=y +++CONFIG_DM_REGULATOR_GPIO=y +++CONFIG_DM_PWM=y +++CONFIG_PWM_MTK=y +++CONFIG_HUSH_PARSER=y +++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +++CONFIG_SYS_RELOC_GD_ENV_ADDR=y +++CONFIG_VERSION_VARIABLE=y +++CONFIG_PARTITION_UUIDS=y +++CONFIG_NETCONSOLE=y +++CONFIG_REGMAP=y +++CONFIG_SYSCON=y +++CONFIG_CLK=y +++CONFIG_DM_GPIO=y +++CONFIG_DM_SCSI=y +++CONFIG_AHCI=y +++CONFIG_AHCI_PCI=y +++CONFIG_SCSI_AHCI=y +++CONFIG_SCSI=y +++CONFIG_CMD_SCSI=y +++CONFIG_PHY=y +++CONFIG_PHY_MTK_TPHY=y +++CONFIG_PHY_FIXED=y +++CONFIG_MTK_AHCI=y +++CONFIG_DM_ETH=y +++CONFIG_MEDIATEK_ETH=y +++CONFIG_PCI=y +++# CONFIG_MMC is not set +++# CONFIG_DM_MMC is not set +++CONFIG_MTD=y +++CONFIG_MTD_UBI_FASTMAP=y +++CONFIG_DM_PCI=y +++CONFIG_PCIE_MEDIATEK=y +++CONFIG_PINCTRL=y +++CONFIG_PINCONF=y +++CONFIG_PINCTRL_MT7622=y +++CONFIG_POWER_DOMAIN=y +++CONFIG_PRE_CONSOLE_BUFFER=y +++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00 +++CONFIG_MTK_POWER_DOMAIN=y +++CONFIG_RAM=y +++CONFIG_DM_SERIAL=y +++CONFIG_MTK_SERIAL=y +++CONFIG_SPI=y +++CONFIG_DM_SPI=y +++CONFIG_MTK_SPI_NAND=y +++CONFIG_MTK_SPI_NAND_MTD=y +++CONFIG_SYSRESET_WATCHDOG=y +++CONFIG_WDT_MTK=y +++CONFIG_LZO=y +++CONFIG_ZSTD=y +++CONFIG_HEXDUMP=y +++CONFIG_RANDOM_UUID=y +++CONFIG_REGEX=y +++CONFIG_OF_EMBED=y +++CONFIG_ENV_OVERWRITE=y +++CONFIG_ENV_IS_IN_UBI=y +++CONFIG_ENV_UBI_PART="ubi" +++CONFIG_ENV_SIZE=0x1f000 +++CONFIG_ENV_SIZE_REDUND=0x1f000 +++CONFIG_ENV_UBI_VOLUME="ubootenv" +++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2" +++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +++CONFIG_NET_RANDOM_ETHADDR=y +++CONFIG_REGMAP=y +++CONFIG_SYSCON=y +++CONFIG_CLK=y +++CONFIG_PHY_FIXED=y +++CONFIG_DM_ETH=y +++CONFIG_MEDIATEK_ETH=y +++CONFIG_PINCTRL=y +++CONFIG_PINCONF=y +++CONFIG_PINCTRL_MT7981=y +++CONFIG_POWER_DOMAIN=y +++CONFIG_MTK_POWER_DOMAIN=y +++CONFIG_DM_REGULATOR=y +++CONFIG_DM_REGULATOR_FIXED=y +++CONFIG_DM_SERIAL=y +++CONFIG_MTK_SERIAL=y +++CONFIG_HEXDUMP=y +++CONFIG_USE_DEFAULT_ENV_FILE=y +++CONFIG_MTD_SPI_NAND=y +++CONFIG_MTK_SPIM=y +++CONFIG_CMD_MTD=y +++CONFIG_CMD_NAND=y +++CONFIG_CMD_NAND_TRIMFFS=y +++CONFIG_LMB_MAX_REGIONS=64 +++CONFIG_USE_IPADDR=y +++CONFIG_IPADDR="192.168.1.1" +++CONFIG_USE_SERVERIP=y +++CONFIG_SERVERIP="192.168.1.254" ++--- /dev/null +++++ b/arch/arm/dts/mt7981_jcg_q30-pro.dts ++@@ -0,0 +1,179 @@ +++// SPDX-License-Identifier: GPL-2.0 +++/* +++ * Copyright (c) 2022 MediaTek Inc. +++ * Author: Sam Shih +++ */ +++ +++/dts-v1/; +++#include "mt7981.dtsi" +++#include +++#include +++ +++/ { +++ #address-cells = <1>; +++ #size-cells = <1>; +++ model = "JCG Q30 PRO"; +++ compatible = "mediatek,mt7981", "mediatek,mt7981-rfb"; +++ +++ chosen { +++ stdout-path = &uart0; +++ tick-timer = &timer0; +++ }; +++ +++ memory@40000000 { +++ device_type = "memory"; +++ reg = <0x40000000 0x10000000>; +++ }; +++ +++ keys { +++ compatible = "gpio-keys"; +++ +++ factory { +++ label = "reset"; +++ linux,code = ; +++ gpios = <&gpio 1 GPIO_ACTIVE_LOW>; +++ }; +++ }; +++ +++ leds { +++ compatible = "gpio-leds"; +++ +++ status_red { +++ label = "red:status"; +++ gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; +++ }; +++ +++ status_blue { +++ label = "blue:status"; +++ gpios = <&gpio 13 GPIO_ACTIVE_LOW>; +++ }; +++ }; +++}; +++ +++&uart0 { +++ mediatek,force-highspeed; +++ status = "okay"; +++}; +++ +++&uart1 { +++ pinctrl-names = "default"; +++ pinctrl-0 = <&uart1_pins>; +++ status = "disabled"; +++}; +++ +++ð { +++ status = "okay"; +++ mediatek,gmac-id = <0>; +++ phy-mode = "2500base-x"; +++ mediatek,switch = "mt7531"; +++ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>; +++ +++ fixed-link { +++ speed = <2500>; +++ full-duplex; +++ }; +++}; +++ +++&pinctrl { +++ spi_flash_pins: spi0-pins-func-1 { +++ mux { +++ function = "flash"; +++ groups = "spi0", "spi0_wp_hold"; +++ }; +++ +++ conf-pu { +++ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; +++ drive-strength = ; +++ bias-pull-up = ; +++ }; +++ +++ conf-pd { +++ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; +++ drive-strength = ; +++ bias-pull-down = ; +++ }; +++ }; +++ +++ spic_pins: spi1-pins-func-1 { +++ mux { +++ function = "spi"; +++ groups = "spi1_1"; +++ }; +++ }; +++ +++ uart1_pins: spi1-pins-func-3 { +++ mux { +++ function = "uart"; +++ groups = "uart1_2"; +++ }; +++ }; +++ +++ pwm_pins: pwm0-pins-func-1 { +++ mux { +++ function = "pwm"; +++ groups = "pwm0_1", "pwm1_0"; +++ }; +++ }; +++}; +++ +++&pwm { +++ pinctrl-names = "default"; +++ pinctrl-0 = <&pwm_pins>; +++ status = "okay"; +++}; +++ +++&spi0 { +++ #address-cells = <1>; +++ #size-cells = <0>; +++ pinctrl-names = "default"; +++ pinctrl-0 = <&spi_flash_pins>; +++ status = "okay"; +++ must_tx; +++ enhance_timing; +++ dma_ext; +++ ipm_design; +++ support_quad; +++ tick_dly = <2>; +++ sample_sel = <0>; +++ +++ spi_nand@0 { +++ compatible = "spi-nand"; +++ reg = <0>; +++ spi-max-frequency = <52000000>; +++ +++ partitions { +++ compatible = "fixed-partitions"; +++ #address-cells = <1>; +++ #size-cells = <1>; +++ +++ partition@0 { +++ label = "bl2"; +++ reg = <0x0 0x100000>; +++ }; +++ +++ partition@100000 { +++ label = "orig-env"; +++ reg = <0x100000 0x80000>; +++ }; +++ +++ partition@160000 { +++ label = "factory"; +++ reg = <0x180000 0x200000>; +++ }; +++ +++ partition@380000 { +++ label = "fip"; +++ reg = <0x380000 0x200000>; +++ }; +++ +++ partition@580000 { +++ label = "ubi"; +++ reg = <0x580000 0x7000000>; +++ }; +++ }; +++ }; +++}; +++ +++&watchdog { +++ status = "disabled"; +++}; ++--- /dev/null +++++ b/jcg_q30-pro_env ++@@ -0,0 +1,57 @@ +++ipaddr=192.168.1.1 +++serverip=192.168.1.254 +++loadaddr=0x46000000 +++console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0 +++bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi +++bootconf=config-1 +++bootdelay=0 +++bootfile=openwrt-mediatek-filogic-jcg_q30-pro-initramfs-recovery.itb +++bootfile_bl2=openwrt-mediatek-filogic-jcg_q30-pro-preloader.bin +++bootfile_fip=openwrt-mediatek-filogic-jcg_q30-pro-bl31-uboot.fip +++bootfile_upg=openwrt-mediatek-filogic-jcg_q30-pro-squashfs-sysupgrade.itb +++bootled_pwr=blue:status +++bootled_rec=red:status +++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 +++bootmenu_default=0 +++bootmenu_delay=0 +++bootmenu_title= ( ( ( OpenWrt ) ) ) +++bootmenu_0=Initialize environment.=run _firstboot +++bootmenu_0d=Run default boot command.=run boot_default +++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return +++bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return +++bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return +++bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return +++bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return +++bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return +++bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return +++bootmenu_8=Reboot.=reset +++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset +++boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu +++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever +++boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off +++boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off +++boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever +++boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done +++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi +++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi +++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf +++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory +++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2 +++part_default=production +++part_recovery=recovery +++reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800 +++mtd_write_fip=mtd erase fip && mtd write fip $loadaddr +++mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr +++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format +++ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset +++ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi +++ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs +++ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery +++ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data +++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize +++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize +++ethaddr_factory=mtd read factory 0x40080000 0xa0000 0x800 && env readmem -b ethaddr 0x4008002a 0x6 ; setenv ethaddr_factory +++_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv +++_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first +++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title +++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" diff --git a/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-ax18.dts b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-ax18.dts index bf902da820c9..f42754f4f348 100644 --- a/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-ax18.dts +++ b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-ax18.dts @@ -65,3 +65,7 @@ }; }; }; + +&wifi { + qcom,ath11k-calibration-variant = "CMIOT-AX18"; +}; \ No newline at end of file diff --git a/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-upstreamable.dtsi b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-upstreamable.dtsi index dd03e63d32f1..06093989294f 100644 --- a/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-upstreamable.dtsi +++ b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-upstreamable.dtsi @@ -20,101 +20,3 @@ }; }; }; - -&soc { - wifi: wifi@c000000 { - compatible = "qcom,ipq6018-wifi"; - reg = <0x0 0xc000000 0x0 0x1000000>; - qcom,rproc = <&q6v5_wcss>; - interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; - interrupt-names = "misc-pulse1", "misc-latch", "sw-exception", - "watchdog", "ce0", "ce1", "ce2", "ce3", "ce4", - "ce5", "ce6", "ce7", "ce8", "ce9", "ce10", - "ce11", "host2wbm-desc-feed", - "host2reo-re-injection", "host2reo-command", - "host2rxdma-monitor-ring3", - "host2rxdma-monitor-ring2", - "host2rxdma-monitor-ring1", - "reo2ost-exception", "wbm2host-rx-release", - "reo2host-status", - "reo2host-destination-ring4", - "reo2host-destination-ring3", - "reo2host-destination-ring2", - "reo2host-destination-ring1", - "rxdma2host-monitor-destination-mac3", - "rxdma2host-monitor-destination-mac2", - "rxdma2host-monitor-destination-mac1", - "ppdu-end-interrupts-mac3", - "ppdu-end-interrupts-mac2", - "ppdu-end-interrupts-mac1", - "rxdma2host-monitor-status-ring-mac3", - "rxdma2host-monitor-status-ring-mac2", - "rxdma2host-monitor-status-ring-mac1", - "host2rxdma-host-buf-ring-mac3", - "host2rxdma-host-buf-ring-mac2", - "host2rxdma-host-buf-ring-mac1", - "rxdma2host-destination-ring-mac3", - "rxdma2host-destination-ring-mac2", - "rxdma2host-destination-ring-mac1", - "host2tcl-input-ring4", - "host2tcl-input-ring3", - "host2tcl-input-ring2", - "host2tcl-input-ring1", - "wbm2host-tx-completions-ring3", - "wbm2host-tx-completions-ring2", - "wbm2host-tx-completions-ring1", - "tcl2host-status-ring"; - status = "disabled"; - }; -};