From 386b24c80392b9e3d63be58ee6589fda0f70df33 Mon Sep 17 00:00:00 2001 From: Hugo McNally Date: Wed, 13 Nov 2024 23:47:58 +0000 Subject: [PATCH] pinmux: changed documentation names to match the driver. The names in the driver can't have square brackets for IO indices. --- doc/ip/pinmux/README.md | 310 ++++++++++++------------- sw/cheri/checks/pinmux_check.cc | 5 +- sw/cheri/common/platform-pinmux.hh | 30 ++- sw/cheri/common/platform-pinmux.hh.tpl | 34 +-- sw/cheri/tests/pinmux_tests.hh | 5 +- util/top_gen/generator.py | 5 +- 6 files changed, 198 insertions(+), 191 deletions(-) diff --git a/doc/ip/pinmux/README.md b/doc/ip/pinmux/README.md index cdca3e759..65d5b72d5 100644 --- a/doc/ip/pinmux/README.md +++ b/doc/ip/pinmux/README.md @@ -12,166 +12,166 @@ The default value for all of these selectors is `'b10`. | Address | Pin output | Possible block outputs | |---------|------------|------------------------| -| 0x000 | `ser0_tx` | 0, `uart[0].tx` | -| 0x001 | `ser1_tx` | 0, `uart[1].tx`, `uart[2].tx` | -| 0x002 | `rs232_tx` | 0, `uart[2].tx` | -| 0x003 | `rs485_tx` | 0, `uart[2].tx` | -| 0x004 | `scl0` | 0, `i2c[0].scl` | -| 0x005 | `sda0` | 0, `i2c[0].sda` | -| 0x006 | `scl1` | 0, `i2c[1].scl` | -| 0x007 | `sda1` | 0, `i2c[1].sda` | -| 0x008 | `rph_g0` | 0, `i2c[0].sda`, `gpio[0].ios[0]` | -| 0x009 | `rph_g1` | 0, `i2c[0].scl`, `gpio[0].ios[1]` | -| 0x00a | `rph_g2_sda` | 0, `i2c[1].sda`, `gpio[0].ios[2]` | -| 0x00b | `rph_g3_scl` | 0, `i2c[1].scl`, `gpio[0].ios[3]` | -| 0x00c | `rph_g4` | 0, `gpio[0].ios[4]` | -| 0x00d | `rph_g5` | 0, `gpio[0].ios[5]` | -| 0x00e | `rph_g6` | 0, `gpio[0].ios[6]` | -| 0x00f | `rph_g7` | 0, `spi[1].cs[1]`, `gpio[0].ios[7]` | -| 0x010 | `rph_g8` | 0, `spi[1].cs[0]`, `gpio[0].ios[8]` | -| 0x011 | `rph_g9` | 0, `gpio[0].ios[9]` | -| 0x012 | `rph_g10` | 0, `spi[1].copi`, `gpio[0].ios[10]` | -| 0x013 | `rph_g11` | 0, `spi[1].sclk`, `gpio[0].ios[11]` | -| 0x014 | `rph_g12` | 0, `gpio[0].ios[12]`, `pwm_out[0]` | -| 0x015 | `rph_g13` | 0, `gpio[0].ios[13]`, `pwm_out[1]` | -| 0x016 | `rph_txd0` | 0, `uart[1].tx`, `gpio[0].ios[14]` | -| 0x017 | `rph_rxd0` | 0, `gpio[0].ios[15]` | -| 0x018 | `rph_g16` | 0, `spi[2].cs[2]`, `gpio[0].ios[16]` | -| 0x019 | `rph_g17` | 0, `spi[2].cs[1]`, `gpio[0].ios[17]` | -| 0x01a | `rph_g18` | 0, `spi[2].cs[0]`, `gpio[0].ios[18]`, `pwm_out[2]` | -| 0x01b | `rph_g19` | 0, `gpio[0].ios[19]`, `pwm_out[3]` | -| 0x01c | `rph_g20` | 0, `spi[2].copi`, `gpio[0].ios[20]`, `pwm_out[4]` | -| 0x01d | `rph_g21` | 0, `spi[2].sclk`, `gpio[0].ios[21]`, `pwm_out[5]` | -| 0x01e | `rph_g22` | 0, `gpio[0].ios[22]` | -| 0x01f | `rph_g23` | 0, `gpio[0].ios[23]` | -| 0x020 | `rph_g24` | 0, `gpio[0].ios[24]` | -| 0x021 | `rph_g25` | 0, `gpio[0].ios[25]` | -| 0x022 | `rph_g26` | 0, `gpio[0].ios[26]` | -| 0x023 | `rph_g27` | 0, `gpio[0].ios[27]` | -| 0x024 | `ah_tmpio0` | 0, `gpio[1].ios[0]` | -| 0x025 | `ah_tmpio1` | 0, `uart[1].tx`, `gpio[1].ios[1]` | -| 0x026 | `ah_tmpio2` | 0, `gpio[1].ios[2]` | -| 0x027 | `ah_tmpio3` | 0, `gpio[1].ios[3]`, `pwm_out[0]` | -| 0x028 | `ah_tmpio4` | 0, `gpio[1].ios[4]` | -| 0x029 | `ah_tmpio5` | 0, `gpio[1].ios[5]`, `pwm_out[1]` | -| 0x02a | `ah_tmpio6` | 0, `gpio[1].ios[6]`, `pwm_out[2]` | -| 0x02b | `ah_tmpio7` | 0, `gpio[1].ios[7]` | -| 0x02c | `ah_tmpio8` | 0, `gpio[1].ios[8]` | -| 0x02d | `ah_tmpio9` | 0, `gpio[1].ios[9]`, `pwm_out[3]` | -| 0x02e | `ah_tmpio10` | 0, `spi[1].cs[3]`, `gpio[1].ios[10]`, `pwm_out[4]` | -| 0x02f | `ah_tmpio11` | 0, `spi[1].copi`, `gpio[1].ios[11]`, `pwm_out[5]` | -| 0x030 | `ah_tmpio12` | 0, `gpio[1].ios[12]` | -| 0x031 | `ah_tmpio13` | 0, `spi[1].sclk`, `gpio[1].ios[13]` | -| 0x032 | `mb1` | 0, `spi[2].cs[3]` | -| 0x033 | `mb2` | 0, `spi[2].sclk` | -| 0x034 | `mb4` | 0, `spi[2].copi` | -| 0x035 | `mb5` | 0, `i2c[1].sda` | -| 0x036 | `mb6` | 0, `i2c[1].scl` | -| 0x037 | `mb7` | 0, `uart[1].tx` | -| 0x038 | `mb10` | 0, `pwm_out[0]` | -| 0x039 | `pmod0_1` | 0, `gpio[2].ios[0]`, `spi[1].cs[0]` | -| 0x03a | `pmod0_2` | 0, `gpio[2].ios[1]`, `spi[1].copi`, `pwm_out[1]`, `uart[1].tx` | -| 0x03b | `pmod0_3` | 0, `gpio[2].ios[2]`, `i2c[0].scl` | -| 0x03c | `pmod0_4` | 0, `gpio[2].ios[3]`, `spi[1].sclk`, `i2c[0].sda` | -| 0x03d | `pmod0_7` | 0, `gpio[2].ios[4]` | -| 0x03e | `pmod0_8` | 0, `gpio[2].ios[5]`, `pwm_out[2]` | -| 0x03f | `pmod0_9` | 0, `gpio[2].ios[6]`, `spi[1].cs[1]` | -| 0x040 | `pmod0_10` | 0, `gpio[2].ios[7]`, `spi[1].cs[2]` | -| 0x041 | `pmod1_1` | 0, `gpio[3].ios[0]`, `spi[2].cs[0]` | -| 0x042 | `pmod1_2` | 0, `gpio[3].ios[1]`, `spi[2].copi`, `pwm_out[3]`, `uart[2].tx` | -| 0x043 | `pmod1_3` | 0, `gpio[3].ios[2]`, `i2c[1].scl` | -| 0x044 | `pmod1_4` | 0, `gpio[3].ios[3]`, `spi[2].sclk`, `i2c[1].sda` | -| 0x045 | `pmod1_7` | 0, `gpio[3].ios[4]` | -| 0x046 | `pmod1_8` | 0, `gpio[3].ios[5]`, `pwm_out[4]` | -| 0x047 | `pmod1_9` | 0, `gpio[3].ios[6]`, `spi[2].cs[1]` | -| 0x048 | `pmod1_10` | 0, `gpio[3].ios[7]`, `spi[2].cs[2]` | -| 0x049 | `pmodc_1` | 0, `gpio[4].ios[0]` | -| 0x04a | `pmodc_2` | 0, `gpio[4].ios[1]` | -| 0x04b | `pmodc_3` | 0, `gpio[4].ios[2]` | -| 0x04c | `pmodc_4` | 0, `gpio[4].ios[3]` | -| 0x04d | `pmodc_5` | 0, `gpio[4].ios[4]` | -| 0x04e | `pmodc_6` | 0, `gpio[4].ios[5]` | -| 0x04f | `appspi_d0` | 0, `spi[0].copi` | -| 0x050 | `appspi_clk` | 0, `spi[0].sclk` | -| 0x051 | `appspi_cs` | 0, `spi[0].cs[0]` | -| 0x052 | `microsd_cmd` | 0, `spi[0].copi` | -| 0x053 | `microsd_clk` | 0, `spi[0].sclk` | -| 0x054 | `microsd_dat3` | 0, `spi[0].cs[1]` | +| 0x000 | `ser0_tx` | 0, `uart_0_tx` | +| 0x001 | `ser1_tx` | 0, `uart_1_tx`, `uart_2_tx` | +| 0x002 | `rs232_tx` | 0, `uart_2_tx` | +| 0x003 | `rs485_tx` | 0, `uart_2_tx` | +| 0x004 | `scl0` | 0, `i2c_0_scl` | +| 0x005 | `sda0` | 0, `i2c_0_sda` | +| 0x006 | `scl1` | 0, `i2c_1_scl` | +| 0x007 | `sda1` | 0, `i2c_1_sda` | +| 0x008 | `rph_g0` | 0, `i2c_0_sda`, `gpio_0_ios_0` | +| 0x009 | `rph_g1` | 0, `i2c_0_scl`, `gpio_0_ios_1` | +| 0x00a | `rph_g2_sda` | 0, `i2c_1_sda`, `gpio_0_ios_2` | +| 0x00b | `rph_g3_scl` | 0, `i2c_1_scl`, `gpio_0_ios_3` | +| 0x00c | `rph_g4` | 0, `gpio_0_ios_4` | +| 0x00d | `rph_g5` | 0, `gpio_0_ios_5` | +| 0x00e | `rph_g6` | 0, `gpio_0_ios_6` | +| 0x00f | `rph_g7` | 0, `spi_1_cs_1`, `gpio_0_ios_7` | +| 0x010 | `rph_g8` | 0, `spi_1_cs_0`, `gpio_0_ios_8` | +| 0x011 | `rph_g9` | 0, `gpio_0_ios_9` | +| 0x012 | `rph_g10` | 0, `spi_1_copi`, `gpio_0_ios_10` | +| 0x013 | `rph_g11` | 0, `spi_1_sclk`, `gpio_0_ios_11` | +| 0x014 | `rph_g12` | 0, `gpio_0_ios_12`, `pwm_out_0` | +| 0x015 | `rph_g13` | 0, `gpio_0_ios_13`, `pwm_out_1` | +| 0x016 | `rph_txd0` | 0, `uart_1_tx`, `gpio_0_ios_14` | +| 0x017 | `rph_rxd0` | 0, `gpio_0_ios_15` | +| 0x018 | `rph_g16` | 0, `spi_2_cs_2`, `gpio_0_ios_16` | +| 0x019 | `rph_g17` | 0, `spi_2_cs_1`, `gpio_0_ios_17` | +| 0x01a | `rph_g18` | 0, `spi_2_cs_0`, `gpio_0_ios_18`, `pwm_out_2` | +| 0x01b | `rph_g19` | 0, `gpio_0_ios_19`, `pwm_out_3` | +| 0x01c | `rph_g20` | 0, `spi_2_copi`, `gpio_0_ios_20`, `pwm_out_4` | +| 0x01d | `rph_g21` | 0, `spi_2_sclk`, `gpio_0_ios_21`, `pwm_out_5` | +| 0x01e | `rph_g22` | 0, `gpio_0_ios_22` | +| 0x01f | `rph_g23` | 0, `gpio_0_ios_23` | +| 0x020 | `rph_g24` | 0, `gpio_0_ios_24` | +| 0x021 | `rph_g25` | 0, `gpio_0_ios_25` | +| 0x022 | `rph_g26` | 0, `gpio_0_ios_26` | +| 0x023 | `rph_g27` | 0, `gpio_0_ios_27` | +| 0x024 | `ah_tmpio0` | 0, `gpio_1_ios_0` | +| 0x025 | `ah_tmpio1` | 0, `uart_1_tx`, `gpio_1_ios_1` | +| 0x026 | `ah_tmpio2` | 0, `gpio_1_ios_2` | +| 0x027 | `ah_tmpio3` | 0, `gpio_1_ios_3`, `pwm_out_0` | +| 0x028 | `ah_tmpio4` | 0, `gpio_1_ios_4` | +| 0x029 | `ah_tmpio5` | 0, `gpio_1_ios_5`, `pwm_out_1` | +| 0x02a | `ah_tmpio6` | 0, `gpio_1_ios_6`, `pwm_out_2` | +| 0x02b | `ah_tmpio7` | 0, `gpio_1_ios_7` | +| 0x02c | `ah_tmpio8` | 0, `gpio_1_ios_8` | +| 0x02d | `ah_tmpio9` | 0, `gpio_1_ios_9`, `pwm_out_3` | +| 0x02e | `ah_tmpio10` | 0, `spi_1_cs_3`, `gpio_1_ios_10`, `pwm_out_4` | +| 0x02f | `ah_tmpio11` | 0, `spi_1_copi`, `gpio_1_ios_11`, `pwm_out_5` | +| 0x030 | `ah_tmpio12` | 0, `gpio_1_ios_12` | +| 0x031 | `ah_tmpio13` | 0, `spi_1_sclk`, `gpio_1_ios_13` | +| 0x032 | `mb1` | 0, `spi_2_cs_3` | +| 0x033 | `mb2` | 0, `spi_2_sclk` | +| 0x034 | `mb4` | 0, `spi_2_copi` | +| 0x035 | `mb5` | 0, `i2c_1_sda` | +| 0x036 | `mb6` | 0, `i2c_1_scl` | +| 0x037 | `mb7` | 0, `uart_1_tx` | +| 0x038 | `mb10` | 0, `pwm_out_0` | +| 0x039 | `pmod0_1` | 0, `gpio_2_ios_0`, `spi_1_cs_0` | +| 0x03a | `pmod0_2` | 0, `gpio_2_ios_1`, `spi_1_copi`, `pwm_out_1`, `uart_1_tx` | +| 0x03b | `pmod0_3` | 0, `gpio_2_ios_2`, `i2c_0_scl` | +| 0x03c | `pmod0_4` | 0, `gpio_2_ios_3`, `spi_1_sclk`, `i2c_0_sda` | +| 0x03d | `pmod0_7` | 0, `gpio_2_ios_4` | +| 0x03e | `pmod0_8` | 0, `gpio_2_ios_5`, `pwm_out_2` | +| 0x03f | `pmod0_9` | 0, `gpio_2_ios_6`, `spi_1_cs_1` | +| 0x040 | `pmod0_10` | 0, `gpio_2_ios_7`, `spi_1_cs_2` | +| 0x041 | `pmod1_1` | 0, `gpio_3_ios_0`, `spi_2_cs_0` | +| 0x042 | `pmod1_2` | 0, `gpio_3_ios_1`, `spi_2_copi`, `pwm_out_3`, `uart_2_tx` | +| 0x043 | `pmod1_3` | 0, `gpio_3_ios_2`, `i2c_1_scl` | +| 0x044 | `pmod1_4` | 0, `gpio_3_ios_3`, `spi_2_sclk`, `i2c_1_sda` | +| 0x045 | `pmod1_7` | 0, `gpio_3_ios_4` | +| 0x046 | `pmod1_8` | 0, `gpio_3_ios_5`, `pwm_out_4` | +| 0x047 | `pmod1_9` | 0, `gpio_3_ios_6`, `spi_2_cs_1` | +| 0x048 | `pmod1_10` | 0, `gpio_3_ios_7`, `spi_2_cs_2` | +| 0x049 | `pmodc_1` | 0, `gpio_4_ios_0` | +| 0x04a | `pmodc_2` | 0, `gpio_4_ios_1` | +| 0x04b | `pmodc_3` | 0, `gpio_4_ios_2` | +| 0x04c | `pmodc_4` | 0, `gpio_4_ios_3` | +| 0x04d | `pmodc_5` | 0, `gpio_4_ios_4` | +| 0x04e | `pmodc_6` | 0, `gpio_4_ios_5` | +| 0x04f | `appspi_d0` | 0, `spi_0_copi` | +| 0x050 | `appspi_clk` | 0, `spi_0_sclk` | +| 0x051 | `appspi_cs` | 0, `spi_0_cs_0` | +| 0x052 | `microsd_cmd` | 0, `spi_0_copi` | +| 0x053 | `microsd_clk` | 0, `spi_0_sclk` | +| 0x054 | `microsd_dat3` | 0, `spi_0_cs_1` | Besides the output pin selectors, there are also selectors for which pin should drive block inputs: | Address | Block input | Possible pin inputs | |---------|-------------|---------------------| -| 0x800 | `gpio[0].ios[0]` | 0, `rph_g0` | -| 0x801 | `gpio[0].ios[1]` | 0, `rph_g1` | -| 0x802 | `gpio[0].ios[2]` | 0, `rph_g2_sda` | -| 0x803 | `gpio[0].ios[3]` | 0, `rph_g3_scl` | -| 0x804 | `gpio[0].ios[4]` | 0, `rph_g4` | -| 0x805 | `gpio[0].ios[5]` | 0, `rph_g5` | -| 0x806 | `gpio[0].ios[6]` | 0, `rph_g6` | -| 0x807 | `gpio[0].ios[7]` | 0, `rph_g7` | -| 0x808 | `gpio[0].ios[8]` | 0, `rph_g8` | -| 0x809 | `gpio[0].ios[9]` | 0, `rph_g9` | -| 0x80a | `gpio[0].ios[10]` | 0, `rph_g10` | -| 0x80b | `gpio[0].ios[11]` | 0, `rph_g11` | -| 0x80c | `gpio[0].ios[12]` | 0, `rph_g12` | -| 0x80d | `gpio[0].ios[13]` | 0, `rph_g13` | -| 0x80e | `gpio[0].ios[14]` | 0, `rph_txd0` | -| 0x80f | `gpio[0].ios[15]` | 0, `rph_rxd0` | -| 0x810 | `gpio[0].ios[16]` | 0, `rph_g16` | -| 0x811 | `gpio[0].ios[17]` | 0, `rph_g17` | -| 0x812 | `gpio[0].ios[18]` | 0, `rph_g18` | -| 0x813 | `gpio[0].ios[19]` | 0, `rph_g19` | -| 0x814 | `gpio[0].ios[20]` | 0, `rph_g20` | -| 0x815 | `gpio[0].ios[21]` | 0, `rph_g21` | -| 0x816 | `gpio[0].ios[22]` | 0, `rph_g22` | -| 0x817 | `gpio[0].ios[23]` | 0, `rph_g23` | -| 0x818 | `gpio[0].ios[24]` | 0, `rph_g24` | -| 0x819 | `gpio[0].ios[25]` | 0, `rph_g25` | -| 0x81a | `gpio[0].ios[26]` | 0, `rph_g26` | -| 0x81b | `gpio[0].ios[27]` | 0, `rph_g27` | -| 0x81c | `gpio[1].ios[0]` | 0, `ah_tmpio0` | -| 0x81d | `gpio[1].ios[1]` | 0, `ah_tmpio1` | -| 0x81e | `gpio[1].ios[2]` | 0, `ah_tmpio2` | -| 0x81f | `gpio[1].ios[3]` | 0, `ah_tmpio3` | -| 0x820 | `gpio[1].ios[4]` | 0, `ah_tmpio4` | -| 0x821 | `gpio[1].ios[5]` | 0, `ah_tmpio5` | -| 0x822 | `gpio[1].ios[6]` | 0, `ah_tmpio6` | -| 0x823 | `gpio[1].ios[7]` | 0, `ah_tmpio7` | -| 0x824 | `gpio[1].ios[8]` | 0, `ah_tmpio8` | -| 0x825 | `gpio[1].ios[9]` | 0, `ah_tmpio9` | -| 0x826 | `gpio[1].ios[10]` | 0, `ah_tmpio10` | -| 0x827 | `gpio[1].ios[11]` | 0, `ah_tmpio11` | -| 0x828 | `gpio[1].ios[12]` | 0, `ah_tmpio12` | -| 0x829 | `gpio[1].ios[13]` | 0, `ah_tmpio13` | -| 0x82a | `gpio[2].ios[0]` | 0, `pmod0_1` | -| 0x82b | `gpio[2].ios[1]` | 0, `pmod0_2` | -| 0x82c | `gpio[2].ios[2]` | 0, `pmod0_3` | -| 0x82d | `gpio[2].ios[3]` | 0, `pmod0_4` | -| 0x82e | `gpio[2].ios[4]` | 0, `pmod0_7` | -| 0x82f | `gpio[2].ios[5]` | 0, `pmod0_8` | -| 0x830 | `gpio[2].ios[6]` | 0, `pmod0_9` | -| 0x831 | `gpio[2].ios[7]` | 0, `pmod0_10` | -| 0x832 | `gpio[3].ios[0]` | 0, `pmod1_1` | -| 0x833 | `gpio[3].ios[1]` | 0, `pmod1_2` | -| 0x834 | `gpio[3].ios[2]` | 0, `pmod1_3` | -| 0x835 | `gpio[3].ios[3]` | 0, `pmod1_4` | -| 0x836 | `gpio[3].ios[4]` | 0, `pmod1_7` | -| 0x837 | `gpio[3].ios[5]` | 0, `pmod1_8` | -| 0x838 | `gpio[3].ios[6]` | 0, `pmod1_9` | -| 0x839 | `gpio[3].ios[7]` | 0, `pmod1_10` | -| 0x83a | `gpio[4].ios[0]` | 0, `pmodc_1` | -| 0x83b | `gpio[4].ios[1]` | 0, `pmodc_2` | -| 0x83c | `gpio[4].ios[2]` | 0, `pmodc_3` | -| 0x83d | `gpio[4].ios[3]` | 0, `pmodc_4` | -| 0x83e | `gpio[4].ios[4]` | 0, `pmodc_5` | -| 0x83f | `gpio[4].ios[5]` | 0, `pmodc_6` | -| 0x840 | `uart[0].rx` | 1, `ser0_rx` | -| 0x841 | `uart[1].rx` | 1, `ser1_rx`, `rph_rxd0`, `ah_tmpio0`, `mb8`, `pmod0_3` | -| 0x842 | `uart[2].rx` | 1, `ser1_rx`, `rs232_rx`, `rs485_rx`, `pmod1_3` | -| 0x843 | `spi[0].cipo` | 0, `appspi_d1`, `microsd_dat0` | -| 0x844 | `spi[1].cipo` | 0, `rph_g9`, `ah_tmpio12`, `pmod0_3` | -| 0x845 | `spi[2].cipo` | 0, `rph_g19`, `mb3`, `pmod1_3` | +| 0x800 | `gpio_0_ios_0` | 0, `rph_g0` | +| 0x801 | `gpio_0_ios_1` | 0, `rph_g1` | +| 0x802 | `gpio_0_ios_2` | 0, `rph_g2_sda` | +| 0x803 | `gpio_0_ios_3` | 0, `rph_g3_scl` | +| 0x804 | `gpio_0_ios_4` | 0, `rph_g4` | +| 0x805 | `gpio_0_ios_5` | 0, `rph_g5` | +| 0x806 | `gpio_0_ios_6` | 0, `rph_g6` | +| 0x807 | `gpio_0_ios_7` | 0, `rph_g7` | +| 0x808 | `gpio_0_ios_8` | 0, `rph_g8` | +| 0x809 | `gpio_0_ios_9` | 0, `rph_g9` | +| 0x80a | `gpio_0_ios_10` | 0, `rph_g10` | +| 0x80b | `gpio_0_ios_11` | 0, `rph_g11` | +| 0x80c | `gpio_0_ios_12` | 0, `rph_g12` | +| 0x80d | `gpio_0_ios_13` | 0, `rph_g13` | +| 0x80e | `gpio_0_ios_14` | 0, `rph_txd0` | +| 0x80f | `gpio_0_ios_15` | 0, `rph_rxd0` | +| 0x810 | `gpio_0_ios_16` | 0, `rph_g16` | +| 0x811 | `gpio_0_ios_17` | 0, `rph_g17` | +| 0x812 | `gpio_0_ios_18` | 0, `rph_g18` | +| 0x813 | `gpio_0_ios_19` | 0, `rph_g19` | +| 0x814 | `gpio_0_ios_20` | 0, `rph_g20` | +| 0x815 | `gpio_0_ios_21` | 0, `rph_g21` | +| 0x816 | `gpio_0_ios_22` | 0, `rph_g22` | +| 0x817 | `gpio_0_ios_23` | 0, `rph_g23` | +| 0x818 | `gpio_0_ios_24` | 0, `rph_g24` | +| 0x819 | `gpio_0_ios_25` | 0, `rph_g25` | +| 0x81a | `gpio_0_ios_26` | 0, `rph_g26` | +| 0x81b | `gpio_0_ios_27` | 0, `rph_g27` | +| 0x81c | `gpio_1_ios_0` | 0, `ah_tmpio0` | +| 0x81d | `gpio_1_ios_1` | 0, `ah_tmpio1` | +| 0x81e | `gpio_1_ios_2` | 0, `ah_tmpio2` | +| 0x81f | `gpio_1_ios_3` | 0, `ah_tmpio3` | +| 0x820 | `gpio_1_ios_4` | 0, `ah_tmpio4` | +| 0x821 | `gpio_1_ios_5` | 0, `ah_tmpio5` | +| 0x822 | `gpio_1_ios_6` | 0, `ah_tmpio6` | +| 0x823 | `gpio_1_ios_7` | 0, `ah_tmpio7` | +| 0x824 | `gpio_1_ios_8` | 0, `ah_tmpio8` | +| 0x825 | `gpio_1_ios_9` | 0, `ah_tmpio9` | +| 0x826 | `gpio_1_ios_10` | 0, `ah_tmpio10` | +| 0x827 | `gpio_1_ios_11` | 0, `ah_tmpio11` | +| 0x828 | `gpio_1_ios_12` | 0, `ah_tmpio12` | +| 0x829 | `gpio_1_ios_13` | 0, `ah_tmpio13` | +| 0x82a | `gpio_2_ios_0` | 0, `pmod0_1` | +| 0x82b | `gpio_2_ios_1` | 0, `pmod0_2` | +| 0x82c | `gpio_2_ios_2` | 0, `pmod0_3` | +| 0x82d | `gpio_2_ios_3` | 0, `pmod0_4` | +| 0x82e | `gpio_2_ios_4` | 0, `pmod0_7` | +| 0x82f | `gpio_2_ios_5` | 0, `pmod0_8` | +| 0x830 | `gpio_2_ios_6` | 0, `pmod0_9` | +| 0x831 | `gpio_2_ios_7` | 0, `pmod0_10` | +| 0x832 | `gpio_3_ios_0` | 0, `pmod1_1` | +| 0x833 | `gpio_3_ios_1` | 0, `pmod1_2` | +| 0x834 | `gpio_3_ios_2` | 0, `pmod1_3` | +| 0x835 | `gpio_3_ios_3` | 0, `pmod1_4` | +| 0x836 | `gpio_3_ios_4` | 0, `pmod1_7` | +| 0x837 | `gpio_3_ios_5` | 0, `pmod1_8` | +| 0x838 | `gpio_3_ios_6` | 0, `pmod1_9` | +| 0x839 | `gpio_3_ios_7` | 0, `pmod1_10` | +| 0x83a | `gpio_4_ios_0` | 0, `pmodc_1` | +| 0x83b | `gpio_4_ios_1` | 0, `pmodc_2` | +| 0x83c | `gpio_4_ios_2` | 0, `pmodc_3` | +| 0x83d | `gpio_4_ios_3` | 0, `pmodc_4` | +| 0x83e | `gpio_4_ios_4` | 0, `pmodc_5` | +| 0x83f | `gpio_4_ios_5` | 0, `pmodc_6` | +| 0x840 | `uart_0_rx` | 1, `ser0_rx` | +| 0x841 | `uart_1_rx` | 1, `ser1_rx`, `rph_rxd0`, `ah_tmpio0`, `mb8`, `pmod0_3` | +| 0x842 | `uart_2_rx` | 1, `ser1_rx`, `rs232_rx`, `rs485_rx`, `pmod1_3` | +| 0x843 | `spi_0_cipo` | 0, `appspi_d1`, `microsd_dat0` | +| 0x844 | `spi_1_cipo` | 0, `rph_g9`, `ah_tmpio12`, `pmod0_3` | +| 0x845 | `spi_2_cipo` | 0, `rph_g19`, `mb3`, `pmod1_3` | ## Regeneration diff --git a/sw/cheri/checks/pinmux_check.cc b/sw/cheri/checks/pinmux_check.cc index e6d715350..41f010c26 100644 --- a/sw/cheri/checks/pinmux_check.cc +++ b/sw/cheri/checks/pinmux_check.cc @@ -18,9 +18,6 @@ using namespace CHERI; -#define PINMUX_SER0_TX_DISABLED (0) -#define PINMUX_SER0_TX_UART0_TX (1) - /** * Blocks until the UART transmit FIFO is empty. */ @@ -56,7 +53,7 @@ void block_until_uart_tx_done(Capability uart) { block_until_uart_tx_done(uart); // Pinmux Serial 0 TX (used by console UART) to UART0_TX. - ser0_tx.select(PINMUX_SER0_TX_UART0_TX); + ser0_tx.default_selection(); LOG("You should see this message, as UART0 has just been re-enabled.\r\n"); LOG("Check completed.\r\n"); diff --git a/sw/cheri/common/platform-pinmux.hh b/sw/cheri/common/platform-pinmux.hh index 314e59fb6..b931877c0 100644 --- a/sw/cheri/common/platform-pinmux.hh +++ b/sw/cheri/common/platform-pinmux.hh @@ -20,6 +20,12 @@ static constexpr bool DebugDriver = false; /// Helper for conditional debug logs and assertions. using Debug = ConditionalDebug; +/// The disable bit that disables a sink +constexpr uint8_t SourceDisabled = 0; + +/// The bit that resets a sink to it's default value +constexpr uint8_t SourceDefault = 1; + /** * Each pin sink is configured by an 8-bit register. This enum maps pin sink * names to the offset of their configuration registers. The offsets are relative @@ -27,7 +33,7 @@ using Debug = ConditionalDebug; * * Documentation sources: * 1. https://lowrisc.github.io/sonata-system/doc/ip/pinmux/ - * 2. https://github.com/lowRISC/sonata-system/blob/4b72d8c07c727846c6ccb27754352388f3b2ac9a/data/pins_sonata.xdc + * 2. https://github.com/lowRISC/sonata-system/blob/v1.0/data/pins_sonata.xdc * 3. https://github.com/newaetech/sonata-pcb/blob/649b11c2fb758f798966605a07a8b6b68dd434e9/sonata-schematics-r09.pdf */ enum class PinSink : uint16_t { @@ -305,7 +311,7 @@ struct Sink { */ bool select(uint8_t source) { if (source >= sources_number(sink)) { - Debug::log("Selected source not within the range of valid sources."); + Debug::log("{} is outside the range of valid sources, [0-{}), of pin {}.", source, sources_number(sink), sink); return false; } *reg = 1 << source; @@ -313,10 +319,10 @@ struct Sink { } /// Disconnect the sink from all available sources. - void disable() { *reg = 0b01; } + void disable() { *reg = 1 << SourceDisabled; } /// Reset the sink to it's default source. - void default_selection() { *reg = 0b10; } + void default_selection() { *reg = 1 << SourceDefault; } }; namespace { @@ -333,14 +339,14 @@ inline Sink _get_sink(volatile uint8_t *base_register, const SinkEnum /** * A driver for the Sonata system's pin multiplexed output pins. * - * The Sonata's Pin Multiplexer (pinmux) has two sets of registers. The pin sink + * The Sonata system's Pin Multiplexer (pinmux) has two sets of registers: the pin sink * registers and the block sink registers. This structure provides access to the - * pin sinks registers. Pin sinks are output onto the Sonata system's pins that - * can be connected to a number block outputs (their sources). The sources a sink + * pin sinks registers. Pin sinks are output onto the Sonata system's pins, which + * can be connected to a number of block outputs (their sources). The sources each sink * can connect to are limited. See the documentation for the possible sources for * a given pin: * - * https://lowrisc.github.io/sonata-system/doc/ip/ + * https://lowrisc.github.io/sonata-system/doc/ip/pinmux/ */ struct PinSinks : private utils::NoCopyNoMove { volatile uint8_t registers[NumPinSinks]; @@ -352,14 +358,14 @@ struct PinSinks : private utils::NoCopyNoMove { /** * A driver for the Sonata system's pin multiplexed block inputs. * - * The Sonata's Pin Multiplexer (pinmux) has two sets of registers. The pin sink + * The Sonata system's Pin Multiplexer (pinmux) has two sets of registers: the pin sink * registers and the block sink registers. This structure provides access to the * block sinks registers. Block sinks are inputs into the Sonata system's devices - * that can be connected to a number system input pins (their sources). The sources - * a sink can connect to are limited. See the documentation for the possible sources + * that can be connected to a number of system input pins (their sources). The sources + * each sink can connect to are limited. See the documentation for the possible sources * for a given pin: * - * https://lowrisc.github.io/sonata-system/doc/ip/ + * https://lowrisc.github.io/sonata-system/doc/ip/pinmux */ struct BlockSinks : private utils::NoCopyNoMove { volatile uint8_t registers[NumBlockSinks]; diff --git a/sw/cheri/common/platform-pinmux.hh.tpl b/sw/cheri/common/platform-pinmux.hh.tpl index b4899e1c6..6302b3456 100644 --- a/sw/cheri/common/platform-pinmux.hh.tpl +++ b/sw/cheri/common/platform-pinmux.hh.tpl @@ -20,6 +20,12 @@ static constexpr bool DebugDriver = false; /// Helper for conditional debug logs and assertions. using Debug = ConditionalDebug; +/// The disable bit that disables a sink +constexpr uint8_t SourceDisabled = 0; + +/// The bit that resets a sink to it's default value +constexpr uint8_t SourceDefault = 1; + /** * Each pin sink is configured by an 8-bit register. This enum maps pin sink * names to the offset of their configuration registers. The offsets are relative @@ -27,7 +33,7 @@ using Debug = ConditionalDebug; * * Documentation sources: * 1. https://lowrisc.github.io/sonata-system/doc/ip/pinmux/ - * 2. https://github.com/lowRISC/sonata-system/blob/4b72d8c07c727846c6ccb27754352388f3b2ac9a/data/pins_sonata.xdc + * 2. https://github.com/lowRISC/sonata-system/blob/v1.0/data/pins_sonata.xdc * 3. https://github.com/newaetech/sonata-pcb/blob/649b11c2fb758f798966605a07a8b6b68dd434e9/sonata-schematics-r09.pdf */ enum class PinSink : uint16_t { @@ -53,7 +59,7 @@ enum class PinSink : uint16_t { */ enum class BlockSink : uint16_t { % for input_idx, (block_io, possible_pins, num_options) in enumerate(output_block_ios): - ${block_io.doc_name.replace("[","_").replace(".","_").replace("]","")} = ${f"{input_idx:#0{5}x}"}, + ${block_io.doc_name} = ${f"{input_idx:#0{5}x}"}, % endfor }; @@ -101,7 +107,7 @@ static constexpr uint8_t sources_number(BlockSink block_sink) { % endif <% prev_num_options = num_options - %> case BlockSink::${block_io.doc_name.replace("[","_").replace(".","_").replace("]","")}: + %> case BlockSink::${block_io.doc_name}: % endfor % if prev_num_options != 0: return ${prev_num_options}; @@ -132,7 +138,7 @@ struct Sink { */ bool select(uint8_t source) { if (source >= sources_number(sink)) { - Debug::log("Selected source not within the range of valid sources."); + Debug::log("{} is outside the range of valid sources, [0-{}), of pin {}.", source, sources_number(sink), sink); return false; } *reg = 1 << source; @@ -140,10 +146,10 @@ struct Sink { } /// Disconnect the sink from all available sources. - void disable() { *reg = 0b01; } + void disable() { *reg = 1 << SourceDisabled; } /// Reset the sink to it's default source. - void default_selection() { *reg = 0b10; } + void default_selection() { *reg = 1 << SourceDefault; } }; namespace { @@ -160,14 +166,14 @@ inline Sink _get_sink(volatile uint8_t *base_register, const SinkEnum /** * A driver for the Sonata system's pin multiplexed output pins. * - * The Sonata's Pin Multiplexer (pinmux) has two sets of registers. The pin sink + * The Sonata system's Pin Multiplexer (pinmux) has two sets of registers: the pin sink * registers and the block sink registers. This structure provides access to the - * pin sinks registers. Pin sinks are output onto the Sonata system's pins that - * can be connected to a number block outputs (their sources). The sources a sink + * pin sinks registers. Pin sinks are output onto the Sonata system's pins, which + * can be connected to a number of block outputs (their sources). The sources each sink * can connect to are limited. See the documentation for the possible sources for * a given pin: * - * https://lowrisc.github.io/sonata-system/doc/ip/ + * https://lowrisc.github.io/sonata-system/doc/ip/pinmux/ */ struct PinSinks : private utils::NoCopyNoMove { volatile uint8_t registers[NumPinSinks]; @@ -181,14 +187,14 @@ struct PinSinks : private utils::NoCopyNoMove { /** * A driver for the Sonata system's pin multiplexed block inputs. * - * The Sonata's Pin Multiplexer (pinmux) has two sets of registers. The pin sink + * The Sonata system's Pin Multiplexer (pinmux) has two sets of registers: the pin sink * registers and the block sink registers. This structure provides access to the * block sinks registers. Block sinks are inputs into the Sonata system's devices - * that can be connected to a number system input pins (their sources). The sources - * a sink can connect to are limited. See the documentation for the possible sources + * that can be connected to a number of system input pins (their sources). The sources + * each sink can connect to are limited. See the documentation for the possible sources * for a given pin: * - * https://lowrisc.github.io/sonata-system/doc/ip/ + * https://lowrisc.github.io/sonata-system/doc/ip/pinmux */ struct BlockSinks : private utils::NoCopyNoMove { volatile uint8_t registers[NumBlockSinks]; diff --git a/sw/cheri/tests/pinmux_tests.hh b/sw/cheri/tests/pinmux_tests.hh index d92136dcb..151d95d64 100644 --- a/sw/cheri/tests/pinmux_tests.hh +++ b/sw/cheri/tests/pinmux_tests.hh @@ -53,9 +53,6 @@ static constexpr uint32_t UartTestBytes = 100; static constexpr uint32_t GpioWaitUsec = 20; // short wire bridge between FGPA pins. static constexpr uint32_t GpioTestLength = 10; -static constexpr uint8_t PmxToDisabled = 0; -static constexpr uint8_t PmxToDefault = 1; - /** * Test pinmux by enabling and disabling the UART1 TX pin output and UART1 RX * block input. Tests the UART itself by sending and receiving some data over @@ -72,7 +69,7 @@ static int pinmux_uart_test(PinmuxPtrs sinks, ds::xoroshiro::P32R8 &prng, UartPt constexpr uint8_t PmxUartReceive1ToMb8 = 4; auto mb7 = std::get(sinks)->get(PinSink::mb7); - auto uart_1_rx = get(sinks)->get(BlockSink::uart_1_rx); + auto uart_1_rx = std::get(sinks)->get(BlockSink::uart_1_rx); int failures = 0; // Mux UART1 over mikroBus P7 RX & TX via default. diff --git a/util/top_gen/generator.py b/util/top_gen/generator.py index 967a755c1..e4853d913 100644 --- a/util/top_gen/generator.py +++ b/util/top_gen/generator.py @@ -55,10 +55,11 @@ def io_idx_str(self) -> str: @property def doc_name(self) -> str: uid = self.uid + suffix = f"_{uid.io_index}" if uid.io_index is not None else "" if self.only_instance: - return f"{uid.block}_{uid.io}{self.io_idx_str}" + return f"{uid.block}_{uid.io}{suffix}" else: - return f"{uid.block}[{uid.instance}].{uid.io}{self.io_idx_str}" + return f"{uid.block}_{uid.instance}_{uid.io}{suffix}" @dataclass(frozen=True)