From 636ebfc5e9edb9bddb96241ea2d7ea6d1a3b3466 Mon Sep 17 00:00:00 2001 From: Hugo McNally Date: Tue, 29 Oct 2024 10:53:57 +0000 Subject: [PATCH] pwm: rewired pwm to mb10 Co-authored-by: Marno van der Maas --- data/top_config.toml | 5 +- doc/ip/pinmux/README.md | 39 ++++----- rtl/fpga/top_sonata.sv | 2 +- rtl/system/pinmux.sv | 132 ++++++++++++++++++++--------- rtl/system/sonata_pkg.sv | 9 +- sw/cheri/common/platform-pinmux.hh | 39 ++++----- 6 files changed, 140 insertions(+), 86 deletions(-) diff --git a/data/top_config.toml b/data/top_config.toml index 671bd2f0e..ddd9ea8b7 100644 --- a/data/top_config.toml +++ b/data/top_config.toml @@ -414,7 +414,10 @@ block_ios = [{block = "uart", instance = 3, io = "tx"}] name = "mb8" block_ios = [{block = "uart", instance = 3, io = "rx"}] # mb9 is interrupt and already connected to a general purpose input. -# mb10 is PWM and is already connected to a PWM output. + +[[pins]] +name = "mb10" +block_ios = [{block = "pwm", instance = 0, io = "ios", io_index = 0}] ## PMODs [[pins]] diff --git a/doc/ip/pinmux/README.md b/doc/ip/pinmux/README.md index 59d2a0a0c..656b35037 100644 --- a/doc/ip/pinmux/README.md +++ b/doc/ip/pinmux/README.md @@ -76,25 +76,26 @@ The default value for all of these selectors is `'b10`. | 0x03d | `mb5` | 0, `i2c[1].sda` | | 0x03e | `mb6` | 0, `i2c[1].scl` | | 0x03f | `mb7` | 0, `uart[3].tx` | -| 0x040 | `pmod0_0` | 0, `gpio[2].ios[0]` | -| 0x041 | `pmod0_1` | 0, `gpio[2].ios[1]`, `spi[3].tx`, `uart[2].tx` | -| 0x042 | `pmod0_2` | 0, `gpio[2].ios[2]`, `i2c[0].scl` | -| 0x043 | `pmod0_3` | 0, `gpio[2].ios[3]`, `i2c[0].sda`, `spi[3].sck` | -| 0x044 | `pmod0_4` | 0, `gpio[2].ios[4]` | -| 0x045 | `pmod0_5` | 0, `gpio[2].ios[5]` | -| 0x046 | `pmod0_6` | 0, `gpio[2].ios[6]` | -| 0x047 | `pmod0_7` | 0, `gpio[2].ios[7]` | -| 0x048 | `pmod1_0` | 0, `gpio[2].ios[8]` | -| 0x049 | `pmod1_1` | 0, `gpio[2].ios[9]`, `spi[4].tx`, `uart[3].tx` | -| 0x04a | `pmod1_2` | 0, `gpio[2].ios[10]`, `i2c[1].scl` | -| 0x04b | `pmod1_3` | 0, `gpio[2].ios[11]`, `i2c[1].sda`, `spi[4].sck` | -| 0x04c | `pmod1_4` | 0, `gpio[2].ios[12]` | -| 0x04d | `pmod1_5` | 0, `gpio[2].ios[13]` | -| 0x04e | `pmod1_6` | 0, `gpio[2].ios[14]` | -| 0x04f | `pmod1_7` | 0, `gpio[2].ios[15]` | -| 0x050 | `microsd_clk` | 0, `spi[3].sck` | -| 0x051 | `microsd_cmd` | 0, `spi[3].tx` | -| 0x052 | `microsd_dat3` | 0, `spi[3].cs[3]` | +| 0x040 | `mb10` | 0, `pwm[0].ios[0]` | +| 0x041 | `pmod0_0` | 0, `gpio[2].ios[0]` | +| 0x042 | `pmod0_1` | 0, `gpio[2].ios[1]`, `spi[3].tx`, `uart[2].tx` | +| 0x043 | `pmod0_2` | 0, `gpio[2].ios[2]`, `i2c[0].scl` | +| 0x044 | `pmod0_3` | 0, `gpio[2].ios[3]`, `i2c[0].sda`, `spi[3].sck` | +| 0x045 | `pmod0_4` | 0, `gpio[2].ios[4]` | +| 0x046 | `pmod0_5` | 0, `gpio[2].ios[5]` | +| 0x047 | `pmod0_6` | 0, `gpio[2].ios[6]` | +| 0x048 | `pmod0_7` | 0, `gpio[2].ios[7]` | +| 0x049 | `pmod1_0` | 0, `gpio[2].ios[8]` | +| 0x04a | `pmod1_1` | 0, `gpio[2].ios[9]`, `spi[4].tx`, `uart[3].tx` | +| 0x04b | `pmod1_2` | 0, `gpio[2].ios[10]`, `i2c[1].scl` | +| 0x04c | `pmod1_3` | 0, `gpio[2].ios[11]`, `i2c[1].sda`, `spi[4].sck` | +| 0x04d | `pmod1_4` | 0, `gpio[2].ios[12]` | +| 0x04e | `pmod1_5` | 0, `gpio[2].ios[13]` | +| 0x04f | `pmod1_6` | 0, `gpio[2].ios[14]` | +| 0x050 | `pmod1_7` | 0, `gpio[2].ios[15]` | +| 0x051 | `microsd_clk` | 0, `spi[3].sck` | +| 0x052 | `microsd_cmd` | 0, `spi[3].tx` | +| 0x053 | `microsd_dat3` | 0, `spi[3].cs[3]` | Besides the output pin selectors, there are also selectors for which pin should drive block inputs: diff --git a/rtl/fpga/top_sonata.sv b/rtl/fpga/top_sonata.sv index fc6de9d16..d72235b7e 100644 --- a/rtl/fpga/top_sonata.sv +++ b/rtl/fpga/top_sonata.sv @@ -428,7 +428,7 @@ module top_sonata assign microsd_dat3 = output_pins[OUT_PIN_MICROSD_DAT3]; assign microsd_cmd = output_pins[OUT_PIN_MICROSD_CMD ]; assign microsd_clk = output_pins[OUT_PIN_MICROSD_CLK ]; - assign mb10 = 1'b0; + assign mb10 = output_pins[OUT_PIN_MB10 ]; assign mb7 = output_pins[OUT_PIN_MB7 ]; assign mb4 = output_pins[OUT_PIN_MB4 ]; assign mb2 = output_pins[OUT_PIN_MB2 ]; diff --git a/rtl/system/pinmux.sv b/rtl/system/pinmux.sv index 2c0a4419d..a7eb56729 100644 --- a/rtl/system/pinmux.sv +++ b/rtl/system/pinmux.sv @@ -3212,6 +3212,54 @@ module pinmux .out_o(out_to_pins_en_o[OUT_PIN_MB7]) ); + logic [1:0] mb10_sel; + logic mb10_sel_addressed; + + // Register addresses of 0x000 to 0x7ff are pin selectors, which are packed with 4 per 32-bit word. + assign mb10_sel_addressed = + reg_addr[RegAddrWidth-1] == 1'b0 & + reg_addr[RegAddrWidth-2:0] == 64 & + reg_be[0] == 1'b1; + + always @(posedge clk_i or negedge rst_ni) begin + if (!rst_ni) begin + // Select second input by default so that pins are connected to the first block that is specified in the configuration. + mb10_sel <= 2'b10; + end else begin + if (reg_we & mb10_sel_addressed) begin + mb10_sel <= reg_wdata[0+:2]; + end + end + end + + prim_onehot_mux #( + .Width(1), + .Inputs(2) + ) mb10_mux ( + .clk_i, + .rst_ni, + .in_i({ + 1'b0, // This is set to Z later when output enable is low. + pwm_ios_i[0][0] + }), + .sel_i(mb10_sel), + .out_o(out_to_pins_o[OUT_PIN_MB10]) + ); + + prim_onehot_mux #( + .Width(1), + .Inputs(2) + ) mb10_enable_mux ( + .clk_i, + .rst_ni, + .in_i({ + 1'b0, + pwm_ios_en_i[0][0] + }), + .sel_i(mb10_sel), + .out_o(out_to_pins_en_o[OUT_PIN_MB10]) + ); + logic [1:0] pmod0_0_sel; logic pmod0_0_sel_addressed; @@ -3219,7 +3267,7 @@ module pinmux assign pmod0_0_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 64 & - reg_be[0] == 1'b1; + reg_be[1] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3227,7 +3275,7 @@ module pinmux pmod0_0_sel <= 2'b10; end else begin if (reg_we & pmod0_0_sel_addressed) begin - pmod0_0_sel <= reg_wdata[0+:2]; + pmod0_0_sel <= reg_wdata[8+:2]; end end end @@ -3267,7 +3315,7 @@ module pinmux assign pmod0_1_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 64 & - reg_be[1] == 1'b1; + reg_be[2] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3275,7 +3323,7 @@ module pinmux pmod0_1_sel <= 4'b10; end else begin if (reg_we & pmod0_1_sel_addressed) begin - pmod0_1_sel <= reg_wdata[8+:4]; + pmod0_1_sel <= reg_wdata[16+:4]; end end end @@ -3319,7 +3367,7 @@ module pinmux assign pmod0_2_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 64 & - reg_be[2] == 1'b1; + reg_be[3] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3327,7 +3375,7 @@ module pinmux pmod0_2_sel <= 3'b10; end else begin if (reg_we & pmod0_2_sel_addressed) begin - pmod0_2_sel <= reg_wdata[16+:3]; + pmod0_2_sel <= reg_wdata[24+:3]; end end end @@ -3368,8 +3416,8 @@ module pinmux // Register addresses of 0x000 to 0x7ff are pin selectors, which are packed with 4 per 32-bit word. assign pmod0_3_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & - reg_addr[RegAddrWidth-2:0] == 64 & - reg_be[3] == 1'b1; + reg_addr[RegAddrWidth-2:0] == 68 & + reg_be[0] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3377,7 +3425,7 @@ module pinmux pmod0_3_sel <= 4'b10; end else begin if (reg_we & pmod0_3_sel_addressed) begin - pmod0_3_sel <= reg_wdata[24+:4]; + pmod0_3_sel <= reg_wdata[0+:4]; end end end @@ -3421,7 +3469,7 @@ module pinmux assign pmod0_4_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 68 & - reg_be[0] == 1'b1; + reg_be[1] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3429,7 +3477,7 @@ module pinmux pmod0_4_sel <= 2'b10; end else begin if (reg_we & pmod0_4_sel_addressed) begin - pmod0_4_sel <= reg_wdata[0+:2]; + pmod0_4_sel <= reg_wdata[8+:2]; end end end @@ -3469,7 +3517,7 @@ module pinmux assign pmod0_5_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 68 & - reg_be[1] == 1'b1; + reg_be[2] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3477,7 +3525,7 @@ module pinmux pmod0_5_sel <= 2'b10; end else begin if (reg_we & pmod0_5_sel_addressed) begin - pmod0_5_sel <= reg_wdata[8+:2]; + pmod0_5_sel <= reg_wdata[16+:2]; end end end @@ -3517,7 +3565,7 @@ module pinmux assign pmod0_6_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 68 & - reg_be[2] == 1'b1; + reg_be[3] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3525,7 +3573,7 @@ module pinmux pmod0_6_sel <= 2'b10; end else begin if (reg_we & pmod0_6_sel_addressed) begin - pmod0_6_sel <= reg_wdata[16+:2]; + pmod0_6_sel <= reg_wdata[24+:2]; end end end @@ -3564,8 +3612,8 @@ module pinmux // Register addresses of 0x000 to 0x7ff are pin selectors, which are packed with 4 per 32-bit word. assign pmod0_7_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & - reg_addr[RegAddrWidth-2:0] == 68 & - reg_be[3] == 1'b1; + reg_addr[RegAddrWidth-2:0] == 72 & + reg_be[0] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3573,7 +3621,7 @@ module pinmux pmod0_7_sel <= 2'b10; end else begin if (reg_we & pmod0_7_sel_addressed) begin - pmod0_7_sel <= reg_wdata[24+:2]; + pmod0_7_sel <= reg_wdata[0+:2]; end end end @@ -3613,7 +3661,7 @@ module pinmux assign pmod1_0_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 72 & - reg_be[0] == 1'b1; + reg_be[1] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3621,7 +3669,7 @@ module pinmux pmod1_0_sel <= 2'b10; end else begin if (reg_we & pmod1_0_sel_addressed) begin - pmod1_0_sel <= reg_wdata[0+:2]; + pmod1_0_sel <= reg_wdata[8+:2]; end end end @@ -3661,7 +3709,7 @@ module pinmux assign pmod1_1_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 72 & - reg_be[1] == 1'b1; + reg_be[2] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3669,7 +3717,7 @@ module pinmux pmod1_1_sel <= 4'b10; end else begin if (reg_we & pmod1_1_sel_addressed) begin - pmod1_1_sel <= reg_wdata[8+:4]; + pmod1_1_sel <= reg_wdata[16+:4]; end end end @@ -3713,7 +3761,7 @@ module pinmux assign pmod1_2_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 72 & - reg_be[2] == 1'b1; + reg_be[3] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3721,7 +3769,7 @@ module pinmux pmod1_2_sel <= 3'b10; end else begin if (reg_we & pmod1_2_sel_addressed) begin - pmod1_2_sel <= reg_wdata[16+:3]; + pmod1_2_sel <= reg_wdata[24+:3]; end end end @@ -3762,8 +3810,8 @@ module pinmux // Register addresses of 0x000 to 0x7ff are pin selectors, which are packed with 4 per 32-bit word. assign pmod1_3_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & - reg_addr[RegAddrWidth-2:0] == 72 & - reg_be[3] == 1'b1; + reg_addr[RegAddrWidth-2:0] == 76 & + reg_be[0] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3771,7 +3819,7 @@ module pinmux pmod1_3_sel <= 4'b10; end else begin if (reg_we & pmod1_3_sel_addressed) begin - pmod1_3_sel <= reg_wdata[24+:4]; + pmod1_3_sel <= reg_wdata[0+:4]; end end end @@ -3815,7 +3863,7 @@ module pinmux assign pmod1_4_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 76 & - reg_be[0] == 1'b1; + reg_be[1] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3823,7 +3871,7 @@ module pinmux pmod1_4_sel <= 2'b10; end else begin if (reg_we & pmod1_4_sel_addressed) begin - pmod1_4_sel <= reg_wdata[0+:2]; + pmod1_4_sel <= reg_wdata[8+:2]; end end end @@ -3863,7 +3911,7 @@ module pinmux assign pmod1_5_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 76 & - reg_be[1] == 1'b1; + reg_be[2] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3871,7 +3919,7 @@ module pinmux pmod1_5_sel <= 2'b10; end else begin if (reg_we & pmod1_5_sel_addressed) begin - pmod1_5_sel <= reg_wdata[8+:2]; + pmod1_5_sel <= reg_wdata[16+:2]; end end end @@ -3911,7 +3959,7 @@ module pinmux assign pmod1_6_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 76 & - reg_be[2] == 1'b1; + reg_be[3] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3919,7 +3967,7 @@ module pinmux pmod1_6_sel <= 2'b10; end else begin if (reg_we & pmod1_6_sel_addressed) begin - pmod1_6_sel <= reg_wdata[16+:2]; + pmod1_6_sel <= reg_wdata[24+:2]; end end end @@ -3958,8 +4006,8 @@ module pinmux // Register addresses of 0x000 to 0x7ff are pin selectors, which are packed with 4 per 32-bit word. assign pmod1_7_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & - reg_addr[RegAddrWidth-2:0] == 76 & - reg_be[3] == 1'b1; + reg_addr[RegAddrWidth-2:0] == 80 & + reg_be[0] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -3967,7 +4015,7 @@ module pinmux pmod1_7_sel <= 2'b10; end else begin if (reg_we & pmod1_7_sel_addressed) begin - pmod1_7_sel <= reg_wdata[24+:2]; + pmod1_7_sel <= reg_wdata[0+:2]; end end end @@ -4007,7 +4055,7 @@ module pinmux assign microsd_clk_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 80 & - reg_be[0] == 1'b1; + reg_be[1] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -4015,7 +4063,7 @@ module pinmux microsd_clk_sel <= 2'b10; end else begin if (reg_we & microsd_clk_sel_addressed) begin - microsd_clk_sel <= reg_wdata[0+:2]; + microsd_clk_sel <= reg_wdata[8+:2]; end end end @@ -4055,7 +4103,7 @@ module pinmux assign microsd_cmd_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 80 & - reg_be[1] == 1'b1; + reg_be[2] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -4063,7 +4111,7 @@ module pinmux microsd_cmd_sel <= 2'b10; end else begin if (reg_we & microsd_cmd_sel_addressed) begin - microsd_cmd_sel <= reg_wdata[8+:2]; + microsd_cmd_sel <= reg_wdata[16+:2]; end end end @@ -4103,7 +4151,7 @@ module pinmux assign microsd_dat3_sel_addressed = reg_addr[RegAddrWidth-1] == 1'b0 & reg_addr[RegAddrWidth-2:0] == 80 & - reg_be[2] == 1'b1; + reg_be[3] == 1'b1; always @(posedge clk_i or negedge rst_ni) begin if (!rst_ni) begin @@ -4111,7 +4159,7 @@ module pinmux microsd_dat3_sel <= 2'b10; end else begin if (reg_we & microsd_dat3_sel_addressed) begin - microsd_dat3_sel <= reg_wdata[16+:2]; + microsd_dat3_sel <= reg_wdata[24+:2]; end end end diff --git a/rtl/system/sonata_pkg.sv b/rtl/system/sonata_pkg.sv index d436daf03..c48b461c5 100644 --- a/rtl/system/sonata_pkg.sv +++ b/rtl/system/sonata_pkg.sv @@ -20,7 +20,7 @@ package sonata_pkg; // Number of input, output, and inout pins localparam int unsigned IN_PIN_NUM = 8; - localparam int unsigned OUT_PIN_NUM = 19; + localparam int unsigned OUT_PIN_NUM = 20; localparam int unsigned INOUT_PIN_NUM = 64; localparam int unsigned IN_PIN_SER0_RX = 0; @@ -48,9 +48,10 @@ package sonata_pkg; localparam int unsigned OUT_PIN_MB2 = 13; localparam int unsigned OUT_PIN_MB4 = 14; localparam int unsigned OUT_PIN_MB7 = 15; - localparam int unsigned OUT_PIN_MICROSD_CLK = 16; - localparam int unsigned OUT_PIN_MICROSD_CMD = 17; - localparam int unsigned OUT_PIN_MICROSD_DAT3 = 18; + localparam int unsigned OUT_PIN_MB10 = 16; + localparam int unsigned OUT_PIN_MICROSD_CLK = 17; + localparam int unsigned OUT_PIN_MICROSD_CMD = 18; + localparam int unsigned OUT_PIN_MICROSD_DAT3 = 19; localparam int unsigned INOUT_PIN_SCL0 = 0; localparam int unsigned INOUT_PIN_SDA0 = 1; diff --git a/sw/cheri/common/platform-pinmux.hh b/sw/cheri/common/platform-pinmux.hh index 9935756e6..b86dd1e53 100644 --- a/sw/cheri/common/platform-pinmux.hh +++ b/sw/cheri/common/platform-pinmux.hh @@ -115,25 +115,26 @@ class SonataPinmux : private utils::NoCopyNoMove { mb5 = 0x03d, mb6 = 0x03e, mb7 = 0x03f, - pmod0_0 = 0x040, - pmod0_1 = 0x041, - pmod0_2 = 0x042, - pmod0_3 = 0x043, - pmod0_4 = 0x044, - pmod0_5 = 0x045, - pmod0_6 = 0x046, - pmod0_7 = 0x047, - pmod1_0 = 0x048, - pmod1_1 = 0x049, - pmod1_2 = 0x04a, - pmod1_3 = 0x04b, - pmod1_4 = 0x04c, - pmod1_5 = 0x04d, - pmod1_6 = 0x04e, - pmod1_7 = 0x04f, - microsd_clk = 0x050, - microsd_cmd = 0x051, - microsd_dat3 = 0x052, + mb10 = 0x040, + pmod0_0 = 0x041, + pmod0_1 = 0x042, + pmod0_2 = 0x043, + pmod0_3 = 0x044, + pmod0_4 = 0x045, + pmod0_5 = 0x046, + pmod0_6 = 0x047, + pmod0_7 = 0x048, + pmod1_0 = 0x049, + pmod1_1 = 0x04a, + pmod1_2 = 0x04b, + pmod1_3 = 0x04c, + pmod1_4 = 0x04d, + pmod1_5 = 0x04e, + pmod1_6 = 0x04f, + pmod1_7 = 0x050, + microsd_clk = 0x051, + microsd_cmd = 0x052, + microsd_dat3 = 0x053, }; /**