From 9e964c9ff297f4c6eca78a5bb67fccc56384e100 Mon Sep 17 00:00:00 2001 From: Mitchell Levy Date: Wed, 17 Jul 2024 15:50:06 -0700 Subject: [PATCH 1/3] Update build dependencies Fixes https://github.com/microsoft/WSL/issues/11738 Signed-off-by: Mitchell Levy --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 01eb10a40e843..059ea7b17c5ca 100644 --- a/README.md +++ b/README.md @@ -28,7 +28,7 @@ Instructions for building an x86_64 WSL2 kernel with an Ubuntu distribution are as follows: 1. Install the build dependencies: - `$ sudo apt install build-essential flex bison dwarves libssl-dev libelf-dev` + `$ sudo apt install build-essential flex bison dwarves libssl-dev libelf-dev cpio` 2. Modify WSL2 kernel configs (optional): `$ make menuconfig KCONFIG_CONFIG=Microsoft/config-wsl` From ea0740024a0f0c7c6b8844492e3fa9eeb1289a83 Mon Sep 17 00:00:00 2001 From: Mitchell Levy Date: Mon, 12 Aug 2024 13:44:12 -0700 Subject: [PATCH 2/3] x86/fpu: Avoid writing LBR bit to IA32_XSS unless supported There are two distinct CPU features related to the use of XSAVES and LBR: whether LBR is itself supported and whether XSAVES supports LBR. The LBR subsystem correctly checks both in intel_pmu_arch_lbr_init(), but the XSTATE subsystem does not. The LBR bit is only removed from xfeatures_mask_independent when LBR is not supported by the CPU, but there is no validation of XSTATE support. If XSAVES does not support LBR the write to IA32_XSS causes a #GP fault, leaving the state of IA32_XSS unchanged, i.e. zero. The fault is handled with a warning and the boot continues. Consequently the next XRSTORS which tries to restore supervisor state fails with #GP because the RFBM has zero for all supervisor features, which does not match the XCOMP_BV field. As XFEATURE_MASK_FPSTATE includes supervisor features setting up the FPU causes a #GP, which ends up in fpu_reset_from_exception_fixup(). That fails due to the same problem resulting in recursive #GPs until the kernel runs out of stack space and double faults. Prevent this by storing the supported independent features in fpu_kernel_cfg during XSTATE initialization and use that cached value for retrieving the independent feature bits to be written into IA32_XSS. [ tglx: Massaged change log ] Fixes: f0dccc9da4c0 ("x86/fpu/xstate: Support dynamic supervisor feature for LBR") Suggested-by: Thomas Gleixner Signed-off-by: Mitchell Levy Signed-off-by: Thomas Gleixner Cc: stable@vger.kernel.org Link: https://lore.kernel.org/all/20240812-xsave-lbr-fix-v3-1-95bac1bf62f4@gmail.com --- arch/x86/include/asm/fpu/types.h | 7 +++++++ arch/x86/kernel/fpu/xstate.c | 3 +++ arch/x86/kernel/fpu/xstate.h | 4 ++-- 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/fpu/types.h b/arch/x86/include/asm/fpu/types.h index eb810074f1e74..fd5fb43d920b4 100644 --- a/arch/x86/include/asm/fpu/types.h +++ b/arch/x86/include/asm/fpu/types.h @@ -589,6 +589,13 @@ struct fpu_state_config { * even without XSAVE support, i.e. legacy features FP + SSE */ u64 legacy_features; + /* + * @independent_features: + * + * Features that are supported by XSAVES, but not managed as part of + * the FPU core, such as LBR + */ + u64 independent_features; }; /* FPU state configuration information */ diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c index ef6906107c541..bb9117f1a93b2 100644 --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -787,6 +787,9 @@ void __init fpu__init_system_xstate(unsigned int legacy_size) goto out_disable; } + fpu_kernel_cfg.independent_features = fpu_kernel_cfg.max_features & + XFEATURE_MASK_INDEPENDENT; + /* * Clear XSAVE features that are disabled in the normal CPUID. */ diff --git a/arch/x86/kernel/fpu/xstate.h b/arch/x86/kernel/fpu/xstate.h index 3518fb26d06b0..d782320da9720 100644 --- a/arch/x86/kernel/fpu/xstate.h +++ b/arch/x86/kernel/fpu/xstate.h @@ -64,9 +64,9 @@ static inline u64 xfeatures_mask_supervisor(void) static inline u64 xfeatures_mask_independent(void) { if (!cpu_feature_enabled(X86_FEATURE_ARCH_LBR)) - return XFEATURE_MASK_INDEPENDENT & ~XFEATURE_MASK_LBR; + return fpu_kernel_cfg.independent_features & ~XFEATURE_MASK_LBR; - return XFEATURE_MASK_INDEPENDENT; + return fpu_kernel_cfg.independent_features; } /* XSAVE/XRSTOR wrapper functions */ From 6cb123f853df10871fb99f05ab4b66860dbba866 Mon Sep 17 00:00:00 2001 From: Mitchell Levy Date: Wed, 14 Aug 2024 11:47:24 -0700 Subject: [PATCH 3/3] Linux rolling-lts/wsl/6.6.36.6 Signed-off-by: Mitchell Levy --- MSFT-Merge/log | 11 +++++++++++ Makefile | 2 +- 2 files changed, 12 insertions(+), 1 deletion(-) create mode 100644 MSFT-Merge/log diff --git a/MSFT-Merge/log b/MSFT-Merge/log new file mode 100644 index 0000000000000..0ebc7977c9983 --- /dev/null +++ b/MSFT-Merge/log @@ -0,0 +1,11 @@ +Name SHA1 +---- ---- +config/wsl-6.6 6bb42a690a802743d04a92968efe82c668454644 +feature/arm64-hyperv-hypercall-interface/6.6 8db985fdc14b63b0520d4286eaf57b04b25e00a4 +feature/arm64-hyperv-synthetic-clocks-timers/6.6 b63263237d73f1e1d76e2c2049e31b607ef78bec +feature/dxgkrnl/6.6 423e5044c57566f8267bbb20cf7cf57d1aefb040 +feature/hvlite_virtio_pmem/6.6 7d955beb0207d880fa1862b1ace8487057b5aa6c +fix/hv_utils_clock/6.6 a34090e9209d3d3db3d97aa567bb323ebc7620a4 +fix/xsaves-lbr/v6.6 ea0740024a0f0c7c6b8844492e3fa9eeb1289a83 +product/wsl/readme/6.6 9e964c9ff297f4c6eca78a5bb67fccc56384e100 +product/wsl/security/6.6 c9cb753bbd093f0599408e24292aba20eed103f2 diff --git a/Makefile b/Makefile index b7d5f2f0def0d..7c882123ad7b8 100644 --- a/Makefile +++ b/Makefile @@ -2,7 +2,7 @@ VERSION = 6 PATCHLEVEL = 6 SUBLEVEL = 36 -EXTRAVERSION = +EXTRAVERSION = .6 NAME = Hurr durr I'ma ninja sloth # *DOCUMENTATION*