Repositories list

• Vitis_workflow

  Public
  Vitis 部署加速器工作流介绍

  C++

  •3•9•0•0•Updated Jan 10, 2025Jan 10, 2025

• DataflowAnalysisBasedOnSpatialTimeTransfomation

  Public archive
  C++

  •0•0•0•0•Updated Jul 5, 2024Jul 5, 2024

• fpga24_routing_contest

  Public
  Runtime-First FPGA Interchange Routing Contest @ FPGA’24

  Python

  •

  Other

  •10•0•0•0•Updated Mar 23, 2024Mar 23, 2024

• RapidWright

  Public
  Build Customized FPGA Implementations for Vivado

  Java

  •

  Other

  •113•0•0•0•Updated Mar 23, 2024Mar 23, 2024

• Xilinx-INT8-Multiplication-Optimization

  Public
  C++

  •0•4•0•0•Updated Mar 26, 2023Mar 26, 2023

• HLS-Open-CV-Demo

  Public
  C

  •2•6•0•0•Updated Feb 6, 2023Feb 6, 2023

• Xilinx-FPGA-PCIe-XDMA-Tutorial

  Public
  Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核

  fpgaxilinxmpeg2+ 5pciexdmampeg2-encoderpcie-xdmadma-subsystem-for-pcie

  Batchfile

  •3•21•0•0•Updated Dec 17, 2022Dec 17, 2022

• Hardware-friendly-PACT-Quantization

  Public
  Python

  •0•4•0•0•Updated Nov 11, 2022Nov 11, 2022

• Compress-C3D-With-Block-Circulant-Matrix

  Public
  Python

  •0•1•0•0•Updated Nov 4, 2022Nov 4, 2022

• flex_BRAM_FPGA

  Public
  Verilog module for flexible instantiation of ROM/RAM of arbitrary depth and bit width. Automatically reduce BRAM usage through depth division, bit width division, and bit width folding.

  SystemVerilog

  •3•6•0•0•Updated Sep 13, 2022Sep 13, 2022

• Automata-Compiler

  Public
  C++

  •0•6•0•0•Updated Aug 24, 2022Aug 24, 2022

• HLStoFPGA

  Public
  C

  •1•12•0•0•Updated Jul 20, 2022Jul 20, 2022

• QuSimPy

  Public
  A Multi-Qubit Ideal Quantum Computer Simulator

  Python

  •

  GNU Affero General Public License v3.0

  •66•0•0•0•Updated Jun 4, 2021Jun 4, 2021