Intel-Xeon-DL-Training-Usecases.md

Intel Xeon CPU performance use cases where training requires large memory.

With distributed training on cluster of Xeons, one can utilize larger memory to

• (i) train with larger batch size,
• (ii) train on full-image without tiling which can speed up time-to-train and improve accuracy.

Following are some of the articles:

1. Fast and Accurate Training of an AI Radiologist
2. Training Speech Recognition Models on HPC Infrastructure
3. Large Minibatch Training on Supercomputers with Improved Accuracy and Reduced Time to Train
4. Distributed Training of Generative Adversarial Networks for Fast Detector Simulation
5. Densifying Assumed-Sparse Tensors
6. Using deep neural network acceleration image analysis drug discovery
7. Efficient neural network training on Intel Xeon-based supercomputers
8. Adverse Effects of Image Tiling on Convolutional Neural Networks
9. Adverse Effects Of Image Tiling For Automatic Deep Learning Glioma Segmentation In MRI
10. Systematic Evaluation of Image Tiling Adverse Effects on Deep Learning Semantic Segmentation
11. How DeepVariant Uses Intel’s AVX-512 Optimizations
12. Federated learning in medicine:facilitating multi‑institutional collaborations without sharing patient data
13. Application of a Tiled Fully Convolutional Network to Whole Image Predictions Leads to Lower Latency Inference
14. Addressing the Memory Bottleneck in AI Model-Training for Healthcare
15. Slidecast: Dell EMC Using Neural Networks to “Read Minds”
16. Paving a New Path to AI-Driven Neuroscience

Some more training use-cases: See Intel AI Builders Results

How-to-articles:

1. Best Practices for Scaling Deep Learning Training and Inference with TensorFlow* On Intel® Xeon® Processor-Based HPC Infrastructures