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structured wire types #16

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albertchen-sifive opened this issue Mar 18, 2020 · 1 comment

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albertchen-sifive commented Mar 18, 2020

the current schema https://github.com/sifive/duh-schema/blob/master/lib/component.js#L8-L35 only allows flat wires. It would be great if there was a way to describe struct or array wires. A schema for this would also require a schema for indexing into wires in expressions.

This would enable representing verilog structs and arrays.

albertchen-sifive assigned drom

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drom commented Mar 19, 2020

We allow busInterface.portMaps to be an object or array
https://github.com/sifive/block-ark#group-remaining-ports-into-bundles
Will that be sufficient?

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component, busInterface, portMap, port concatenation sifive/duh#74

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