diff --git a/examples/adc-continious-dma.rs b/examples/adc-continious-dma.rs index 78313778..15ab0ae5 100644 --- a/examples/adc-continious-dma.rs +++ b/examples/adc-continious-dma.rs @@ -62,7 +62,7 @@ fn main() -> ! { info!("Setup DMA"); let first_buffer = cortex_m::singleton!(: [u16; 15] = [0; 15]).unwrap(); - let mut transfer = channels.0.into_circ_peripheral_to_memory_transfer( + let mut transfer = channels.ch1.into_circ_peripheral_to_memory_transfer( adc.enable_dma(AdcDma::Continuous), &mut first_buffer[..], config, diff --git a/examples/adc-one-shot-dma.rs b/examples/adc-one-shot-dma.rs index b2ff3374..b8370d25 100644 --- a/examples/adc-one-shot-dma.rs +++ b/examples/adc-one-shot-dma.rs @@ -61,7 +61,7 @@ fn main() -> ! { info!("Setup DMA"); let first_buffer = cortex_m::singleton!(: [u16; 2] = [0; 2]).unwrap(); - let mut transfer = channels.0.into_peripheral_to_memory_transfer( + let mut transfer = channels.ch1.into_peripheral_to_memory_transfer( adc.enable_dma(AdcDma::Single), &mut first_buffer[..], config, @@ -74,10 +74,10 @@ fn main() -> ! { info!("Conversion Done"); transfer.pause(|adc| adc.cancel_conversion()); - let (s0, adc, first_buffer) = transfer.free(); + let (ch1, adc, first_buffer) = transfer.free(); let adc = adc.disable(); - channels.0 = s0; + channels.ch1 = ch1; let millivolts = adc.sample_to_millivolts(first_buffer[0]); info!("pa3: {}mV", millivolts); diff --git a/examples/spi-dma.rs b/examples/spi-dma.rs index f1624c2c..01cb8e0f 100644 --- a/examples/spi-dma.rs +++ b/examples/spi-dma.rs @@ -62,7 +62,7 @@ fn main() -> ! { *item = index as u8; } let dma_buf = cortex_m::singleton!(: [u8; BUFFER_SIZE] = buf).unwrap(); - let mut transfer_dma = channels.0.into_memory_to_peripheral_transfer( + let mut transfer_dma = channels.ch1.into_memory_to_peripheral_transfer( spi.enable_tx_dma(), &mut dma_buf[..], config, diff --git a/examples/uart-dma-rx.rs b/examples/uart-dma-rx.rs index 84ad40e3..4b26d3fc 100644 --- a/examples/uart-dma-rx.rs +++ b/examples/uart-dma-rx.rs @@ -65,7 +65,7 @@ fn main() -> ! { let (_tx, rx) = usart.split(); - let mut transfer = channels.0.into_circ_peripheral_to_memory_transfer( + let mut transfer = channels.ch1.into_circ_peripheral_to_memory_transfer( rx.enable_dma(), &mut rx_buffer[..], config, diff --git a/examples/uart-dma-tx.rs b/examples/uart-dma-tx.rs index 8a1a7fed..ad17d497 100644 --- a/examples/uart-dma-tx.rs +++ b/examples/uart-dma-tx.rs @@ -64,10 +64,11 @@ fn main() -> ! { let (tx, _rx) = usart.split(); // Setup DMA for USART2 TX with dma channel 1. - let mut transfer = - channels - .0 - .into_memory_to_peripheral_transfer(tx.enable_dma(), &mut tx_buffer[..], config); + let mut transfer = channels.ch1.into_memory_to_peripheral_transfer( + tx.enable_dma(), + &mut tx_buffer[..], + config, + ); transfer.start(|_tx| {}); loop { diff --git a/src/dma/channel.rs b/src/dma/channel.rs index ee7be694..58f30814 100644 --- a/src/dma/channel.rs +++ b/src/dma/channel.rs @@ -71,23 +71,25 @@ pub struct DmaInterrupts { } /// Alias for a tuple with all DMA channels. -pub struct ChannelsTuple( - pub Channel1, - pub Channel2, - pub Channel3, - pub Channel4, - pub Channel5, - pub Channel6, - #[cfg(not(any(feature = "stm32g431", feature = "stm32g441",)))] pub Channel7, - #[cfg(not(any(feature = "stm32g431", feature = "stm32g441",)))] pub Channel8, -); +pub struct Channels { + pub ch1: Channel1, + pub ch2: Channel2, + pub ch3: Channel3, + pub ch4: Channel4, + pub ch5: Channel5, + pub ch6: Channel6, + #[cfg(not(any(feature = "stm32g431", feature = "stm32g441",)))] + pub ch7: Channel7, + #[cfg(not(any(feature = "stm32g431", feature = "stm32g441",)))] + pub ch8: Channel8, +} pub trait DMAExt { - fn split(self, rcc: &Rcc) -> ChannelsTuple; + fn split(self, rcc: &Rcc) -> Channels; } impl DMAExt for DMA1 { - fn split(self, rcc: &Rcc) -> ChannelsTuple { + fn split(self, rcc: &Rcc) -> Channels { // Enable DMAMux is not yet enabled if !rcc.rb.ahb1enr().read().dmamuxen().bit_is_set() { // Enable peripheral @@ -97,12 +99,12 @@ impl DMAExt for DMA1 { // Enable peripheral rcc.rb.ahb1enr().modify(|_, w| w.dma1en().set_bit()); - ChannelsTuple::new(self) + Channels::new(self) } } impl DMAExt for DMA2 { - fn split(self, rcc: &Rcc) -> ChannelsTuple { + fn split(self, rcc: &Rcc) -> Channels { // Enable DMAMux is not yet enabled if !rcc.rb.ahb1enr().read().dmamuxen().bit_is_set() { // Enable peripheral @@ -112,25 +114,25 @@ impl DMAExt for DMA2 { // Enable peripheral rcc.rb.ahb1enr().modify(|_, w| w.dma2en().set_bit()); - ChannelsTuple::new(self) + Channels::new(self) } } -impl ChannelsTuple { +impl Channels { /// Splits the DMA peripheral into channels. pub(crate) fn new(_regs: I) -> Self { - Self( - Channel1 { _dma: PhantomData }, - Channel2 { _dma: PhantomData }, - Channel3 { _dma: PhantomData }, - Channel4 { _dma: PhantomData }, - Channel5 { _dma: PhantomData }, - Channel6 { _dma: PhantomData }, + Self { + ch1: Channel1 { _dma: PhantomData }, + ch2: Channel2 { _dma: PhantomData }, + ch3: Channel3 { _dma: PhantomData }, + ch4: Channel4 { _dma: PhantomData }, + ch5: Channel5 { _dma: PhantomData }, + ch6: Channel6 { _dma: PhantomData }, #[cfg(not(any(feature = "stm32g431", feature = "stm32g441",)))] - Channel7 { _dma: PhantomData }, + ch7: Channel7 { _dma: PhantomData }, #[cfg(not(any(feature = "stm32g431", feature = "stm32g441",)))] - Channel8 { _dma: PhantomData }, - ) + ch8: Channel8 { _dma: PhantomData }, + } } }