From 1477cfc2b44aff77b8b859739820c2f30b0eecb3 Mon Sep 17 00:00:00 2001
From: Sean Link <sean.link@netally.com>
Date: Mon, 27 Mar 2023 15:59:10 -0600
Subject: [PATCH 1/2] Added missing pins for spi for the stm32l496

---
 src/spi.rs | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/spi.rs b/src/spi.rs
index dea33abe..fea85d7e 100644
--- a/src/spi.rs
+++ b/src/spi.rs
@@ -377,6 +377,12 @@ pins!(SPI2, 5,
     MISO: [PB14, PC2, PD3],
     MOSI: [PB15, PC3, PD4]);
 
+#[cfg(any(feature = "stm32l496",))]
+pins!(SPI2, 3,
+    SCK: [PD3],
+    MISO: [],
+    MOSI: [PC1]);
+
 pub struct SpiPayload<SPI, PINS> {
     spi: Spi<SPI, PINS>,
 }

From 0cad75f7af5fcfc2261f4f226d5df9fb67970563 Mon Sep 17 00:00:00 2001
From: Sean Link <sean.link@netally.com>
Date: Tue, 28 Mar 2023 13:07:33 -0600
Subject: [PATCH 2/2] Added missing spi pin.

---
 src/spi.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/spi.rs b/src/spi.rs
index fea85d7e..90a09d3a 100644
--- a/src/spi.rs
+++ b/src/spi.rs
@@ -379,7 +379,7 @@ pins!(SPI2, 5,
 
 #[cfg(any(feature = "stm32l496",))]
 pins!(SPI2, 3,
-    SCK: [PD3],
+    SCK: [PA9, PD3],
     MISO: [],
     MOSI: [PC1]);