feat: `DYN` and `DYNCALL` takes a memory address instead of digest on stack #1535

plafer · 2024-10-15T21:19:59Z

Closes #1091
Closes #1478

bobbinth · 2024-10-15T21:29:38Z

This change breaks how dyncall works (i.e. dyncall compiles to call(dyn)), since after the call, the memory is wiped since we entered a new context, and hence placing the procedure hash in memory before the call doesn't work.

We might need to do #1478 before we can merge this.

Ah yes - good point! I didn't think of this. Indeed, we may need to do #1478 first.

bobbinth

Looks great! Thank you! I left some comments inline - but nothing major.

The complexity in the stack resulting from having to do a left shift and a context switch at the same time is a bit unfortunate - but I'm not seeing a better way to do it. We should probably create an issue to come back to this later and try to make the constraints a bit more uniform.

core/src/operations/mod.rs

processor/src/operations/io_ops.rs

processor/src/decoder/block_stack.rs

bobbinth · 2024-10-19T23:54:48Z

air/src/trace/main_trace.rs

    pub fn decoder_hasher_state_element(&self, element: usize, i: RowIndex) -> Felt {
-        self.columns.get_column(DECODER_TRACE_OFFSET + HASHER_STATE_OFFSET + element)[i + 1]
+        self.columns.get_column(DECODER_TRACE_OFFSET + HASHER_STATE_OFFSET + element)[i]
    }


Was this a bug previously?

Yes, but for some reason it never manifested itself. I think only RESPAN used it, so maybe looking in the next row there was always what we expected? I'm really not sure why it went unnoticed for this long.

air/src/constraints/stack/overflow/mod.rs

processor/src/decoder/mod.rs

processor/src/lib.rs

processor/src/chiplets/aux_trace/mod.rs

processor/src/stack/mod.rs

bobbinth

Looks good! Thank you! I've reviewed pretty much everything except for test code (I'll review it tomorrow).

Once docs are updated we can merge. Or we can merge sooner and update docs in another PR.

plafer · 2024-10-22T15:44:21Z

@bobbinth docs are ready for review

bobbinth

Looks good! Thank you! For tests, I did a relatively superficial review - so, would appreciate another set of eyes on them (cc @Al-Kindi-0).

One other thing: I'm not sure we should commit the excalidraw files here. It is not possible to easily verify what's in these files and they blow up the line count. Maybe an alternative could be to create a shared excalidraw workspace so that we have access to all these diagrams? cc @Dominik1999.

docs/src/design/decoder/main.md

docs/src/user_docs/assembly/code_organization.md

docs/src/user_docs/assembly/execution_contexts.md

processor/src/decoder/tests.rs

Al-Kindi-0

Looks great, thank you!
A few questions and remarks inline mainly.

air/src/constraints/stack/mod.rs

core/src/mast/mod.rs

docs/src/design/decoder/constraints.md

docs/src/user_docs/assembly/execution_contexts.md

docs/src/design/decoder/main.md

processor/src/decoder/aux_trace/block_stack_table.rs

processor/src/decoder/mod.rs

Al-Kindi-0 · 2024-10-23T18:36:47Z

docs/src/design/decoder/constraints.md

+&+ \alpha_5 \cdot fmp + \alpha_6 \cdot b_0 + \alpha_7 \cdot b_1 + <[\alpha_8, \alpha_{11}], fn\_hash[0..3]>) \text{ | degree} = 6
+\end{align*}


fn_hash is not rendering well, I think this is what I tried to refer to earlier

I changed them all to \mathrm{fnhash}, which should render not run into any rendering issues

It is now rendering well on GitHub

bobbinth

Looks good! Thank you!

I'll merge this PR tomorrow (after miden-base has been migrated to the current next).

bobbinth · 2024-10-29T05:07:13Z

I'll merge this PR tomorrow (after miden-base has been migrated to the current next).

Let's hold off on merging this until we have a corresponding PR in miden-base (otherwise it'll break miden-base). @Fumuran will start working on this in the next day or so.

plafer force-pushed the plafer-1091-dyn-op-rework branch 3 times, most recently from b83bb5c to 26f33fa Compare October 18, 2024 19:37

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plafer force-pushed the plafer-1091-dyn-op-rework branch from 26f33fa to 328ac68 Compare October 18, 2024 19:38

bobbinth reviewed Oct 20, 2024

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plafer mentioned this pull request Oct 21, 2024

Refactor decoder handling of control blocks #1538

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plafer force-pushed the plafer-1091-dyn-op-rework branch from 328ac68 to 8ed6d47 Compare October 21, 2024 14:57

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plafer force-pushed the plafer-1091-dyn-op-rework branch from 8ed6d47 to b937816 Compare October 22, 2024 15:42

plafer marked this pull request as ready for review October 22, 2024 15:43

bobbinth approved these changes Oct 23, 2024

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plafer changed the title ~~feat: DYN takes a memory address instead of digest on stack~~ feat: DYN and DYNCALL takes a memory address instead of digest on stack Oct 23, 2024

plafer force-pushed the plafer-1091-dyn-op-rework branch from b937816 to 38341dc Compare October 23, 2024 12:02

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plafer force-pushed the plafer-1091-dyn-op-rework branch from 38341dc to 898d4ef Compare October 23, 2024 12:50

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plafer force-pushed the plafer-1091-dyn-op-rework branch from 898d4ef to 61b3a1b Compare October 23, 2024 18:14

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plafer force-pushed the plafer-1091-dyn-op-rework branch from 61b3a1b to facb5ce Compare October 23, 2024 18:15

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plafer force-pushed the plafer-1091-dyn-op-rework branch from facb5ce to 28dcf86 Compare October 23, 2024 19:33

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Fumuran mentioned this pull request Oct 30, 2024

Update usage of dyncall and dynexec 0xPolygonMiden/miden-base#942

Merged

feat: DYN takes a memory address instead of digest on stack

6bbee60

plafer added 2 commits October 30, 2024 14:23

feat: add dyncall operation

550668c

docs: update docs for dyn and dyncall

7f469c4

plafer force-pushed the plafer-1091-dyn-op-rework branch from 3ed930e to 7f469c4 Compare October 30, 2024 18:23

plafer merged commit 2b96b85 into next Nov 1, 2024
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plafer deleted the plafer-1091-dyn-op-rework branch November 1, 2024 14:34

plafer mentioned this pull request Nov 4, 2024

Incorrect behavior of caller instruction for dynamic calls #1478

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bobbinth mentioned this pull request Nov 23, 2024

Consider refactoring the semantics of DYN operation #1091

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feat: `DYN` and `DYNCALL` takes a memory address instead of digest on stack #1535

feat: `DYN` and `DYNCALL` takes a memory address instead of digest on stack #1535

plafer commented Oct 15, 2024 •

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bobbinth commented Oct 29, 2024

		&+ \alpha_5 \cdot fmp + \alpha_6 \cdot b_0 + \alpha_7 \cdot b_1 + <[\alpha_8, \alpha_{11}], fn\_hash[0..3]>) \text{ \| degree} = 6
		\end{align*}

feat: DYN and DYNCALL takes a memory address instead of digest on stack #1535

feat: DYN and DYNCALL takes a memory address instead of digest on stack #1535

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bobbinth commented Oct 29, 2024

feat: `DYN` and `DYNCALL` takes a memory address instead of digest on stack #1535

feat: `DYN` and `DYNCALL` takes a memory address instead of digest on stack #1535

plafer commented Oct 15, 2024 •

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