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Fix fallout/leftovers from architectural ACTLR_EL12 support on M2+ #404

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merged 3 commits into from
Sep 24, 2024
Merged

Fix fallout/leftovers from architectural ACTLR_EL12 support on M2+ #404

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3850ce5
github: workflow: Update to `actions/upload-artifact@v4`
jannau Sep 23, 2024
d987b31
m1n1: hv: Use Apple implementation specific ACTLR_EL12 on M1*
jannau Sep 23, 2024
b97b82a
hv: Use architectural ACTLR_EL12 on M2+ for secondary init
jannau Sep 23, 2024
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2 changes: 1 addition & 1 deletion .github/workflows/build.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ jobs:
- name: Build
run: make -k -j2 ARCH=aarch64-linux-gnu- CHAINLOADING=1

- uses: actions/upload-artifact@v2
- uses: actions/upload-artifact@v4
with:
name: m1n1
path: |
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8 changes: 6 additions & 2 deletions proxyclient/m1n1/hv/__init__.py
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Expand Up @@ -1441,9 +1441,13 @@ def init(self):

self.map_vuart()

actlr = ACTLR(self.u.mrs(ACTLR_EL12))
# ACTLR depends on the CPU part
part = MIDR(self.u.mrs(MIDR_EL1)).PART
actlr_el12 = ACTLR_EL12 if part >= MIDR_PART.T8110_BLIZZARD else ACTLR_EL12_PRE

actlr = ACTLR(self.u.mrs(actlr_el12))
actlr.EnMDSB = 1
self.u.msr(ACTLR_EL12, actlr.value)
self.u.msr(actlr_el12, actlr.value)

self.setup_adt()

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8 changes: 8 additions & 0 deletions proxyclient/m1n1/sysreg.py
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Expand Up @@ -379,5 +379,13 @@ class TLBI_RVA(Register64):
TTL = 38, 37
BaseADDR = 36, 0

class MIDR_PART(IntEnum):
T8110_BLIZZARD = 0x30

class MIDR(Register64):
REV_LOW = 3, 0
PART = 15, 4
REV_HIGH = 23, 20

__all__.extend(k for k, v in globals().items()
if (callable(v) or isinstance(v, type)) and v.__module__ == __name__)
10 changes: 8 additions & 2 deletions src/hv.c
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Expand Up @@ -137,7 +137,10 @@ void hv_start(void *entry, u64 regs[4])
hv_secondary_info.apvmkeyhi = mrs(SYS_IMP_APL_APVMKEYHI_EL2);
hv_secondary_info.apsts = mrs(SYS_IMP_APL_APSTS_EL12);
hv_secondary_info.actlr_el2 = mrs(ACTLR_EL2);
hv_secondary_info.actlr_el1 = mrs(SYS_IMP_APL_ACTLR_EL12);
if (cpufeat_actlr_el2)
hv_secondary_info.actlr_el1 = mrs(SYS_ACTLR_EL12);
else
hv_secondary_info.actlr_el1 = mrs(SYS_IMP_APL_ACTLR_EL12);
hv_secondary_info.cnthctl = mrs(CNTHCTL_EL2);
hv_secondary_info.sprr_config = mrs(SYS_IMP_APL_SPRR_CONFIG_EL1);
hv_secondary_info.gxf_config = mrs(SYS_IMP_APL_GXF_CONFIG_EL1);
Expand Down Expand Up @@ -198,7 +201,10 @@ static void hv_init_secondary(struct hv_secondary_info_t *info)
msr(SYS_IMP_APL_APVMKEYHI_EL2, info->apvmkeyhi);
msr(SYS_IMP_APL_APSTS_EL12, info->apsts);
msr(ACTLR_EL2, info->actlr_el2);
msr(SYS_IMP_APL_ACTLR_EL12, info->actlr_el1);
if (cpufeat_actlr_el2)
msr(SYS_ACTLR_EL12, info->actlr_el1);
else
msr(SYS_IMP_APL_ACTLR_EL12, info->actlr_el1);
msr(CNTHCTL_EL2, info->cnthctl);
msr(SYS_IMP_APL_SPRR_CONFIG_EL1, info->sprr_config);
msr(SYS_IMP_APL_GXF_CONFIG_EL1, info->gxf_config);
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