README.md

UART on an FPGA

This is a simple UART controller created in SystemVerilog. It was synthesized for the UPduino 3.0 development board (Lattice ICE40 FPGA), using the Radiant Software from Lattice.

I wrote a two part series of blog post describing the design process:

• Part 1: https://blog.csotiriou.com/post/uart-on-an-fpga-part-1/
• Part 2: https://blog.csotiriou.com/post/uart-on-an-fpga-part-2/