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Merge pull request #1752 from MrCry0/master-optee-55
Upgrade OP-TEE to LF6.1.55-2.2.0 NXP BSP
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4 changes: 2 additions & 2 deletions
4
...rity/optee-imx/optee-client_3.21.0.imx.bb → ...urity/optee-imx/optee-client_4.0.0.imx.bb
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@@ -1,7 +1,7 @@ | ||
require optee-client-fslc-imx.inc | ||
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||
SRCBRANCH = "lf-6.1.36_2.1.0" | ||
SRCREV = "8533e0e6329840ee96cf81b6453f257204227e6c" | ||
SRCBRANCH = "lf-6.1.55_2.2.0" | ||
SRCREV = "acb0885c117e73cb6c5c9b1dd9054cb3f93507ee" | ||
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DEPENDS += "util-linux" | ||
EXTRA_OEMAKE += "PKG_CONFIG=pkg-config" |
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@@ -1,4 +1,4 @@ | ||
From b73c3d2829d3661ca66b5cc6b4181f3bf973b13f Mon Sep 17 00:00:00 2001 | ||
From ef83625c9a5f50610e25aa860c4b9c5e64723a66 Mon Sep 17 00:00:00 2001 | ||
From: Emekcan Aras <[email protected]> | ||
Date: Wed, 21 Dec 2022 10:55:58 +0000 | ||
Subject: [PATCH 1/4] core: Define section attributes for clang | ||
|
@@ -36,15 +36,15 @@ Signed-off-by: Oleksandr Suvorov <[email protected]> | |
core/arch/arm/kernel/thread.c | 19 +++++++++++++++-- | ||
core/arch/arm/mm/core_mmu_lpae.c | 35 +++++++++++++++++++++++++++---- | ||
core/arch/arm/mm/core_mmu_v7.c | 36 +++++++++++++++++++++++++++++--- | ||
core/arch/arm/mm/pgt_cache.c | 12 ++++++++++- | ||
core/kernel/thread.c | 13 +++++++++++- | ||
core/mm/pgt_cache.c | 12 ++++++++++- | ||
5 files changed, 104 insertions(+), 11 deletions(-) | ||
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||
diff --git a/core/arch/arm/kernel/thread.c b/core/arch/arm/kernel/thread.c | ||
index 22ef932f9..7a9078d2e 100644 | ||
index 66833b3a0..b3eb9cf9a 100644 | ||
--- a/core/arch/arm/kernel/thread.c | ||
+++ b/core/arch/arm/kernel/thread.c | ||
@@ -44,15 +44,30 @@ static size_t thread_user_kcode_size __nex_bss; | ||
@@ -45,15 +45,30 @@ static size_t thread_user_kcode_size __nex_bss; | ||
#if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ | ||
defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) | ||
long thread_user_kdata_sp_offset __nex_bss; | ||
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@@ -78,10 +78,10 @@ index 22ef932f9..7a9078d2e 100644 | |
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||
#ifdef ARM32 | ||
diff --git a/core/arch/arm/mm/core_mmu_lpae.c b/core/arch/arm/mm/core_mmu_lpae.c | ||
index 6df2c68cf..a877e4965 100644 | ||
index 4c8b85e39..1885e1d3f 100644 | ||
--- a/core/arch/arm/mm/core_mmu_lpae.c | ||
+++ b/core/arch/arm/mm/core_mmu_lpae.c | ||
@@ -238,19 +238,46 @@ typedef uint16_t l1_idx_t; | ||
@@ -234,19 +234,46 @@ typedef uint16_t l1_idx_t; | ||
typedef uint64_t base_xlat_tbls_t[CFG_TEE_CORE_NB_CORE][NUM_BASE_LEVEL_ENTRIES]; | ||
typedef uint64_t xlat_tbl_t[XLAT_TABLE_ENTRIES]; | ||
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||
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@@ -133,7 +133,7 @@ index 6df2c68cf..a877e4965 100644 | |
* TAs page table entry inside a level 1 page table. | ||
* | ||
diff --git a/core/arch/arm/mm/core_mmu_v7.c b/core/arch/arm/mm/core_mmu_v7.c | ||
index 58596be84..98fa58635 100644 | ||
index 61e703da8..1960c08ca 100644 | ||
--- a/core/arch/arm/mm/core_mmu_v7.c | ||
+++ b/core/arch/arm/mm/core_mmu_v7.c | ||
@@ -204,16 +204,46 @@ typedef uint32_t l1_xlat_tbl_t[NUM_L1_ENTRIES]; | ||
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@@ -186,35 +186,11 @@ index 58596be84..98fa58635 100644 | |
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struct mmu_partition { | ||
l1_xlat_tbl_t *l1_table; | ||
diff --git a/core/arch/arm/mm/pgt_cache.c b/core/arch/arm/mm/pgt_cache.c | ||
index 79553c6d2..b9efdf427 100644 | ||
--- a/core/arch/arm/mm/pgt_cache.c | ||
+++ b/core/arch/arm/mm/pgt_cache.c | ||
@@ -410,8 +410,18 @@ void pgt_init(void) | ||
* has a large alignment, while .bss has a small alignment. The current | ||
* link script is optimized for small alignment in .bss | ||
*/ | ||
+#ifdef __clang__ | ||
+#pragma clang section bss=".nozi.mmu.l2" | ||
+#endif | ||
static uint8_t pgt_tables[PGT_CACHE_SIZE][PGT_SIZE] | ||
- __aligned(PGT_SIZE) __section(".nozi.pgt_cache"); | ||
+ __aligned(PGT_SIZE) | ||
+#ifndef __clang__ | ||
+ __section(".nozi.pgt_cache") | ||
+#endif | ||
+ ; | ||
+#ifdef __clang__ | ||
+#pragma clang section bss="" | ||
+#endif | ||
size_t n; | ||
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||
for (n = 0; n < ARRAY_SIZE(pgt_tables); n++) { | ||
diff --git a/core/kernel/thread.c b/core/kernel/thread.c | ||
index e48294b3b..8de9064ca 100644 | ||
index 2a1f22dce..5516b6771 100644 | ||
--- a/core/kernel/thread.c | ||
+++ b/core/kernel/thread.c | ||
@@ -38,13 +38,24 @@ struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE] __nex_bss; | ||
@@ -39,13 +39,24 @@ static uint32_t end_canary_value = 0xababab00; | ||
name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] | ||
#endif | ||
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||
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@@ -240,7 +216,30 @@ index e48294b3b..8de9064ca 100644 | |
#define GET_STACK(stack) ((vaddr_t)(stack) + STACK_SIZE(stack)) | ||
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DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, | ||
diff --git a/core/mm/pgt_cache.c b/core/mm/pgt_cache.c | ||
index 79553c6d2..b9efdf427 100644 | ||
--- a/core/mm/pgt_cache.c | ||
+++ b/core/mm/pgt_cache.c | ||
@@ -410,8 +410,18 @@ void pgt_init(void) | ||
* has a large alignment, while .bss has a small alignment. The current | ||
* link script is optimized for small alignment in .bss | ||
*/ | ||
+#ifdef __clang__ | ||
+#pragma clang section bss=".nozi.mmu.l2" | ||
+#endif | ||
static uint8_t pgt_tables[PGT_CACHE_SIZE][PGT_SIZE] | ||
- __aligned(PGT_SIZE) __section(".nozi.pgt_cache"); | ||
+ __aligned(PGT_SIZE) | ||
+#ifndef __clang__ | ||
+ __section(".nozi.pgt_cache") | ||
+#endif | ||
+ ; | ||
+#ifdef __clang__ | ||
+#pragma clang section bss="" | ||
+#endif | ||
size_t n; | ||
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||
for (n = 0; n < ARRAY_SIZE(pgt_tables); n++) { | ||
-- | ||
2.40.1 | ||
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||
2.43.2 | ||
|
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,4 +1,4 @@ | ||
From c67f63d4e7bbe7b21b4c9ef49ae84c6725794aa9 Mon Sep 17 00:00:00 2001 | ||
From 2ba573c9763329fbfdfacc8393d565ab747cac4d Mon Sep 17 00:00:00 2001 | ||
From: Brett Warren <[email protected]> | ||
Date: Wed, 23 Sep 2020 09:27:34 +0100 | ||
Subject: [PATCH 2/4] optee: enable clang support | ||
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@@ -30,5 +30,5 @@ index a045beee8..1ebe2f702 100644 | |
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# Core ASLR relies on the executable being ready to run from its preferred load | ||
-- | ||
2.40.1 | ||
2.43.2 | ||
|
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,4 +1,4 @@ | ||
From f23fb3381422c613890f77c26d11e377234481c6 Mon Sep 17 00:00:00 2001 | ||
From 6f738803a59613ec4a683ddbc1747ebffd75a4e6 Mon Sep 17 00:00:00 2001 | ||
From: Jerome Forissier <[email protected]> | ||
Date: Tue, 23 Aug 2022 12:31:46 +0000 | ||
Subject: [PATCH 3/4] arm32: libutils, libutee, ta: add .note.GNU-stack section | ||
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@@ -129,5 +129,5 @@ index cd9a12f9d..ccdc19928 100644 | |
* This function is the bottom of the user call stack. Mark it as such so that | ||
* the unwinding code won't try to go further down. | ||
-- | ||
2.40.1 | ||
2.43.2 | ||
|
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@@ -1,4 +1,4 @@ | ||
From b53f5542102b8088448134202c30ca563f5b3c04 Mon Sep 17 00:00:00 2001 | ||
From a63f82f74e015eb662242cdb51ef814e3f576829 Mon Sep 17 00:00:00 2001 | ||
From: Jerome Forissier <[email protected]> | ||
Date: Fri, 5 Aug 2022 09:48:03 +0200 | ||
Subject: [PATCH 4/4] core: link: add --no-warn-rwx-segments | ||
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@@ -25,7 +25,7 @@ Signed-off-by: Oleksandr Suvorov <[email protected]> | |
1 file changed, 4 insertions(+), 2 deletions(-) | ||
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diff --git a/core/arch/arm/kernel/link.mk b/core/arch/arm/kernel/link.mk | ||
index e8a518254..60e08966f 100644 | ||
index 49e9f4fa1..9e1cc172f 100644 | ||
--- a/core/arch/arm/kernel/link.mk | ||
+++ b/core/arch/arm/kernel/link.mk | ||
@@ -37,6 +37,7 @@ link-ldflags += --sort-section=alignment | ||
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@@ -63,5 +63,5 @@ index e8a518254..60e08966f 100644 | |
$(libgcccore) | ||
cleanfiles += $(link-out-dir)/init.o | ||
-- | ||
2.40.1 | ||
2.43.2 | ||
|
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