ADD.L

Kogepan229 · Dec 22, 2023 · 9e211dc · 9e211dc
1 parent f3ec9ff
commit 9e211dc
Showing 1 changed file with 16 additions and 18 deletions.
diff --git a/src/cpu/instruction/add_l.rs b/src/cpu/instruction/add_l.rs
@@ -1,11 +1,11 @@
-use crate::cpu::{Cpu, CCR};
+use crate::cpu::{Cpu, StateType, CCR};
 use anyhow::{bail, Context as _, Result};
 
 impl Cpu {
-    pub(in super::super) async fn add_l(&mut self, opcode: u16) -> Result<usize> {
+    pub(in super::super) async fn add_l(&mut self, opcode: u16) -> Result<u8> {
         match (opcode >> 8) as u8 {
             0x7a => return self.add_l_imm(opcode).await,
-            0x0a => return self.add_l_rn(opcode),
+            0x0a => return self.add_l_rn(opcode).await,
             _ => bail!("invalid opcode [{:>04x}]", opcode),
         }
     }
@@ -45,28 +45,26 @@ impl Cpu {
         value as u32
     }
 
-    async fn add_l_imm(&mut self, opcode: u16) -> Result<usize> {
+    async fn add_l_imm(&mut self, opcode: u16) -> Result<u8> {
         let imm = (self.fetch().await as u32) << 16 | self.fetch().await as u32;
-        let mut f = || -> Result<usize> {
+        let mut f = || -> Result<()> {
             let register = Cpu::get_nibble_opcode(opcode, 4)?;
             let dest = self.read_rn_l(register)?;
             let result = self.add_l_proc(dest, imm);
             self.write_rn_l(register, result)?;
-            Ok(6)
+            Ok(())
         };
-        f().with_context(|| format!("imm(opcode2, 3) [{:x}]", imm))
+        f().with_context(|| format!("imm(opcode2, 3) [{:x}]", imm));
+        Ok(self.calc_state(StateType::I, 3).await?)
     }
 
-    fn add_l_rn(&mut self, opcode: u16) -> Result<usize> {
-        let mut f = || -> Result<usize> {
-            let register_dest = Cpu::get_nibble_opcode(opcode, 4)?;
-            let dest = self.read_rn_l(register_dest)?;
-            let register_src = Cpu::get_nibble_opcode(opcode, 3)? & 0x7;
-            let src = self.read_rn_l(register_src)?;
-            let result = self.add_l_proc(dest, src);
-            self.write_rn_l(register_dest, result)?;
-            Ok(2)
-        };
-        f()
+    async fn add_l_rn(&mut self, opcode: u16) -> Result<u8> {
+        let register_dest = Cpu::get_nibble_opcode(opcode, 4)?;
+        let dest = self.read_rn_l(register_dest)?;
+        let register_src = Cpu::get_nibble_opcode(opcode, 3)? & 0x7;
+        let src = self.read_rn_l(register_src)?;
+        let result = self.add_l_proc(dest, src);
+        self.write_rn_l(register_dest, result)?;
+        Ok(self.calc_state(StateType::I, 1).await?)
     }
 }