Feature/buildroot 2024.02.2

.github/workflows/main.yml

@@ -8,11 +8,11 @@ on:
   pull_request: { }
 
 env:
-  BUILDROOT_VERSION: 2022.11.1
+  BUILDROOT_VERSION: 2024.02.2
 
 jobs:
   build:
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
 
     outputs:
       pkgfile: ${{ steps.pkgname.outputs.pkgfile }}

buildroot/board/otter/ottercast-S3/u-boot/patches/0001-arm-sunxi-add-support-for-I2C1-on-V3s-based-SoCs.patch

@@ -0,0 +1,45 @@
+From 4952d2a7f66e7499cb43f0bb9566ce32ec344f51 Mon Sep 17 00:00:00 2001
+From: Tobias Schramm <[email protected]>
+Date: Sun, 26 May 2024 16:11:48 +0200
+Subject: [PATCH 1/5] arm: sunxi: add support for I2C1 on V3s-based SoCs
+
+Previously enabling I2C1 when using a V3s-based SoC had no effect.
+Set pinmux on PE21 and PE22 to I2C1 function when enabling I2C1 on
+V3s-based SoCs.
+
+Signed-off-by: Tobias Schramm <[email protected]>
+---
+ board/sunxi/board.c  | 4 ++++
+ include/sunxi_gpio.h | 1 +
+ 2 files changed, 5 insertions(+)
+
+diff --git a/board/sunxi/board.c b/board/sunxi/board.c
+index 8c12c8dead..78d54c0437 100644
+--- a/board/sunxi/board.c
++++ b/board/sunxi/board.c
+@@ -98,6 +98,10 @@ void i2c_init_board(void)
+ 	sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1);
+ 	sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1);
+ 	clock_twi_onoff(1, 1);
++#elif defined(CONFIG_MACH_SUN8I_V3S)
++	sunxi_gpio_set_cfgpin(SUNXI_GPE(21), SUN8I_V3S_GPE_TWI1);
++	sunxi_gpio_set_cfgpin(SUNXI_GPE(22), SUN8I_V3S_GPE_TWI1);
++	clock_twi_onoff(1, 1);
+ #elif defined(CONFIG_MACH_SUN8I)
+ 	sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1);
+ 	sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1);
+diff --git a/include/sunxi_gpio.h b/include/sunxi_gpio.h
+index db3742c039..175b13a887 100644
+--- a/include/sunxi_gpio.h
++++ b/include/sunxi_gpio.h
+@@ -113,6 +113,7 @@ enum sunxi_gpio_number {
+ #define SUN4I_GPB_TWI1		2
+ #define SUN5I_GPB_TWI1		2
+ #define SUN8I_V3S_GPB_TWI0	2
++#define SUN8I_V3S_GPE_TWI1	3
+ #define SUN4I_GPB_UART0		2
+ #define SUN5I_GPB_UART0		2
+ #define SUN8I_GPB_UART2		2
+-- 
+2.30.2
+

buildroot/board/otter/ottercast-S3/u-boot/patches/0002-clk-sunxi-support-Ethernet-clock-gates-and-resets-on.patch

@@ -0,0 +1,55 @@
+From 82fd7f9db8d0ad4c0f3468090da195acec9af873 Mon Sep 17 00:00:00 2001
+From: Tobias Schramm <[email protected]>
+Date: Sun, 26 May 2024 18:05:05 +0200
+Subject: [PATCH 2/5] clk: sunxi: support Ethernet clock gates and resets on
+ V3s-based SoC
+
+Previously Ethernet clock gates and resets were missing from the V3s CCU
+driver.
+Add the required clock gates and resets.
+
+Signed-off-by: Tobias Schramm <[email protected]>
+---
+ drivers/clk/sunxi/clk_v3s.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
+index 6524c13540..0402d5ed19 100644
+--- a/drivers/clk/sunxi/clk_v3s.c
++++ b/drivers/clk/sunxi/clk_v3s.c
+@@ -17,6 +17,7 @@ static struct ccu_clk_gate v3s_gates[] = {
+ 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
+ 	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
+ 	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
++	[CLK_BUS_EMAC]		= GATE(0x060, BIT(17)),
+ 	[CLK_BUS_SPI0]		= GATE(0x060, BIT(20)),
+ 	[CLK_BUS_OTG]		= GATE(0x060, BIT(24)),
+
+@@ -31,6 +32,8 @@ static struct ccu_clk_gate v3s_gates[] = {
+ 	[CLK_BUS_UART1]		= GATE(0x06c, BIT(17)),
+ 	[CLK_BUS_UART2]		= GATE(0x06c, BIT(18)),
+
++	[CLK_BUS_EPHY]		= GATE(0x070, BIT(0)),
++
+ 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
+
+ 	[CLK_USB_PHY0]          = GATE(0x0cc, BIT(8)),
+@@ -45,12 +48,15 @@ static struct ccu_reset v3s_resets[] = {
+ 	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
+ 	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
+ 	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
++	[RST_BUS_EMAC]		= RESET(0x2c0, BIT(17)),
+ 	[RST_BUS_SPI0]		= RESET(0x2c0, BIT(20)),
+ 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(24)),
+
+ 	[RST_BUS_TCON0]		= RESET(0x2c4, BIT(4)),
+ 	[RST_BUS_DE]		= RESET(0x2c4, BIT(12)),
+
++	[RST_BUS_EPHY]		= RESET(0x2c8, BIT(2)),
++
+ 	[RST_BUS_I2C0]		= RESET(0x2d8, BIT(0)),
+ 	[RST_BUS_I2C1]		= RESET(0x2d8, BIT(1)),
+ 	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
+-- 
+2.30.2
+

buildroot/board/otter/ottercast-S3/u-boot/patches/0003-net-sun8i_emac-add-support-for-EMAC-on-V3s-based-SoC.patch

@@ -0,0 +1,41 @@
+From 5e75040a3552de7cb36711033aa56b678893d02a Mon Sep 17 00:00:00 2001
+From: Tobias Schramm <[email protected]>
+Date: Sun, 26 May 2024 16:20:55 +0200
+Subject: [PATCH 3/5] net: sun8i_emac: add support for EMAC on V3s-based SoCs
+
+The Allwinner V3s SoC and related SoCs feature an Ethernet MAC.
+Add support for it.
+
+Signed-off-by: Tobias Schramm <[email protected]>
+---
+ drivers/net/sun8i_emac.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
+index 8bff4fe9a9..d9d1825b69 100644
+--- a/drivers/net/sun8i_emac.c
++++ b/drivers/net/sun8i_emac.c
+@@ -903,6 +903,11 @@ static const struct emac_variant emac_variant_h6 = {
+ 	.support_rmii		= true,
+ };
+
++static const struct emac_variant emac_variant_v3s = {
++	.syscon_offset		= 0x30,
++	.soc_has_internal_phy	= true,
++};
++
+ static const struct udevice_id sun8i_emac_eth_ids[] = {
+ 	{ .compatible = "allwinner,sun8i-a83t-emac",
+ 	  .data = (ulong)&emac_variant_a83t },
+@@ -914,6 +919,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = {
+ 	  .data = (ulong)&emac_variant_a64 },
+ 	{ .compatible = "allwinner,sun50i-h6-emac",
+ 	  .data = (ulong)&emac_variant_h6 },
++	{ .compatible = "allwinner,sun8i-v3s-emac",
++	  .data = (ulong)&emac_variant_v3s },
+ 	{ }
+ };
+
+-- 
+2.30.2
+