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os/arch/arm/src/amebasmart: Add macro for I2S DMA size and page number #6621

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@zhongnuo-tang zhongnuo-tang commented Jan 8, 2025

- Added I2S DMA size and page macro for user to modify according to usage
- supported DMA size of range 4 ~ 16384 bytes
- supported DMA page be more than 2
- SP_MAX_DMA_PAGE_NUM in bsp will be synced with dma page set by user
- code clean for condition checking, change from hardcoded value 8 to SP_MAX_DMA_PAGE_NUM - 1

@zhongnuo-tang zhongnuo-tang changed the title os/arch/arm/src/amebasmart: increase I2S dma page to 8 to increase to… os/arch/arm/src/amebasmart: Increase I2S DMA page support to a maximum of 8 pages Jan 8, 2025
- Added I2S DMA size and page macro for user to modify according to usage
- supported DMA size of range 4 ~ 16384 bytes
- supported DMA page be more than 2
- SP_MAX_DMA_PAGE_NUM in bsp will be synced with dma page set by user
- code clean for condition checking, change from hardcoded value 8 to SP_MAX_DMA_PAGE_NUM - 1
@zhongnuo-tang zhongnuo-tang changed the title os/arch/arm/src/amebasmart: Increase I2S DMA page support to a maximum of 8 pages os/arch/arm/src/amebasmart: Add macro for I2S DMA size and page number Jan 13, 2025
@sunghan-chang
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@zhongnuo-tang I heard Eric would talk to you about this. Is there any update?

@zhongnuo-tang
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@zhongnuo-tang I heard Eric would talk to you about this. Is there any update?

Let me check with him what is it about..

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zhongnuo-tang commented Jan 15, 2025

@zhongnuo-tang I heard Eric would talk to you about this. Is there any update?

Hi @sunghan-chang, here is the update regarding the qns asked

  1. DMA Page Size Limitation: Each DMA page has a size limit, with a maximum of 16,384 bytes (4,096 bytes × transfer width). This is the maximum amount of data that can be transferred in a single DMA operation.

  2. Multi-Block (Linked List Mode): I2S DMA uses a multi-block transfer approach, where each page can be viewed as a memory region. As long as these pages (or nodes) are properly linked, the DMA controller will sequentially access each memory address and transfer data to or from the peripheral FIFO.

  3. DMA Hardware Operation: The actual data transfer between memory and the peripheral FIFO is handled by the DMA hardware. However, the process still requires RAM for tasks like filling each DMA page in the ISR handler, assuming the code is located in RAM.

  4. Differences Between AmebaSmart and AmebaD: Unlike the AmebaD platform, which has a dedicated DMA controller for I2S with a maximum of 16K × 4 page, the AmebaSmart platform uses a common DMA controller for all peripherals. This means the DMA is shared across different peripherals on the AmebaSmart platform, rather than being specific to one like in the AmebaD.

Anyway, i think maybe it would be better to restrict the page size to 2~8 to prevent confusion?

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Differences Between AmebaSmart and AmebaD: Unlike the AmebaD platform, which has a dedicated DMA controller for I2S with a maximum of 16K × 4 page, the AmebaSmart platform uses a common DMA controller for all peripherals. This means the DMA is shared across different peripherals on the AmebaSmart platform, rather than being specific to one like in the AmebaD.

@zhongnuo-tang Could you confirm this lastly? Even it does, no upper limitation? page size 16384, page num 100. Is this working?

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If yes, I think no need to modify.

@zhongnuo-tang
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Differences Between AmebaSmart and AmebaD: Unlike the AmebaD platform, which has a dedicated DMA controller for I2S with a maximum of 16K × 4 page, the AmebaSmart platform uses a common DMA controller for all peripherals. This means the DMA is shared across different peripherals on the AmebaSmart platform, rather than being specific to one like in the AmebaD.

@zhongnuo-tang Could you confirm this lastly? Even it does, no upper limitation? page size 16384, page num 100. Is this working?

Hi @sunghan-chang ,
With the current I2S DMA buffer settings (page_num: 100, page_size: 16384), testing with the SoundPlayer example and playing a 2-minute soundtrack works fine. However, some issues have been observed in the product code.

Before Wi-Fi Connection: The audio functions correctly.
After Wi-Fi Connection: There is mute occurs in Bixby.
As Eric is currently occupied with BLE-related issues, we have limited time to investigate the root cause of the muting.

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