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fix_cache_string: update cache config help text #76

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fix_cache_string: update cache config help text #76

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f74ce1a
fix_cache_string: update cache config help text
William-An Sep 4, 2024
77d58da
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purdue-jenkins Sep 4, 2024
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39 changes: 21 additions & 18 deletions src/gpgpu-sim/gpu-sim.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -247,12 +247,12 @@ void memory_config::reg_options(class OptionParser *opp) {

option_parser_register(opp, "-l2_ideal", OPT_BOOL, &l2_ideal,
"Use a ideal L2 cache that always hit", "0");
option_parser_register(opp, "-gpgpu_cache:dl2", OPT_CSTR,
&m_L2_config.m_config_string,
"unified banked L2 data cache config "
" {<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_"
"alloc>,<mshr>:<N>:<merge>,<mq>}",
"64:128:8,L:B:m:N,A:16:4,4");
option_parser_register(
opp, "-gpgpu_cache:dl2", OPT_CSTR, &m_L2_config.m_config_string,
"unified banked L2 data cache config "
" {<sector?>:<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_"
"index_fn>,<mshr>:<N>:<merge>,<mq>:<fifo_entry>,<data_port_width>",
"S:32:128:24,L:B:m:L:P,A:192:4,32:0,32");
option_parser_register(opp, "-gpgpu_cache:dl2_texture_only", OPT_BOOL,
&m_L2_texure_only, "L2 cache used for texture only",
"1");
Expand Down Expand Up @@ -341,17 +341,18 @@ void shader_core_config::reg_options(class OptionParser *opp) {
" {<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>,<mshr>:<N>:<"
"merge>,<mq>} ",
"64:64:2,L:R:f:N,A:2:32,4");
option_parser_register(opp, "-gpgpu_cache:il1", OPT_CSTR,
&m_L1I_config.m_config_string,
"shader L1 instruction cache config "
" {<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_"
"alloc>,<mshr>:<N>:<merge>,<mq>} ",
"4:256:4,L:R:f:N,A:2:32,4");
option_parser_register(
opp, "-gpgpu_cache:il1", OPT_CSTR, &m_L1I_config.m_config_string,
"shader L1 instruction cache config "
" {<sector?>:<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_"
"alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>} ",
"N:64:128:16,L:R:f:N:L,S:2:48,4");
option_parser_register(opp, "-gpgpu_cache:dl1", OPT_CSTR,
&m_L1D_config.m_config_string,
"per-shader L1 data cache config "
" {<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_"
"alloc>,<mshr>:<N>:<merge>,<mq> | none}",
" {<sector?>:<nsets>:<bsize>:<assoc>,<rep>:<wr>:<"
"alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<"
"mq>:<fifo_entry>,<data_port_width> | none}",
"none");
option_parser_register(opp, "-gpgpu_l1_cache_write_ratio", OPT_UINT32,
&m_L1D_config.m_wr_percent, "L1D write ratio", "0");
Expand All @@ -371,14 +372,16 @@ void shader_core_config::reg_options(class OptionParser *opp) {
option_parser_register(opp, "-gpgpu_cache:dl1PrefL1", OPT_CSTR,
&m_L1D_config.m_config_stringPrefL1,
"per-shader L1 data cache config "
" {<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_"
"alloc>,<mshr>:<N>:<merge>,<mq> | none}",
" {<sector?>:<nsets>:<bsize>:<assoc>,<rep>:<wr>:<"
"alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<"
"mq>:<fifo_entry>,<data_port_width> | none | none}",
"none");
option_parser_register(opp, "-gpgpu_cache:dl1PrefShared", OPT_CSTR,
&m_L1D_config.m_config_stringPrefShared,
"per-shader L1 data cache config "
" {<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_"
"alloc>,<mshr>:<N>:<merge>,<mq> | none}",
" {<sector?>:<nsets>:<bsize>:<assoc>,<rep>:<wr>:<"
"alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<"
"mq>:<fifo_entry>,<data_port_width> | none | none}",
"none");
option_parser_register(opp, "-gpgpu_gmem_skip_L1D", OPT_BOOL, &gmem_skip_L1D,
"global memory access skip L1D cache (implements "
Expand Down