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arm: dts: k3-am62*: sync with Linux v6.9
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Update k3-am62 DT files from Linux v6.9

Signed-off-by: Roger Quadros <[email protected]>
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rogerq authored and trini committed May 13, 2024
1 parent c671999 commit 9e0102b
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Showing 16 changed files with 552 additions and 99 deletions.
126 changes: 108 additions & 18 deletions arch/arm/dts/k3-am62-main.dtsi
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Device Tree Source for AM625 SoC Family Main Domain peripherals
*
* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
* Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
*/

&cbass_main {
Expand Down Expand Up @@ -42,9 +42,8 @@
};
};

main_conf: syscon@100000 {
compatible = "syscon", "simple-mfd";
reg = <0x00 0x00100000 0x00 0x20000>;
main_conf: bus@100000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x00 0x00100000 0x20000>;
Expand Down Expand Up @@ -121,8 +120,13 @@
<0x00 0x4c000000 0x00 0x20000>,
<0x00 0x4a820000 0x00 0x20000>,
<0x00 0x4aa40000 0x00 0x20000>,
<0x00 0x4bc00000 0x00 0x100000>;
reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
<0x00 0x4bc00000 0x00 0x100000>,
<0x00 0x48600000 0x00 0x8000>,
<0x00 0x484a4000 0x00 0x2000>,
<0x00 0x484c2000 0x00 0x2000>,
<0x00 0x48420000 0x00 0x2000>;
reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
"ring", "tchan", "rchan", "bchan";
msi-parent = <&inta_main_dmss>;
#dma-cells = <3>;

Expand All @@ -138,8 +142,13 @@
reg = <0x00 0x485c0000 0x00 0x100>,
<0x00 0x4a800000 0x00 0x20000>,
<0x00 0x4aa00000 0x00 0x40000>,
<0x00 0x4b800000 0x00 0x400000>;
reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
<0x00 0x4b800000 0x00 0x400000>,
<0x00 0x485e0000 0x00 0x10000>,
<0x00 0x484a0000 0x00 0x2000>,
<0x00 0x484c0000 0x00 0x2000>,
<0x00 0x48430000 0x00 0x1000>;
reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
"ring", "tchan", "rchan", "rflow";
msi-parent = <&inta_main_dmss>;
#dma-cells = <2>;

Expand Down Expand Up @@ -502,6 +511,9 @@
main_gpio0: gpio@600000 {
compatible = "ti,am64-gpio", "ti,keystone-gpio";
reg = <0x0 0x00600000 0x0 0x100>;
gpio-ranges = <&main_pmx0 0 0 32>,
<&main_pmx0 32 33 38>,
<&main_pmx0 70 72 22>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
Expand All @@ -520,6 +532,10 @@
compatible = "ti,am64-gpio", "ti,keystone-gpio";
reg = <0x0 0x00601000 0x0 0x100>;
gpio-controller;
gpio-ranges = <&main_pmx0 0 94 41>,
<&main_pmx0 41 136 6>,
<&main_pmx0 47 143 3>,
<&main_pmx0 50 149 2>;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <180>, <181>, <182>,
Expand All @@ -542,10 +558,9 @@
clock-names = "clk_ahb", "clk_xin";
assigned-clocks = <&k3_clks 57 6>;
assigned-clock-parents = <&k3_clks 57 8>;
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
ti,trm-icp = <0x2>;
bus-width = <8>;
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
Expand All @@ -563,7 +578,8 @@
power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
clock-names = "clk_ahb", "clk_xin";
ti,trm-icp = <0x2>;
bus-width = <4>;
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x8>;
ti,otap-del-sel-sd-hs = <0x0>;
ti,otap-del-sel-sdr12 = <0x0>;
Expand All @@ -575,8 +591,6 @@
ti,itap-del-sel-sd-hs = <0x1>;
ti,itap-del-sel-sdr12 = <0xa>;
ti,itap-del-sel-sdr25 = <0x1>;
ti,clkbuf-sel = <0x7>;
bus-width = <4>;
status = "disabled";
};

Expand All @@ -587,7 +601,8 @@
power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
clock-names = "clk_ahb", "clk_xin";
ti,trm-icp = <0x2>;
bus-width = <4>;
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x8>;
ti,otap-del-sel-sd-hs = <0x0>;
ti,otap-del-sel-sdr12 = <0x0>;
Expand All @@ -599,7 +614,6 @@
ti,itap-del-sel-sd-hs = <0xa>;
ti,itap-del-sel-sdr12 = <0xa>;
ti,itap-del-sel-sdr25 = <0x1>;
ti,clkbuf-sel = <0x7>;
status = "disabled";
};

Expand All @@ -623,6 +637,8 @@
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
snps,usb2-gadget-lpm-disable;
snps,usb2-lpm-disable;
};
};

Expand All @@ -646,6 +662,8 @@
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
snps,usb2-gadget-lpm-disable;
snps,usb2-lpm-disable;
};
};

Expand Down Expand Up @@ -675,6 +693,15 @@
};
};

gpu: gpu@fd00000 {
compatible = "ti,am62-gpu", "img,img-axe";
reg = <0x00 0x0fd00000 0x00 0x20000>;
clocks = <&k3_clks 187 0>;
clock-names = "core";
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
};

cpsw3g: ethernet@8000000 {
compatible = "ti,am642-cpsw-nuss";
#address-cells = <2>;
Expand Down Expand Up @@ -753,9 +780,10 @@
<0x00 0x30207000 0x00 0x1000>, /* ovr1 */
<0x00 0x30208000 0x00 0x1000>, /* ovr2 */
<0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */
<0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */
<0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */
<0x00 0x30201000 0x00 0x1000>; /* common1 */
reg-names = "common", "vidl1", "vid",
"ovr1", "ovr2", "vp1", "vp2";
"ovr1", "ovr2", "vp1", "vp2", "common1";
power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 186 6>,
<&dss_vp1_clk>,
Expand Down Expand Up @@ -965,4 +993,66 @@
power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
};

ti_csi2rx0: ticsi2rx@30102000 {
compatible = "ti,j721e-csi2rx-shim";
dmas = <&main_bcdma 0 0x4700 0>;
dma-names = "rx0";
reg = <0x00 0x30102000 0x00 0x1000>;
power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
status = "disabled";

cdns_csi2rx0: csi-bridge@30101000 {
compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
reg = <0x00 0x30101000 0x00 0x1000>;
clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>,
<&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>;
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
phys = <&dphy0>;
phy-names = "dphy";

ports {
#address-cells = <1>;
#size-cells = <0>;

csi0_port0: port@0 {
reg = <0>;
status = "disabled";
};

csi0_port1: port@1 {
reg = <1>;
status = "disabled";
};

csi0_port2: port@2 {
reg = <2>;
status = "disabled";
};

csi0_port3: port@3 {
reg = <3>;
status = "disabled";
};

csi0_port4: port@4 {
reg = <4>;
status = "disabled";
};
};
};
};

dphy0: phy@30110000 {
compatible = "cdns,dphy-rx";
reg = <0x00 0x30110000 0x00 0x1100>;
#phy-cells = <0>;
power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
};

};
4 changes: 2 additions & 2 deletions arch/arm/dts/k3-am62-mcu.dtsi
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Device Tree Source for AM625 SoC Family MCU Domain peripherals
*
* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
* Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
*/

&cbass_mcu {
Expand Down
5 changes: 4 additions & 1 deletion arch/arm/dts/k3-am62-thermal.dtsi
Original file line number Diff line number Diff line change
@@ -1,4 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
*/

#include <dt-bindings/thermal/thermal.h>

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38 changes: 30 additions & 8 deletions arch/arm/dts/k3-am62-wakeup.dtsi
Original file line number Diff line number Diff line change
@@ -1,10 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Device Tree Source for AM625 SoC Family Wakeup Domain peripherals
*
* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
* Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
*/

#include <dt-bindings/bus/ti-sysc.h>

&cbass_wakeup {
wkup_conf: syscon@43000000 {
bootph-all;
Expand All @@ -21,14 +23,34 @@
};
};

wkup_uart0: serial@2b300000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x2b300000 0x00 0x100>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
target-module@2b300050 {
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x00 0x2b300050 0x00 0x4>,
<0x00 0x2b300054 0x00 0x4>,
<0x00 0x2b300058 0x00 0x4>;
reg-names = "rev", "sysc", "syss";
ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
SYSC_OMAP2_SOFTRESET |
SYSC_OMAP2_AUTOIDLE)>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
ti,syss-mask = <1>;
ti,no-reset-on-init;
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 114 0>;
clock-names = "fclk";
status = "disabled";
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x00 0x2b300000 0x100000>;

wkup_uart0: serial@0 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};

wkup_i2c0: i2c@2b200000 {
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4 changes: 2 additions & 2 deletions arch/arm/dts/k3-am62.dtsi
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Device Tree Source for AM62 SoC Family
*
* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
* Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
*/

#include <dt-bindings/gpio/gpio.h>
Expand Down
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