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[XLS] Ignore the costs of any node that only affects asserts/covers/t…
…races Since asserts, covers, and traces will never be synthesized, we can essentially ignore the delay & register cost of anything that exclusively feeds into these operations. This lets us produce better schedules for these circuits regardless of any extra asserts that we or the user may have added, under the assumption that the synthesis toolchain will trim these nodes and the registers that have no other uses anyway. It's worth noting that these operations can still prevent certain optimizations, since we can't remove their inputs entirely. There may be more work to be done to allow these optimizations to kick in anyway, potentially by preserving "shadow" values as needed. PiperOrigin-RevId: 712540220
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