Disable some LITs for llvm-17 and llvm-18

Typed pointer support was removed starting with llvm-17
intel · Sep 11, 2023 · e72a1b8 · e72a1b8
1 parent 77f069b
commit e72a1b8
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Showing 35 changed files with 62 additions and 31 deletions.
diff --git a/GenXIntrinsics/test/Adaptors/addr_conv_attribute_writer.ll b/GenXIntrinsics/test/Adaptors/addr_conv_attribute_writer.ll
@@ -8,6 +8,7 @@
 
 ; Test @llvm.genx.address.convert intrinsic generation with proper attributes
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 
 define void @test(i32 %buf) {

diff --git a/GenXIntrinsics/test/Adaptors/annot_mess_writer.ll b/GenXIntrinsics/test/Adaptors/annot_mess_writer.ll
@@ -9,6 +9,7 @@
 ; Test messy annnotations translation in writer. First valid
 ; annotation should be matched.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 
 define void @test(i32 %im2d, i32 %samp, i64 %ptr, i32 %gen) {

diff --git a/GenXIntrinsics/test/Adaptors/annotated_args_mixed_reader.ll b/GenXIntrinsics/test/Adaptors/annotated_args_mixed_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -9,6 +9,7 @@
 ; Test that reader can cope with mixed mode when some
 ; arguments use address convert and some do not.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 %intel.buffer_rw_t = type opaque

diff --git a/GenXIntrinsics/test/Adaptors/annotated_args_no_conv_reader.ll b/GenXIntrinsics/test/Adaptors/annotated_args_no_conv_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -10,6 +10,7 @@
 ; not change other things if there is no address conversion
 ; but correct SPIRV types in signature.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 %intel.buffer_rw_t = type opaque

diff --git a/GenXIntrinsics/test/Adaptors/annotated_args_no_conv_writer.ll b/GenXIntrinsics/test/Adaptors/annotated_args_no_conv_writer.ll
@@ -9,6 +9,7 @@
 ; Test that writer does not changes signature if correct
 ; types are already used. Just drop all annotations.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 
 %intel.buffer_rw_t = type opaque

diff --git a/GenXIntrinsics/test/Adaptors/annotated_args_reader.ll b/GenXIntrinsics/test/Adaptors/annotated_args_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -10,6 +10,7 @@
 ; that SPIRV translator can understand to old style with
 ; metadata. Here annotations for OCL runtime are used.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 %intel.buffer_rw_t = type opaque

diff --git a/GenXIntrinsics/test/Adaptors/annotated_args_writer.ll b/GenXIntrinsics/test/Adaptors/annotated_args_writer.ll
@@ -9,7 +9,7 @@
 ; Test kernel arguments translation from old style with metadata to
 ; new style with opaque types that SPIRV translator can
 ; understand. Here annotations for OCL runtime are used.
-; XFAIL: llvm13, llvm14, llvm15
+; XFAIL: llvm13, llvm14, llvm15, llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 

diff --git a/GenXIntrinsics/test/Adaptors/args_attributes_transform_reader.ll b/GenXIntrinsics/test/Adaptors/args_attributes_transform_reader.ll
@@ -8,7 +8,7 @@
 
 ; Test that adaptor correctly handles parameter attributes with types.
 
-; UNSUPPORTED: llvm8
+; UNSUPPORTED: llvm8, llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 ; CHECK: @test
 ; CHECK-SAME: (%foo addrspace(1)* byval(%foo) %arg)

diff --git a/GenXIntrinsics/test/Adaptors/args_attributes_transform_writer.ll b/GenXIntrinsics/test/Adaptors/args_attributes_transform_writer.ll
@@ -8,7 +8,7 @@
 
 ; Test that adaptor correctly handles parameter attributes with types.
 
-; UNSUPPORTED: llvm8
+; UNSUPPORTED: llvm8, llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 ; CHECK: @test
 ; CHECK-SAME: %foo addrspace(1)* byval(%foo)

diff --git a/GenXIntrinsics/test/Adaptors/combined_args_reader.ll b/GenXIntrinsics/test/Adaptors/combined_args_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -10,6 +10,7 @@
 ; and impicit arguments. Implicit arguments would not show in normal
 ; flow, though they appear in old cmc.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 %opencl.image2d_ro_t = type opaque

diff --git a/GenXIntrinsics/test/Adaptors/combined_args_writer.ll b/GenXIntrinsics/test/Adaptors/combined_args_writer.ll
@@ -10,6 +10,7 @@
 ; arguments and impicit arguments. Implicit arguments would not show
 ; in normal flow, though they appear in old cmc.
 ; XFAIL: llvm13, llvm14, llvm15
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 

diff --git a/GenXIntrinsics/test/Adaptors/fun_attributes_transform_reader.ll b/GenXIntrinsics/test/Adaptors/fun_attributes_transform_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2021-2022 Intel Corporation
+; Copyright (C) 2021-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -9,7 +9,7 @@
 ; Test that adaptor correctly translates function attributes to VC-specific
 ; metadata (the processed attributes are expected to be discarded)
 
-; UNSUPPORTED: llvm8
+; UNSUPPORTED: llvm8, llvm17, llvm18
 ; XFAIL: llvm15
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 ; CHECK: @test_VCFunction()

diff --git a/GenXIntrinsics/test/Adaptors/image_array_reader.ll b/GenXIntrinsics/test/Adaptors/image_array_reader.ll
@@ -1,13 +1,14 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2021-2022 Intel Corporation
+; Copyright (C) 2021-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
 ; Test reader translation of image array arguments.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 %opencl.image1d_array_ro_t = type opaque

diff --git a/GenXIntrinsics/test/Adaptors/image_array_writer.ll b/GenXIntrinsics/test/Adaptors/image_array_writer.ll
@@ -8,6 +8,7 @@
 
 ; Test writer translation of image array arguments.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 
 define void @test(i32 %im1darr, i32 %im2darr) {

diff --git a/GenXIntrinsics/test/Adaptors/media_block_reader.ll b/GenXIntrinsics/test/Adaptors/media_block_reader.ll
@@ -1,13 +1,14 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2021-2022 Intel Corporation
+; Copyright (C) 2021-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
 ; Test reader translation of media block image arguments.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 %intel.image2d_media_block_ro_t = type opaque

diff --git a/GenXIntrinsics/test/Adaptors/media_block_writer.ll b/GenXIntrinsics/test/Adaptors/media_block_writer.ll
@@ -8,6 +8,7 @@
 
 ; Test writer translation of media block images arguments.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 
 define void @test(i32 %image) {

diff --git a/GenXIntrinsics/test/Adaptors/non_global_ptr_reader.ll b/GenXIntrinsics/test/Adaptors/non_global_ptr_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -9,6 +9,7 @@
 ; Test that reader treats only global pointer as svmptr type
 ; and ignores other address spaces.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 define spir_kernel void @test(i32* %ptr) #0 {

diff --git a/GenXIntrinsics/test/Adaptors/old_decorated_args_reader.ll b/GenXIntrinsics/test/Adaptors/old_decorated_args_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -11,6 +11,7 @@
 ; kernel metadata without any checks. Required until full transition
 ; is done.
 
+; UNSUPPORTED: llvm17, llvm18
 ; XFAIL: llvm15
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 

diff --git a/GenXIntrinsics/test/Adaptors/plain_args_reader.ll b/GenXIntrinsics/test/Adaptors/plain_args_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -10,6 +10,7 @@
 ; that SPIRV translator can understand to old style with
 ; metadata. Arguments without annotations are used here (CMRT like).
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 %intel.buffer_rw_t = type opaque

diff --git a/GenXIntrinsics/test/Adaptors/plain_args_writer.ll b/GenXIntrinsics/test/Adaptors/plain_args_writer.ll
@@ -9,6 +9,7 @@
 ; Test kernel arguments translation from old style with metadata to
 ; new style with opaque types that SPIRV translator can
 ; understand. Arguments without annotations are used here (CMRT like).
+; UNSUPPORTED: llvm17, llvm18
 ; XFAIL: llvm13, llvm14, llvm15
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s

diff --git a/GenXIntrinsics/test/Adaptors/sev_calling_conv_reader.ll b/GenXIntrinsics/test/Adaptors/sev_calling_conv_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2022 Intel Corporation
+; Copyright (C) 2022-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -9,6 +9,7 @@
 ; Test GenXSingleElementVectorUtil preserves calling convention
 ; (spir_func here)
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 

diff --git a/GenXIntrinsics/test/Adaptors/sev_calling_conv_writer.ll b/GenXIntrinsics/test/Adaptors/sev_calling_conv_writer.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2022 Intel Corporation
+; Copyright (C) 2022-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -9,6 +9,7 @@
 ; Test GenXSingleElementVectorUtil preserves calling convention
 ; (spir_func here)
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 
 ; ModuleID = 'sev_calling_conv_reader.ll'

diff --git a/GenXIntrinsics/test/Adaptors/sev_signature_reader.ll b/GenXIntrinsics/test/Adaptors/sev_signature_reader.ll
@@ -8,7 +8,8 @@
 
 ; Test simple signatures tranform
 
-; LLVM16 error: symbol with local linkage cannot have a DLL storage class 
+; UNSUPPORTED: llvm17, llvm18
+; LLVM16 error: symbol with local linkage cannot have a DLL storage class
 ; for test-function (internal dllexport)
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 

diff --git a/GenXIntrinsics/test/Adaptors/sev_signature_writer.ll b/GenXIntrinsics/test/Adaptors/sev_signature_writer.ll
@@ -1,13 +1,14 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
 ; Test simple signatures tranform
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 
 ; CHECK: @global_var_0 = internal global i32 undef, align 4

diff --git a/GenXIntrinsics/test/Adaptors/sev_struct.ll b/GenXIntrinsics/test/Adaptors/sev_struct.ll
@@ -6,12 +6,13 @@
 ;
 ;============================ end_copyright_notice =============================
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 
 target datalayout = "e-p:64:64-i64:64-n8:16:32"
 target triple = "spir64"
 
-; CHECK: [[STRUCT1:[^ ]+]] = type { i32, <2 x i32>, [[STRUCT2:[^ ]+]] }  
+; CHECK: [[STRUCT1:[^ ]+]] = type { i32, <2 x i32>, [[STRUCT2:[^ ]+]] }
 %struct.sev_test = type { <1 x i32>, <2 x i32>, %struct.sev_test_nested }
 ; CHECK: [[STRUCT2]] = type { i32*, <2 x i32>*, [[STRUCT1]]* }
 %struct.sev_test_nested = type { <1 x i32>*, <2 x i32>*, %struct.sev_test* }

diff --git a/GenXIntrinsics/test/Adaptors/spirv_friendly_types_reader.ll b/GenXIntrinsics/test/Adaptors/spirv_friendly_types_reader.ll
@@ -1,13 +1,14 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2021-2022 Intel Corporation
+; Copyright (C) 2021-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
 ; Test reader translation of SPIRV friendly IR types
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 %spirv.Sampler = type opaque

diff --git a/GenXIntrinsics/test/Adaptors/surface_access_reader.ll b/GenXIntrinsics/test/Adaptors/surface_access_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -10,6 +10,7 @@
 ; types that SPIRV translator can understand to old style with
 ; metadata. This test checks access qualifiers translation.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 
 %intel.buffer_ro_t = type opaque

diff --git a/GenXIntrinsics/test/Adaptors/surface_access_writer.ll b/GenXIntrinsics/test/Adaptors/surface_access_writer.ll
@@ -10,6 +10,7 @@
 ; metadata to new style with opaque types that SPIRV translator can
 ; understand. This test checks access qualifiers translation.
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%GenXSPIRVWriterAdaptor -S < %s | FileCheck %s
 
 define void @test(i32 %buf, i32 %im1d, i32 %im1db, i32 %im2d, i32 %im3d) {

diff --git a/GenXIntrinsics/test/Adaptors/unknown_arg_reader.ll b/GenXIntrinsics/test/Adaptors/unknown_arg_reader.ll
@@ -1,6 +1,6 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
@@ -9,6 +9,7 @@
 ; Test reader translation of implicit argument with argument kind
 ; decoration.
 
+; UNSUPPORTED: llvm17, llvm18
 ; XFAIL: llvm15
 ; RUN: opt %pass%GenXSPIRVReaderAdaptor -S < %s | FileCheck %s
 

diff --git a/GenXIntrinsics/test/SimdCFLowering/bitcast_between_wrrs.ll b/GenXIntrinsics/test/SimdCFLowering/bitcast_between_wrrs.ll
@@ -6,6 +6,7 @@
 ;
 ;============================ end_copyright_notice =============================
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%cmsimdcflowering -S < %s | FileCheck %s
 
 @Rcp_T2 = internal global <64 x double> undef

diff --git a/GenXIntrinsics/test/SimdCFLowering/predicate_masked_gather.ll b/GenXIntrinsics/test/SimdCFLowering/predicate_masked_gather.ll
@@ -1,14 +1,15 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2020-2022 Intel Corporation
+; Copyright (C) 2020-2023 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
+; UNSUPPORTED: llvm17, llvm18
 ; RUN: opt %pass%cmsimdcflowering -S < %s | FileCheck %s
 
-; CHECK: @EM = internal global <32 x i1> 
+; CHECK: @EM = internal global <32 x i1>
 
 @g2 = internal global <32 x i32> undef