The DESim application provides a graphical user interface (GUI) that represents some of the features of a DE1-SoC board. This GUI serves as a "front end" for the ModelSim simulator. Using the DESim GUI you can invoke both the ModelSim Verilog compiler and simulator. Inputs to the ModelSim simulator can be provided by clicking on features in the DESim GUI, which also shows results produced by the simulator on displays that look like the ones on a DE1-SoC board.
The DESim tool has four parts:
- Documentation in the form of an installation guide, and a user tutorial.
- The frontend graphical user interface
- The backend simulator interface
- Various demos showcasing the different capabilities of the tool
The DESim tool requires the ModelSim HDL simuator. Preferably, one of the ModelSim-Intel FPGA editions, which has the Intel FPGA IP Core simulation models built-in.
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ModelSim (Intel FPGA starter edition 10.5b, available at https://fpgasoftware.intel.com/19.1/?edition=lite&platform=windows). Note go to individual files and you can download Modelsim separately. No libraries are needed.
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Navigate to the DESim installer URL: https://github.com/fpgacademy/DESim/releases
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Read and follow the steps provided in the DESim_install_guide.pdf document.
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Navigate to the DESim installer URL: https://github.com/fpgacademy/DESim/releases
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Read and follow the steps provided in the DESim_tutorial.pdf document.