top_verilator: pull unused SCL/SDA pins high.

SCL/SDA pins are 'and' combined, and undriven pins default to low, so any undriven pin will stop the SCL/SDA lines from being usable. Co-authored-by: Adrian Lees <[email protected]>
lowRISC · Oct 21, 2024 · 72ac8d2 · 72ac8d2
1 parent 72118f3
commit 72ac8d2
Showing 1 changed file with 8 additions and 0 deletions.
diff --git a/dv/verilator/top_verilator.sv b/dv/verilator/top_verilator.sv
@@ -186,6 +186,14 @@ module top_verilator (input logic clk_i, rst_ni);
   assign inout_from_pins[INOUT_PIN_SCL1] = scl1_in;
   assign inout_from_pins[INOUT_PIN_SDA1] = sda1_in;
 
+  // These unused inputs must be pulled high.
+  assign {inout_from_pins[INOUT_PIN_RPH_G0],
+          inout_from_pins[INOUT_PIN_RPH_G1],
+          inout_from_pins[INOUT_PIN_RPH_G2_SDA],
+          inout_from_pins[INOUT_PIN_RPH_G3_SCL],
+          inout_from_pins[INOUT_PIN_MB5],
+          inout_from_pins[INOUT_PIN_MB6]} = {6{1'b1}};  // SCL/SDA are shared with other pins.
+
   // SPI CS outputs from GPIO pins; these are scheduled to be dropped but they are still required
   // by the `gp_o` port presently.
   logic gp_lcd_cs, gp_appspi_cs, gp_ethmac_cs;