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Recover from low Rx input and reduce test duration
Prevent a low GPIO input to the UART Rx input causing the test to run indefinitely without timeout. A low Rx input keeps the UART RX logic active and prevents it becoming Idle except for infrequent single-cycle assertions of Idle. Use higher I2C speed when reading the RPi HAT ID EEPROM to reduce the test duration substantially. Reduce the timeout values in the UART and GPIO testing to more practical values for FPGA and reduce the simulation time.
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