Skip to content

Commit

Permalink
Fix typo
Browse files Browse the repository at this point in the history
  • Loading branch information
marnovandermaas authored Feb 2, 2024
1 parent c700fb4 commit b3ab5e2
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion rtl/fpga/top_sonata.sv
Original file line number Diff line number Diff line change
Expand Up @@ -75,7 +75,7 @@ module top_sonata (
.uart_rx_i(ser0_rx),
.uart_tx_o(ser0_tx),

.pwm_o({CheriErr, led_legacy, led_cheri, led_halted}),
.pwm_o({cheriErr, led_legacy, led_cheri, led_halted}),

.spi_rx_i (1'b0),
.spi_tx_o (lcd_copi),
Expand Down

0 comments on commit b3ab5e2

Please sign in to comment.