Stars
Your self-hosted, globally interconnected microblogging community
An extremely fast Python package and project manager, written in Rust.
Sail model for the CHERI addition to RISC-V
An open source Python package that generates hardware pinout diagrams as SVG images.
ConFuzz is an advanced FPGA configuration engine fuzzing and rapid prototyping framework based on boofuzz and OpenOCD.
Style and Grammar Checker for 25+ Languages
Package manager and build abstraction tool for FPGA/ASIC development
Software, build flows and examples for the Sonata System
RISC-V processor framework with plugable pipelines
A RISC-V TestRIG Verification Engine based on QuickCheck
This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
ChipWhisperer - the complete open-source toolchain for side-channel power analysis and glitching attacks
Side-channel analysis setup for OpenTitan
A free and strong UCI chess engine
The CHERI TG aims to standardize a CHERI extension to RISC-V for both RV32 and RV64.
Design files and associated documentation for Sonata PCB, part of the Sunburst Project
Open-source high performance AXI4-based HyperRAM memory controller
Fork of LLVM adding CHERIoT, based on the CHERI LLVM fork
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/