RTC related cleanups, including not resetting the RTC time from getti…

…meofday()
mbed-ce · Jan 17, 2024 · 675c7f5 · 675c7f5
1 parent 85c5dab
commit 675c7f5
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Showing 3 changed files with 14 additions and 55 deletions.
diff --git a/platform/source/mbed_rtc_time.cpp b/platform/source/mbed_rtc_time.cpp
@@ -97,7 +97,7 @@ int gettimeofday(struct timeval *tv, MBED_UNUSED void *tz)
     _mutex->lock();
     if (_rtc_isenabled != NULL) {
         if (!(_rtc_isenabled())) {
-            set_time(0);
+            _rtc_init();
         }
     }
 

diff --git a/targets/TARGET_STM/mbed_overrides.c b/targets/TARGET_STM/mbed_overrides.c
@@ -287,37 +287,6 @@ void mbed_sdk_init()
     SystemCoreClockUpdate();
 #endif /* DUAL_CORE */
 
-    /* Start LSI clock for RTC */
-#if DEVICE_RTC
-#if (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_HSE)
-    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
-#if defined(RCC_RTCCLKSOURCE_HSE_DIVX)
-    PeriphClkInitStruct.RTCClockSelection = (RCC_RTCCLKSOURCE_HSE_DIVX | RTC_HSE_DIV << 16);
-#else
-    PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_HSE_DIV128;
-#endif
-    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
-        error("PeriphClkInitStruct RTC failed with HSE\n");
-    }
-#elif ((MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSE_OR_LSI) && !MBED_CONF_TARGET_LSE_AVAILABLE) || (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSI)
-    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-
-    if (__HAL_RCC_GET_RTC_SOURCE() != RCC_RTCCLKSOURCE_NO_CLK) {
-#if TARGET_STM32WB
-        RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI1;
-#else
-        RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
-#endif
-        RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_NONE;
-        RCC_OscInitStruct.LSIState       = RCC_LSI_ON;
-        if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
-            error("Init : cannot initialize LSI\n");
-        }
-    }
-#endif /* ! MBED_CONF_TARGET_LSE_AVAILABLE */
-#endif /* DEVICE_RTC */
-
 #ifndef MBED_DEBUG
 #if MBED_CONF_TARGET_GPIO_RESET_AT_INIT
     /* Reset all GPIO */

diff --git a/targets/targets.json5 b/targets/targets.json5
@@ -1219,6 +1219,10 @@
                 "help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used",
                 "value": "1"
             },
+            "lse_bypass": {
+                "help": "Change to 1 to use a logic level oscillator (not a crystal) on 32k LSE",
+                "value": "0"
+            },
             "rtc_clock_source": {
                 "help": "Define the RTC clock source. USE_RTC_CLK_LSE_OR_LSI, USE_RTC_CLK_LSI, USE_RTC_CLK_HSE. LPTICKER is not available for HSE and should be removed from the target configuration.",
                 "value": "USE_RTC_CLK_LSE_OR_LSI"
@@ -3626,10 +3630,6 @@
                 "value": "25000000",
                 "macro_name": "HSE_VALUE"
             },
-            "lse_bypass": {
-                "help": "1 to use an oscillator (not a crystal) on 32k LSE",
-                "value": "1"
-            },
             "usb_speed": {
                 "help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS",
                 "value": "USE_USB_OTG_HS"
@@ -3662,6 +3662,7 @@
             "system_power_supply": "PWR_SMPS_1V8_SUPPLIES_LDO",
             "clock_source": "USE_PLL_HSE_EXTC",
             "lse_available": 1,
+            "lse_bypass": 1,
             "lpticker_delay_ticks": 0,
             "network-default-interface-type": "ETHERNET",
             "i2c_timing_value_algo": true
@@ -3805,7 +3806,7 @@
         ],
         "config": {
             "clock_source": {
-                "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
                 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
                 "macro_name": "CLOCK_SOURCE"
             },
@@ -3814,7 +3815,7 @@
                 "value": 1
             },
             "lse_drive_load_level": {
-                "help": "HSE drive load level  RCC_LSEDRIVE_LOW | RCC_LSEDRIVE_MEDIUMLOW | RCC_LSEDRIVE_MEDIUMHIGH | RCC_LSEDRIVE_HIGH",
+                "help": "HSE drive load level  RCC_LSEDRIVE_LOW | RCC_LSEDRIVE_MEDIUMLOW | RCC_LSEDRIVE_MEDIUMHIGH | RCC_LSEDRIVE_HIGH.  May require power cycle to board for changes to this setting to take effect!",
                 "value": "RCC_LSEDRIVE_LOW"
             },
             "i2c_timing_value_algo": {
@@ -9763,32 +9764,21 @@
             "RTC"
         ]
     },
-    "RASPBERRY_PI_PICO": {
+    "RASPBERRY_PI_PICO_SWD": {
         "inherits": ["RP2040"],
         "macros_add": [
             "PICO_RP2040_USB_DEVICE_ENUMERATION_FIX=1",
             "MBED_MPU_CUSTOM",
             "PICO_TIME_DEFAULT_ALARM_POOL_DISABLED",
             "PICO_ON_DEVICE=1",
             "PICO_UART_ENABLE_CRLF_SUPPORT=0"
-        ],
-        "overrides": {
-            "console-usb": true,
-            "console-uart": false,
-
-            // ADC_VDD sets the ADC reference voltage on this chip.
-            // Most RP2040 boards set this pin to 3.3V.
-            // Note that if the I/O voltage is set to less than the ADC reference voltage,
-            // voltages higher than the I/O voltage are illegal for the analog pins
-            // (so the ADC can never read 100%).
-            "default-adc-vref": 3.3
-        }
+        ]
     },
-    "RASPBERRY_PI_PICO_SWD": {
-        "inherits": ["RASPBERRY_PI_PICO"],
+    "RASPBERRY_PI_PICO": {
+        "inherits": ["RASPBERRY_PI_PICO_SWD"],
         "overrides": {
-            "console-usb": false,
-            "console-uart": true
+            "console-usb": true,
+            "console-uart": false
         }
     }
 }