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Fix issue #258 #339

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Fix issue #258 #339

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21b01eb
Fix issue #258
freshLiver Jan 2, 2024
85e406b
Add imm bit range testing for RV32I
freshLiver Jan 4, 2024
cbf75be
Fix immediate width of ImmJ and ImmB
freshLiver Jan 25, 2024
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12 changes: 6 additions & 6 deletions src/isa/rv_i_ext.h
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Original file line number Diff line number Diff line change
Expand Up @@ -271,7 +271,7 @@ struct Ecall : public Instr<Ecall, Funct12::ECALL> {

namespace TypeU {

/// A RISC-V immediate field with an input width of 32 bits.
/// A RISC-V immediate field with an input width of 20 bits.
/// Used in U-Type instructions.
///
/// It is defined as:
Expand All @@ -280,7 +280,7 @@ namespace TypeU {
constexpr static unsigned VALID_INDEX = 1;
template <unsigned index, SymbolType symbolType>
struct ImmU
: public ImmSym<index, 32, Repr::Hex, ImmPart<0, 12, 31>, symbolType> {
: public ImmSym<index, 20, Repr::Hex, ImmPart<0, 12, 31>, symbolType> {
static_assert(index == VALID_INDEX, "Invalid token index");
};

Expand Down Expand Up @@ -309,7 +309,7 @@ struct Lui : public Instr<Lui, RVISA::OpcodeID::LUI> {

namespace TypeJ {

/// A RISC-V signed immediate field with an input width of 21 bits.
/// A RISC-V signed immediate field with an input width of 20 bits.
/// Used in J-Type instructions.
///
/// It is defined as:
Expand All @@ -321,7 +321,7 @@ namespace TypeJ {
/// - Imm[0] = 0
constexpr static unsigned VALID_INDEX = 1;
template <unsigned index>
struct ImmJ : public ImmSym<index, 21, Repr::Signed,
struct ImmJ : public ImmSym<index, 20, Repr::Signed,
ImmPartSet<ImmPart<20, 31, 31>, ImmPart<12, 12, 19>,
ImmPart<11, 20, 20>, ImmPart<1, 21, 30>>,
SymbolType::Relative> {
Expand Down Expand Up @@ -489,7 +489,7 @@ enum class Funct3 {
BGEU = 0b111
};

/// A RISC-V signed immediate field with an input width of 13 bits.
/// A RISC-V signed immediate field with an input width of 12 bits.
/// Used in B-Type instructions.
///
/// It is defined as:
Expand All @@ -500,7 +500,7 @@ enum class Funct3 {
/// - Imm[0] = 0
constexpr static unsigned VALID_INDEX = 2;
template <unsigned index>
struct ImmB : public ImmSym<index, 13, Repr::Signed,
struct ImmB : public ImmSym<index, 12, Repr::Signed,
ImmPartSet<ImmPart<12, 31, 31>, ImmPart<11, 7, 7>,
ImmPart<5, 25, 30>, ImmPart<1, 8, 11>>,
SymbolType::Relative> {
Expand Down
29 changes: 29 additions & 0 deletions test/tst_assembler.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,7 @@ private slots:
void tst_invalidreg();
void tst_expression();
void tst_invalidLabel();
void tst_immBitRange();
void tst_directives();
void tst_stringDirectives();
void tst_riscv();
Expand Down Expand Up @@ -253,6 +254,34 @@ void tst_Assembler::tst_invalidLabel() {
testAssemble(QStringList() << "addi a0 a0 (a", Expect::Fail);
}

void tst_Assembler::tst_immBitRange() {
// [ILS]-type : 12 bits imm (ImmCommon12, ImmS)
testAssemble(QStringList() << "addi a0 x0 0x0FFF", Expect::Success);
testAssemble(QStringList() << "addi a0 x0 0x1000", Expect::Fail);
testAssemble(QStringList() << "lw a0 0x0FFF(x0)", Expect::Success);
testAssemble(QStringList() << "lw a0 0x1000(x0)", Expect::Fail);
testAssemble(QStringList() << "sw a0 0x0FFF(x0)", Expect::Success);
testAssemble(QStringList() << "sw a0 0x1000(x0)", Expect::Fail);
// I-type (Shift): 5 bits imm (ImmIShift32)
testAssemble(QStringList() << "slli a1 a0 0b11111", Expect::Success);
testAssemble(QStringList() << "slli a1 a0 0b111111", Expect::Fail);
// U-type: 20 bits imm (ImmU)
testAssemble(QStringList() << "lui a0 0x0FFFFF", Expect::Success);
testAssemble(QStringList() << "lui a0 0x100000", Expect::Fail);
testAssemble(QStringList() << "auipc a0 0x0FFFFF", Expect::Success);
testAssemble(QStringList() << "auipc a0 0x100000", Expect::Fail);
// J-type: 20 bits imm (ImmJ)
testAssemble(QStringList() << "jal x0 0x0FFFFF", Expect::Success);
testAssemble(QStringList() << "jal x0 0x100000", Expect::Fail);
// B-type: 12 bits imm (ImmB)
testAssemble(QStringList() << "beq a0 x0 0x0FFF", Expect::Success);
testAssemble(QStringList() << "beq a0 x0 0x1000", Expect::Fail);
// pseudo: 32 bits imm
testAssemble(QStringList() << "li a0 0xFFFFFFFF", Expect::Success);
testAssemble(QStringList() << "li a0 0x100000000", Expect::Fail);
// TODO: 64b and [CM]-ext
}

void tst_Assembler::tst_benchmarkNew() {
auto isa = std::make_shared<ISAInfo<ISA::RV32I>>(QStringList());
auto assembler = ISA_Assembler<ISA::RV32I>(isa);
Expand Down
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