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Enable MPM interrupt controller #153

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Enable MPM interrupt controller #153

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ec031a3
pinctrl: qcom: pinctrl-msm8953: add add wakeirq_map
spasswolf Jan 3, 2024
a44903a
irqchip/qcom-mpm: Support passing a slice of SRAM as reg space
konradybcio Nov 27, 2023
1ec7111
arm64: dts: qcom: msm8953: Hook up MPM
spasswolf Jan 8, 2024
28dda52
Update arch/arm64/boot/dts/qcom/msm8953.dtsi
spasswolf Oct 22, 2024
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38 changes: 33 additions & 5 deletions arch/arm64/boot/dts/qcom/msm8953.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -633,6 +633,24 @@
reg = <0 0 0 0>;
};

mpm: interrupt-controller@601d4 {
compatible = "qcom,mpm";
qcom,rpm-msg-ram = <&apss_mpm>;
interrupts = <GIC_SPI 171 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apcs 1>;
interrupt-controller;
#interrupt-cells = <2>;
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Suggested change
#interrupt-cells = <2>;
#interrupt-cells = <3>;

https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.9.6.2.r1-04800-89xx.0/arch/arm64/boot/dts/qcom/msm8953.dtsi#L268

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But i am not totally sure because of this https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.9.6.2.r1-04800-89xx.0/arch/arm64/boot/dts/qcom/msm8953.dtsi#L275

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@spasswolf spasswolf Oct 22, 2024 •
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I think the downstream mpm controller "#interrupt-cells = <3>" only because it is used as interrupt-parent of the whole device-tree. In the examples in the mainline devicetree "qcom,mpm" is used with "#interrupt-cells = <2>", while the interrupt controller uses 3 cells (in sm6375.dtsi, qcm2290.dtsi).

#power-domain-cells = <0>;
interrupt-parent = <&intc>;
qcom,mpm-pin-count = <96>;
qcom,mpm-pin-map = <2 184>, /* tsens_upper_lower_int */
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It seems it is not matching with this https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.9.6.2.r1-04800-89xx.0/drivers/irqchip/qcom/mpm-8953.c#L16

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This offset IS confusing, but this is due to the the different mpm drivers in mainline and downstream kernel. The downstream kernel routes every interrupt through the mpm.

The irq numbers in mpm-pin-map should differ by 32 due to this, I think my template for this was

commit 09896da07315cce07b019ab00750c8a57e1b53a3
Author: Konrad Dybcio <[email protected]>
Date:   Fri Dec 15 01:01:09 2023 +0100

    arm64: dts: qcom: msm8996: Hook up MPM
    
    Wire up MPM and the interrupts it provides.
    
    Signed-off-by: Konrad Dybcio <[email protected]>
    Link: https://lore.kernel.org/r/[email protected]
    Signed-off-by: Bjorn Andersson <[email protected]>

This has since then been reverted

commit 4f423c4cbe26d79d8974936eb01e0d6574c5d2ac
Author: Dmitry Baryshkov <[email protected]>
Date:   Wed Feb 21 01:07:21 2024 +0200

    Revert "arm64: dts: qcom: msm8996: Hook up MPM"
    
    Commit 09896da07315 ("arm64: dts: qcom: msm8996: Hook up MPM") has
    hooked up the MPM irq chip on the MSM8996 platform. However this causes
    my Dragonboard 820c crash during bootup (usually when probing IOMMUs).
    Revert the offending commit for now. Quick debug shows that making
    tlmm's wakeup-parent point to the MPM is enough to trigger the crash.
    
    Fixes: 09896da07315 ("arm64: dts: qcom: msm8996: Hook up MPM")
    Signed-off-by: Dmitry Baryshkov <[email protected]>
    Link: https://lore.kernel.org/r/[email protected]
    Signed-off-by: Bjorn Andersson <[email protected]>

I think I had the mentioned problem, too, (crash on boot when using mpm as tlmm's wakeup-parent) but solved it (as in avoiding the crash, wakeup is still not working). I will look into it but first have to rebase these to the newest branch, I havent't booted my FP3 into debian for a long time.

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I tried to find an example (i.e. an android kernel for msm8996 where the wakegic is used in the devicetree) but couldn't find one, so I tried to use the data from mpm-8953.c in my devicetree without shifting:

		qcom,mpm-pin-map = <2 216>,  /* tsens_upper_lower_int */
				   <37 252>, /* qmp_usb3_lfps_rxterm_irq -> ss_phy_irq */
				   <49 168>, /* qusb2phy_dpse_hv -> hs_phy_irq*/
				   <53 104>, /* mdss_irq */
				   <58 168>, /* qusb2phy_dmse_hv -> hs_phy_irq*/
				   <88 222>; /* ee0_krait_hlos_spmi_periph_irq */

and with this the kernel hangs when booting. I take this is a hint that the shift is correct.

<37 220>, /* qmp_usb3_lfps_rxterm_irq -> ss_phy_irq */
<49 136>, /* qusb2phy_dpse_hv -> hs_phy_irq*/
<53 72>, /* mdss_irq */
<58 136>, /* qusb2phy_dmse_hv -> hs_phy_irq*/
<88 190>; /* ee0_krait_hlos_spmi_periph_irq */
};

pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
Expand Down Expand Up @@ -694,11 +712,13 @@
CLUSTER0_PD: power-domain-cluster0 {
#power-domain-cells = <0>;
domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_GDHS>, <&CLUSTER_PC>;
power-domains = <&mpm>;
};

CLUSTER1_PD: power-domain-cluster1 {
#power-domain-cells = <0>;
domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_GDHS>, <&CLUSTER_PC>;
power-domains = <&mpm>;
};
};

Expand Down Expand Up @@ -958,6 +978,13 @@
rpm_msg_ram: sram@60000 {
compatible = "qcom,rpm-msg-ram";
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reg = <0x00060000 0x8000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00060000 0x8000>;

apss_mpm: sram@1d4 {
reg = <0x1d4 0x48>;
};
};

hsusb_phy: phy@79000 {
Expand Down Expand Up @@ -1012,8 +1039,8 @@
reg = <0x004a9000 0x1000>, /* TM */
<0x004a8000 0x1000>; /* SROT */
#qcom,sensors = <16>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&mpm 2 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "uplow", "critical";
#thermal-sensor-cells = <1>;
};
Expand Down Expand Up @@ -1052,6 +1079,7 @@
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
gpio-ranges = <&tlmm 0 0 142>;
wakeup-parent = <&mpm>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
Expand Down Expand Up @@ -2176,7 +2204,7 @@
<0x0200a000 0x2100>;
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
interrupt-names = "periph_irq";
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&mpm 88 IRQ_TYPE_LEVEL_HIGH>;
qcom,ee = <0>;
qcom,channel = <0>;
interrupt-controller;
Expand Down Expand Up @@ -2247,8 +2275,8 @@
#size-cells = <1>;
ranges;

interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&mpm 49 IRQ_TYPE_LEVEL_HIGH>,
<&mpm 37 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hs_phy_irq", "ss_phy_irq";

clocks = <&gcc GCC_USB_PHY_CFG_AHB_CLK>,
Expand Down