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SPI component improvements for Zephyr
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natelust committed Dec 15, 2022
1 parent a2f8e88 commit 25d355c
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Showing 2 changed files with 11 additions and 11 deletions.
17 changes: 9 additions & 8 deletions esphome/components/spi/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -48,14 +48,15 @@ async def to_code(config):
var = cg.new_Pvariable(config[CONF_ID])
await cg.register_component(var, config)

clk = await cg.gpio_pin_expression(config[CONF_CLK_PIN])
cg.add(var.set_clk(clk))
if CONF_MISO_PIN in config:
miso = await cg.gpio_pin_expression(config[CONF_MISO_PIN])
cg.add(var.set_miso(miso))
if CONF_MOSI_PIN in config:
mosi = await cg.gpio_pin_expression(config[CONF_MOSI_PIN])
cg.add(var.set_mosi(mosi))
if not CORE.is_zephyr:
clk = await cg.gpio_pin_expression(config[CONF_CLK_PIN])
cg.add(var.set_clk(clk))
if CONF_MISO_PIN in config:
miso = await cg.gpio_pin_expression(config[CONF_MISO_PIN])
cg.add(var.set_miso(miso))
if CONF_MOSI_PIN in config:
mosi = await cg.gpio_pin_expression(config[CONF_MOSI_PIN])
cg.add(var.set_mosi(mosi))

if CORE.is_esp32:
cg.add_library("SPI", None)
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5 changes: 2 additions & 3 deletions esphome/components/spi/spi_zephyr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@ void SPIComponent::enable(GPIOPin *cs) {
return;
}
this->config = new spi_config {
.frequency=DATA_RATE,
.frequency = DATA_RATE,
.operation = SPI_OP_MODE_MASTER | SPI_WORD_SET(8) | SPI_LOCK_ON
};

Expand All @@ -48,7 +48,6 @@ void SPIComponent::enable(GPIOPin *cs) {


if (cs != nullptr) {
ESP_LOGI(TAG, "ENABLING GPIO");
this->active_cs_ = cs;
this->active_cs_->digital_write(false);
}
Expand Down Expand Up @@ -111,7 +110,7 @@ void SPIComponent::transceive_(uint8_t * data, size_t length) {
};
name = "transfer";
result = spi_transceive(device, config, &buffer, &read_buff);
if (result != 0) {
if (result == 0) {
memcpy(data, read_arr, length);
}
delete read_arr;
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