target: arm_adi_v5: add more CoreSight P/N

Add part numbers for: - Cortex-A65AE, - Cortex-M52, - Cortex-M55, - Cortex-R52+, - STAR-MC1. Change-Id: I6282768896dd727e803a071139816494470744f1 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: https://review.openocd.org/c/openocd/+/8319 Tested-by: jenkins
openocd-org · Aug 25, 2024 · d3f50ea · d3f50ea
1 parent 16429f6
commit d3f50ea
Showing 1 changed file with 10 additions and 0 deletions.
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
@@ -1453,11 +1453,13 @@ static const struct dap_part_nums {
 	{ ARM_ID, 0x4af, "Cortex-A15 ROM",             "(ROM Table)", },
 	{ ARM_ID, 0x4b5, "Cortex-R5 ROM",              "(ROM Table)", },
 	{ ARM_ID, 0x4b8, "Cortex-R52 ROM",             "(ROM Table)", },
+	{ ARM_ID, 0x4bd, "Cortex-R52+ ROM",            "(ROM Table)", },
 	{ ARM_ID, 0x4c0, "Cortex-M0+ ROM",             "(ROM Table)", },
 	{ ARM_ID, 0x4c3, "Cortex-M3 ROM",              "(ROM Table)", },
 	{ ARM_ID, 0x4c4, "Cortex-M4 ROM",              "(ROM Table)", },
 	{ ARM_ID, 0x4c7, "Cortex-M7 PPB ROM",          "(Private Peripheral Bus ROM Table)", },
 	{ ARM_ID, 0x4c8, "Cortex-M7 ROM",              "(ROM Table)", },
+	{ ARM_ID, 0x4c9, "STAR ROM",                   "(ROM Table)", },
 	{ ARM_ID, 0x4e0, "Cortex-A35 ROM",             "(v7 Memory Map ROM Table)", },
 	{ ARM_ID, 0x4e4, "Cortex-A76 ROM",             "(ROM Table)", },
 	{ ARM_ID, 0x906, "CoreSight CTI",              "(Cross Trigger)", },
@@ -1499,6 +1501,7 @@ static const struct dap_part_nums {
 	{ ARM_ID, 0x9ae, "Cortex-A17 PMU",             "(Performance Monitor Unit)", },
 	{ ARM_ID, 0x9af, "Cortex-A15 PMU",             "(Performance Monitor Unit)", },
 	{ ARM_ID, 0x9b6, "Cortex-R52 PMU/CTI/ETM",     "(Performance Monitor Unit/Cross Trigger/ETM)", },
+	{ ARM_ID, 0x9bb, "Cortex-R52+ PMU/CTI/ETM",    "(Performance Monitor Unit/Cross Trigger/ETM)", },
 	{ ARM_ID, 0x9b7, "Cortex-R7 PMU",              "(Performance Monitor Unit)", },
 	{ ARM_ID, 0x9d3, "Cortex-A53 PMU",             "(Performance Monitor Unit)", },
 	{ ARM_ID, 0x9d7, "Cortex-A57 PMU",             "(Performance Monitor Unit)", },
@@ -1533,6 +1536,10 @@ static const struct dap_part_nums {
 	{ ARM_ID, 0xd0b, "Cortex-A76 Debug",           "(Debug Unit)", },
 	{ ARM_ID, 0xd0c, "Neoverse N1",                "(Debug Unit)", },
 	{ ARM_ID, 0xd13, "Cortex-R52 Debug",           "(Debug Unit)", },
+	{ ARM_ID, 0xd16, "Cortex-R52+ Debug",          "(Debug Unit)", },
+	{ ARM_ID, 0xd21, "STAR Debug",                 "(Debug Unit)", },
+	{ ARM_ID, 0xd22, "Cortex-M55 Debug",           "(Debug Unit)", },
+	{ ARM_ID, 0xd43, "Cortex-A65AE Debug",         "(Debug Unit)", },
 	{ ARM_ID, 0xd49, "Neoverse N2",                "(Debug Unit)", },
 	{ 0x017,  0x120, "TI SDTI",                    "(System Debug Trace Interface)", }, /* from OMAP3 memmap */
 	{ 0x017,  0x343, "TI DAPCTL",                  "", }, /* from OMAP3 memmap */
@@ -1552,6 +1559,9 @@ static const struct dap_part_nums {
 	{ 0x1eb,  0x211, "Tegra 210 ROM",              "(ROM Table)", },
 	{ 0x1eb,  0x302, "Denver Debug",               "(Debug Unit)", },
 	{ 0x1eb,  0x402, "Denver PMU",                 "(Performance Monitor Unit)", },
+	{ 0x575,  0x132, "STAR SCS",                   "(System Control Space)", },
+	{ 0x575,  0x4d2, "Cortex-M52 ROM",             "(ROM Table)", },
+	{ 0x575,  0xd24, "Cortex-M52 Debug",           "(Debug Unit)", },
 };
 
 static const struct dap_part_nums *pidr_to_part_num(unsigned int designer_id, unsigned int part_num)