[CPU] Optimize DQ FC with stack allocated aux accum registers

openvinotoolkit · Jan 22, 2025 · 0c6cff2 · 0c6cff2
1 parent a7ef4f8
commit 0c6cff2
Show file tree

Hide file tree

Showing 2 changed files with 1 addition and 6 deletions.
diff --git a/src/plugins/intel_cpu/src/nodes/executors/dnnl/dnnl_fullyconnected_primitive.cpp b/src/plugins/intel_cpu/src/nodes/executors/dnnl/dnnl_fullyconnected_primitive.cpp
@@ -169,11 +169,6 @@ static bool useDynamicQuantizationImpl(size_t dqGroupSize,
     if (zpPtr && !one_of(zpPtr->getDesc().getPrecision(), ov::element::u8, ov::element::u4, ov::element::undefined))
         return false;
 
-    // TODO: heuristic: disable avx2 asymmetric
-    bool is_asymmetric_weights = one_of(weightsDesc->getPrecision(), ov::element::u8, ov::element::u4);
-    if (is_asymmetric_weights && !dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx512_core_vnni))
-        return false;
-
     const size_t simdWidth = 16;
     if (dqGroupSize % simdWidth)
         return false;

diff --git a/src/plugins/intel_cpu/thirdparty/onednn b/src/plugins/intel_cpu/thirdparty/onednn
+0 −3		src/cpu/x64/brgemm/brgemm_utils.cpp
+15 −13		src/cpu/x64/brgemm/jit_brgemm_kernel.cpp
+0 −5		src/cpu/x64/jit_brgemm_inner_product_utils.cpp