Merge pull request #1387 from yanzhang-dev/yanzhang/bug-fix

Add misaligned memory access for spike.
riscv-collab · Dec 11, 2023 · 50d501a · 50d501a
2 parents ffe927a + 72a1fc0
commit 50d501a
Showing 1 changed file with 2 additions and 1 deletion.
diff --git a/scripts/wrapper/spike/riscv64-unknown-linux-gnu-run b/scripts/wrapper/spike/riscv64-unknown-linux-gnu-run
@@ -6,7 +6,8 @@ varch="$(march-to-cpu-opt --elf-file-path $1 --print-spike-varch)"
 
 isa_option="--isa=${isa}"
 varch_option=""
+memory_option="--misaligned"
 
 [[ ! -z ${varch} ]] && varch_option="--varch=${varch}"
 
-spike ${isa_option} ${varch_option} ${PK_PATH}/pk${xlen} "$@"
+spike ${memory_option} ${isa_option} ${varch_option} ${PK_PATH}/pk${xlen} "$@"