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Merge pull request #1233 from riscv-collab/attr-qemu
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Set qemu cpu option from ELF attribute
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kito-cheng authored May 13, 2023
2 parents 57699f1 + 5da0026 commit ac4e8dd
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Showing 3 changed files with 61 additions and 6 deletions.
5 changes: 2 additions & 3 deletions Makefile.in
Original file line number Diff line number Diff line change
Expand Up @@ -176,9 +176,8 @@ report-gdb: report-gdb-@default_target@

.PHONY: build-sim
ifeq ($(SIM),qemu)
QEMU_CPU=$(shell $(srcdir)/scripts/march-to-cpu-opt $(WITH_ARCH))
SIM_PATH:=$(srcdir)/scripts/wrapper/qemu
SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" RISC_V_SYSROOT="$(SYSROOT)" QEMU_CPU="$(QEMU_CPU)"
SIM_PATH:=$(srcdir)/scripts/wrapper/qemu:$(srcdir)/scripts
SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" RISC_V_SYSROOT="$(SYSROOT)"
SIM_STAMP:= stamps/build-qemu
else
ifeq ($(SIM),spike)
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58 changes: 57 additions & 1 deletion scripts/march-to-cpu-opt
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,9 @@
import argparse
import sys
import unittest
import elftools.elf.elffile
import elftools.elf.enums
import elftools.elf.sections

EXT_OPTS = {
"zba": "zba=true",
Expand All @@ -26,6 +29,8 @@ def parse_opt(argv):
parser = argparse.ArgumentParser()
parser.add_argument('-march', '--with-arch', type=str, dest='march')
parser.add_argument('-selftest', action='store_true')
parser.add_argument('--get-riscv-tag', type=str)
parser.add_argument('--get-elf-class', type=str)
opt = parser.parse_args()
return opt

Expand Down Expand Up @@ -156,12 +161,63 @@ class TestArchStringParse(unittest.TestCase):
def selftest():
unittest.main(argv=sys.argv[1:])

def open_elf(path):
try:
elffile = elftools.elf.elffile.ELFFile(open(path, 'rb'))
except elftools.common.exceptions.ELFError:
raise Exception("%s is not ELF file!" % path)
return elffile

def read_elf_class(path):
elffile = open_elf(path)
return elffile.elfclass

def read_arch_attr (path):
elffile = open_elf(path)

attr_sec = elffile.get_section_by_name(".riscv.attributes")
if attr_sec:
# pyelftools has support RISC-V attribute but not contain in any
# release yet, so use ARMAttributesSection for now...
xattr_section = \
elftools.elf.sections.ARMAttributesSection (
attr_sec.header,
attr_sec.name,
elffile)
for subsec in xattr_section.subsections:
for subsubsec in subsec.subsubsections:
for attr in subsubsec.iter_attributes():
val = attr.value
if (not isinstance(val, str)):
continue
pos32 = val.find("rv32")
pos64 = val.find("rv64")
# MAGIC WORKAROUND
# Some version of pyelftools has issue for parsing
# Tag number = 5, it will wrongly parse it become
# Tag number = 4 + 0x10 + 0x5
if (pos32 == 2) or (pos64 == 2):
val = val[2:]
# End of MAGIC WORKAROUND

if (pos32 != -1 or pos64 != -1):
return val
raise Exception("Not found ELF attribute in %s?" % path)

def main(argv):
opt = parse_opt(argv)
if opt.selftest:
selftest()
return 0
cpu_opt = conver_arch_to_qemu_cpu_opt(opt.march)
if (opt.get_elf_class):
elf_class = read_elf_class (opt.get_elf_class)
print (elf_class)
return
if (opt.get_riscv_tag):
march = read_arch_attr (opt.get_riscv_tag)
else:
march = opt.march
cpu_opt = conver_arch_to_qemu_cpu_opt(march)
print (cpu_opt)

if __name__ == '__main__':
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4 changes: 2 additions & 2 deletions scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,6 @@ do
shift
done

xlen="$(readelf -h $1 | grep 'Class' | cut -d: -f 2 | xargs echo | sed 's/^ELF//')"
xlen="$(march-to-cpu-opt --get-elf-class $1)"

QEMU_CPU=${QEMU_CPU} qemu-riscv$xlen -r 5.10 "${qemu_args[@]}" -L ${RISC_V_SYSROOT} "$@"
QEMU_CPU="$(march-to-cpu-opt --get-riscv-tag $1)" qemu-riscv$xlen -r 5.10 "${qemu_args[@]}" -L ${RISC_V_SYSROOT} "$@"

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