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Merge pull request #13 from LynnL4/master
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add support for seeedstudio Wio Lite Risc-V.
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@bitsk
bitsk authored Oct 10, 2019
2 parents 3246565 + 9f35295 commit e7e1d8a
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41 changes: 41 additions & 0 deletions boards.txt
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Expand Up @@ -83,3 +83,44 @@ eval.upload.tool=gdlink
eval.upload.maximum_size=65536
eval.build.ldscript={runtime.platform.path}/cores/arduino/GD32VF103_Firmware_Library/RISCV/env_Eclipse/GD32VF103xB.lds

###################################################
############# Seeed Wio Lite Risc-V ###############

wio_lite-risc-v.name=Wio Lite Risc-V

## VID PID
wio_lite-risc-v.build.vid=28e9
wio_lite-risc-v.build.pid=0189

## Toolchain
wio_lite-risc-v.menu.toolsloc.default=Default
wio_lite-risc-v.menu.toolsloc.default.compiler.path={runtime.tools.riscv-nuclei-elf-gcc.path}/bin/

## CPU Clock
wio_lite-risc-v.menu.clksrc.108=108MHz CPU Clock Frequency
wio_lite-risc-v.menu.clksrc.108.build.f_cpu=108000000L

## Burn baud rate
wio_lite-risc-v.menu.burn_baudrate.115200=115200 bps
wio_lite-risc-v.menu.burn_baudrate.115200.build.burn_baudrate=115200

## HXTAL freq value
wio_lite-risc-v.build.hxtal_value=8000000UL

## Point to the file for ./variants/<variant>/pins_arduino.h
wio_lite-risc-v.build.variant=wio_lite_risc-v

## "The 'core' file directory for this board, in ./cores
wio_lite-risc-v.build.core=arduino

## This sets a define for use in the compiled code.
wio_lite-risc-v.build.board=BOARD_WIO_LITE_RISC-V
wio_lite-risc-v.build.sdata.size=512

## This selects the tool from "programmers.txt"
wio_lite-risc-v.program.tool=serial
wio_lite-risc-v.upload.tool=serial

wio_lite-risc-v.upload.maximum_size=65536
wio_lite-risc-v.build.ldscript={runtime.platform.path}/cores/arduino/GD32VF103_Firmware_Library/RISCV/env_Eclipse/GD32VF103xB.lds

192 changes: 192 additions & 0 deletions variants/wio_lite_risc-v/pins_arduino.c
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#include "pins_arduino.h"

#include "gd32vf103_libopt.h"



gpio_dev_t gpioa = {
.gpio_port = GPIOA,
.clk_id = RCU_GPIOA,
};

gpio_dev_t * const GPIO_A = &gpioa;

gpio_dev_t gpiob = {
.gpio_port = GPIOB,
.clk_id = RCU_GPIOB,
};

gpio_dev_t * const GPIO_B = &gpiob;

gpio_dev_t gpioc = {
.gpio_port = GPIOC,
.clk_id = RCU_GPIOC,
};

gpio_dev_t * const GPIO_C = &gpioc;

gpio_dev_t gpiod = {
.gpio_port = GPIOD,
.clk_id = RCU_GPIOD,
};

gpio_dev_t * const GPIO_D = &gpiod;

gpio_dev_t gpioe = {
.gpio_port = GPIOE,
.clk_id = RCU_GPIOE,
};
gpio_dev_t * const GPIO_E = &gpioe;

adc_dev_t adc0 = {
.adc_dev = ADC0,
.clk_id = RCU_ADC0,
};
adc_dev_t * const ADC_0 = &adc0;

// TODO: add timer remap descriptor

timer_dev_t timer0 = {
.timer_dev = TIMER0,
.clk_id = RCU_TIMER0,
};
timer_dev_t * const TIMER_0 = &timer0;

timer_dev_t timer1 = {
.timer_dev = TIMER1,
.clk_id = RCU_TIMER1,
};
timer_dev_t * const TIMER_1 = &timer1;

timer_dev_t timer2 = {
.timer_dev = TIMER2,
.clk_id = RCU_TIMER2,
};
timer_dev_t * const TIMER_2 = &timer2;

timer_dev_t timer3 = {
.timer_dev = TIMER3,
.clk_id = RCU_TIMER3,
};
timer_dev_t * const TIMER_3 = &timer3;

timer_dev_t timer4 = {
.timer_dev = TIMER4,
.clk_id = RCU_TIMER4,
};
timer_dev_t * const TIMER_4 = &timer4;

spi_dev_t spi0 = {
.spi_dev = SPI0,
.clk_id = RCU_SPI0,
};
spi_dev_t * const SPI_0 = &spi0;

spi_dev_t spi1 = {
.spi_dev = SPI1,
.clk_id = RCU_SPI1,
};
spi_dev_t * const SPI_1 = &spi1;

spi_dev_t spi2 = {
.spi_dev = SPI2,
.clk_id = RCU_SPI2,
};
spi_dev_t * const SPI_2 = &spi2;

const gd32v_pin_info_t PIN_MAP[VARIANT_GPIO_NUM] = {
/*
gpio_dev *gpio_device; GPIO device
timer_dev *timer_device; Pin's timer device, if any.
const adc_dev *adc_device; ADC device, if any.
uint8 gpio_bit; Pin's GPIO port bit.
uint8 timer_channel; Timer channel, or 0 if none.
uint8 adc_channel; Pin ADC channel, or ADCx if none.
*/
{&gpioa, &timer1, &adc0, 0, 0, 0, 0, EXTI0_IRQn}, /* PA0 */
{&gpioa, &timer1, &adc0, 0, 1, 1, 1, EXTI1_IRQn}, /* PA1 */
{&gpioa, &timer1, &adc0, 0, 2, 2, 2, EXTI2_IRQn}, /* PA2 */
{&gpioa, &timer1, &adc0, 0, 3, 3, 3, EXTI3_IRQn}, /* PA3 */
{&gpioa, 0, &adc0, &spi0, 4, 0, 4, EXTI4_IRQn}, /* PA4 */
{&gpioa, 0, &adc0, &spi0, 5, 0, 5, EXTI5_9_IRQn}, /* PA5 */
{&gpioa, &timer2, &adc0, &spi0, 6, 0, 6, EXTI5_9_IRQn}, /* PA6 */
{&gpioa, &timer2, &adc0, &spi0, 7, 1, 7, EXTI5_9_IRQn}, /* PA7 */
{&gpioa, &timer0, 0, 0, 8, 0, 0, EXTI5_9_IRQn}, /* PA8 */
{&gpioa, &timer0, 0, 0, 9, 1, 0, EXTI5_9_IRQn}, /* PA9 */
{&gpioa, &timer0, 0, 0, 10, 2, 0, EXTI10_15_IRQn}, /* PA10 */
{&gpioa, &timer0, 0, 0, 11, 3, 0, EXTI10_15_IRQn}, /* PA11 */
{&gpioa, 0, 0, 0, 12, 0, 0, EXTI10_15_IRQn}, /* PA12 */
{&gpioa, 0, 0, 0, 13, 0, 0, EXTI10_15_IRQn}, /* PA13 */
{&gpioa, 0, 0, 0, 14, 0, 0, EXTI10_15_IRQn}, /* PA14 */
{&gpioa, 0, 0, &spi2, 15, 0, 0, EXTI10_15_IRQn}, /* PA15 */

{&gpiob, &timer2, &adc0, 0, 0, 2, 8, EXTI0_IRQn}, /* PB0 */
{&gpiob, &timer2, &adc0, 0, 1, 3, 9, EXTI1_IRQn}, /* PB1 */
{&gpiob, 0, 0, 0, 2, 0, 0, EXTI2_IRQn}, /* PB2 */
{&gpiob, 0, 0, &spi2, 3, 0, 0, EXTI3_IRQn}, /* PB3 */
{&gpiob, 0, 0, &spi2, 4, 0, 0, EXTI4_IRQn}, /* PB4 */
{&gpiob, 0, 0, &spi2, 5, 0, 0, EXTI5_9_IRQn}, /* PB5 */
{&gpiob, &timer3, 0, 0, 6, 0, 0, EXTI5_9_IRQn}, /* PB6 */
{&gpiob, &timer3, 0, 0, 7, 1, 0, EXTI5_9_IRQn}, /* PB7 */
{&gpiob, &timer3, 0, 0, 8, 2, 0, EXTI5_9_IRQn}, /* PB8 */
{&gpiob, &timer3, 0, 0, 9, 3, 0, EXTI5_9_IRQn}, /* PB9 */
{&gpiob, 0, 0, 0, 10, 0, 0, EXTI10_15_IRQn}, /* PB10 */
{&gpiob, 0, 0, 0, 11, 0, 0, EXTI10_15_IRQn}, /* PB11 */
{&gpiob, 0, 0, &spi1, 12, 0, 0, EXTI10_15_IRQn}, /* PB12 */
{&gpiob, 0, 0, &spi1, 13, 0, 0, EXTI10_15_IRQn}, /* PB13 */
{&gpiob, 0, 0, &spi1, 14, 0, 0, EXTI10_15_IRQn}, /* PB14 */
{&gpiob, 0, 0, &spi1, 15, 0, 0, EXTI10_15_IRQn}, /* PB15 */

{&gpioc, 0, &adc0, 0, 0, 0, 10, EXTI0_IRQn}, /* PC0 */
{&gpioc, 0, &adc0, 0, 1, 0, 11, EXTI1_IRQn}, /* PC1 */
{&gpioc, 0, &adc0, 0, 2, 0, 12, EXTI2_IRQn}, /* PC2 */
{&gpioc, 0, &adc0, 0, 3, 0, 13, EXTI3_IRQn}, /* PC3 */
{&gpioc, 0, &adc0, 0, 4, 0, 14, EXTI4_IRQn}, /* PC4 */
{&gpioc, 0, &adc0, 0, 5, 0, 15, EXTI5_9_IRQn}, /* PC5 */
{&gpioc, 0, 0, 0, 6, 0, 0, EXTI5_9_IRQn}, /* PC6 */
{&gpioc, 0, 0, 0, 7, 0, 0, EXTI5_9_IRQn}, /* PC7 */
{&gpioc, 0, 0, 0, 8, 0, 0, EXTI5_9_IRQn}, /* PC8 */
{&gpioc, 0, 0, 0, 9, 0, 0, EXTI5_9_IRQn}, /* PC9 */
{&gpioc, 0, 0, 0, 10, 0, 0, EXTI10_15_IRQn}, /* PC10 */
{&gpioc, 0, 0, 0, 11, 0, 0, EXTI10_15_IRQn}, /* PC11 */
{&gpioc, 0, 0, 0, 12, 0, 0, EXTI10_15_IRQn}, /* PC12 */
{&gpioc, 0, 0, 0, 13, 0, 0, EXTI10_15_IRQn}, /* PC13 */
{&gpioc, 0, 0, 0, 14, 0, 0, EXTI10_15_IRQn}, /* PC14 */
{&gpioc, 0, 0, 0, 15, 0, 0, EXTI10_15_IRQn}, /* PC15 */

{&gpiod, 0, 0, 0, 0, 0, 0, EXTI0_IRQn}, /* PD0 */
{&gpiod, 0, 0, 0, 1, 0, 0, EXTI1_IRQn}, /* PD1 */
{&gpiod, 0, 0, 0, 2, 0, 0, EXTI2_IRQn}, /* PD2 */
{&gpiod, 0, 0, 0, 3, 0, 0, EXTI3_IRQn}, /* PD3 */
{&gpiod, 0, 0, 0, 4, 0, 0, EXTI4_IRQn}, /* PD4 */
{&gpiod, 0, 0, 0, 5, 0, 0, EXTI5_9_IRQn}, /* PD5 */
{&gpiod, 0, 0, 0, 6, 0, 0, EXTI5_9_IRQn}, /* PD6 */
{&gpiod, 0, 0, 0, 7, 0, 0, EXTI5_9_IRQn}, /* PD7 */
{&gpiod, 0, 0, 0, 8, 0, 0, EXTI5_9_IRQn}, /* PD8 */
{&gpiod, 0, 0, 0, 9, 0, 0, EXTI5_9_IRQn}, /* PD9 */
{&gpiod, 0, 0, 0, 10, 0, 0, EXTI10_15_IRQn}, /* PD10 */
{&gpiod, 0, 0, 0, 11, 0, 0, EXTI10_15_IRQn}, /* PD11 */
{&gpiod, 0, 0, 0, 12, 0, 0, EXTI10_15_IRQn}, /* PD12 */
{&gpiod, 0, 0, 0, 13, 0, 0, EXTI10_15_IRQn}, /* PD13 */
{&gpiod, 0, 0, 0, 14, 0, 0, EXTI10_15_IRQn}, /* PD14 */
{&gpiod, 0, 0, 0, 15, 0, 0, EXTI10_15_IRQn}, /* PD15 */

{&gpioe, 0, 0, 0, 0, 0, 0, EXTI0_IRQn}, /* PE0 */
{&gpioe, 0, 0, 0, 1, 0, 0, EXTI1_IRQn}, /* PE1 */
{&gpioe, 0, 0, 0, 2, 0, 0, EXTI2_IRQn}, /* PE2 */
{&gpioe, 0, 0, 0, 3, 0, 0, EXTI3_IRQn}, /* PE3 */
{&gpioe, 0, 0, 0, 4, 0, 0, EXTI4_IRQn}, /* PE4 */
{&gpioe, 0, 0, 0, 5, 0, 0, EXTI5_9_IRQn}, /* PE5 */
{&gpioe, 0, 0, 0, 6, 0, 0, EXTI5_9_IRQn}, /* PE6 */
{&gpioe, 0, 0, 0, 7, 0, 0, EXTI5_9_IRQn}, /* PE7 */
{&gpioe, 0, 0, 0, 8, 0, 0, EXTI5_9_IRQn}, /* PE8 */
{&gpioe, 0, 0, 0, 9, 0, 0, EXTI5_9_IRQn}, /* PE9 */
{&gpioe, 0, 0, 0, 10, 0, 0, EXTI10_15_IRQn}, /* PE10 */
{&gpioe, 0, 0, 0, 11, 0, 0, EXTI10_15_IRQn}, /* PE11 */
{&gpioe, 0, 0, 0, 12, 0, 0, EXTI10_15_IRQn}, /* PE12 */
{&gpioe, 0, 0, 0, 13, 0, 0, EXTI10_15_IRQn}, /* PE13 */
{&gpioe, 0, 0, 0, 14, 0, 0, EXTI10_15_IRQn}, /* PE14 */
{&gpioe, 0, 0, 0, 15, 0, 0, EXTI10_15_IRQn}, /* PE15 */
};


84 changes: 84 additions & 0 deletions variants/wio_lite_risc-v/pins_arduino.h
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#ifndef _VARIANT_SIPEED_LONGAN_NANO
#define _VARIANT_SIPEED_LONGAN_NANO

#include "Arduino.h"
#include "gd32vf103.h"
#include "gd32vf103_libopt.h"

/* BOARD PIN DEFINE */

/* LEDs */
#define LED_BUILTIN PA8


#ifdef __cplusplus
extern "C" {
#endif

/* Pin aliases: these give the GPIO port/bit for each pin as an
* enum. These are optional, but recommended. They make it easier to
* write code using low-level GPIO functionality. */
enum {
PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PA8,PA9,PA10,PA11,PA12,PA13,PA14,PA15,
PB0,PB1,PB2,PB3,PB4,PB5,PB6,PB7,PB8,PB9,PB10,PB11,PB12,PB13,PB14,PB15,
PC0,PC1,PC2,PC3,PC4,PC5,PC6,PC7,PC8,PC9,PC10,PC11,PC12,PC13,PC14,PC15,
PD0,PD1,PD2,PD3,PD4,PD5,PD6,PD7,PD8,PD9,PD10,PD11,PD12,PD13,PD14,PD15,
PE0,PE1,PE2,PE3,PE4,PE5,PE6,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15,
};

typedef struct _gpio_dev_t
{
uint32_t gpio_port;
rcu_periph_enum clk_id;

}gpio_dev_t;

typedef struct _adc_dev_t
{
uint32_t adc_dev;
rcu_periph_enum clk_id;

}adc_dev_t;

typedef struct _timer_dev_t {
uint32_t timer_dev;
rcu_periph_enum clk_id;
}timer_dev_t;

typedef struct _spi_dev_t {
uint32_t spi_dev;
rcu_periph_enum clk_id;
}spi_dev_t;

typedef struct _gd32v_pin_info_t
{
gpio_dev_t * gpio_device;
timer_dev_t * timer_device;
adc_dev_t * adc_device;
spi_dev_t * spi_device;
uint8_t gpio_bit;
uint8_t timer_channel;
uint8_t adc_channel;
IRQn_Type irqn;
} gd32v_pin_info_t;

#define VARIANT_GPIO_NUM (80)

extern const gd32v_pin_info_t PIN_MAP[VARIANT_GPIO_NUM];

#define digitalPinToPort(p) ((PIN_MAP[p].gpio_device)->gpio_port)
#define digitalPinToBitMask(p) (BIT(PIN_MAP[p].gpio_bit))
#define digitalPinToClkid(p) (PIN_MAP[p].gpio_device->clk_id)

#define digitalPinSPIAvailiable(p) (PIN_MAP[p].spi_device != 0)
#define digitalPinToSPIDevice(p) (PIN_MAP[p].spi_device->spi_dev)
#define digitalPinToSPIClockId(p) (PIN_MAP[p].spi_device->clk_id)


#define VARIANT_GPIO_OSPEED GPIO_OSPEED_50MHZ //

#ifdef __cplusplus
}
#endif

#endif

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