Fix comp_w_dac example

examples/comp_w_dac.rs

@@ -7,6 +7,7 @@ mod utils;
 extern crate cortex_m_rt as rt;
 
 use rt::entry;
+use stm32g4xx_hal::observable::Observable;
 
 #[entry]
 fn main() -> ! {
@@ -30,15 +31,16 @@ fn main() -> ! {
     // Set up DAC to output to pa4 and to internal signal Dac1IntSig1
     // which just so happens is compatible with comp1
     let dac1ch1 = dp.DAC1.constrain((gpioa.pa4, Dac1IntSig1), &mut rcc);
-    let mut dac = dac1ch1.calibrate_buffer(&mut delay).enable();
+    let dac = dac1ch1.calibrate_buffer(&mut delay).enable();
+    let (mut dac, [dac_token]) = dac.observe();
 
     let (comp1, _comp2, ..) = dp.COMP.split(&mut rcc);
     let pa1 = gpioa.pa1.into_analog();
 
     // Set up comparator with pa1 as positive, and the DAC as negative input
     let comp = comp1.comparator(
-        &pa1,
-        &dac,
+        pa1,
+        dac_token,
         comparator::Config::default().hysteresis(comparator::Hysteresis::None),
         &rcc.clocks,
     );
@@ -59,7 +61,7 @@ fn main() -> ! {
     // * 0V   at p1 =>   0% duty
     // * VDDA at p1 => 100% duty
     loop {
-        dac.set_value(val);
+        dac.as_mut().set_value(val);
         match val {
             0 => dir = Direction::Upcounting,
             4095 => dir = Direction::Downcounting,

src/comparator.rs

@@ -148,12 +148,12 @@ pub trait PositiveInput<C> {
 pub trait NegativeInput<C> {
     /// Does this input use the internal reference Vrefint
     ///
-    /// This only true for RefintInput
+    /// This only true for [`RefintInput`]
     const USE_VREFINT: bool;
 
     /// Does this input rely on dividing Vrefint using an internal resistor divider
     ///
-    /// This is only relevant for `RefintInput` other than `RefintInput::VRefint`
+    /// This is only relevant for [`RefintInput`] other than [`refint_input::VRefint`]
     const USE_RESISTOR_DIVIDER: bool = false;
 
     fn setup(comp: &mut C);
@@ -307,7 +307,7 @@ refint_input!(COMP5, COMP6, COMP7,);
 
 macro_rules! dac_input_helper {
     ($COMP:ident: $channel:ident, $MODE:ident, $bits:expr) => {
-        impl<ED> NegativeInput<$COMP> for &dac::$channel<{ dac::$MODE }, ED> {
+        impl<ED> NegativeInput<$COMP> for dac::$channel<{ dac::$MODE }, ED> {
             const USE_VREFINT: bool = false;
 
             fn setup(comp: &mut $COMP) {

src/dac.rs

@@ -218,6 +218,9 @@ macro_rules! dac_helper {
                 }
             }
 
+            impl<const MODE_BITS: u8, ED> crate::Sealed for $CX<MODE_BITS, ED> { }
+            impl<const MODE_BITS: u8, ED> crate::observable::Observable for $CX<MODE_BITS, ED> { }
+
             impl<const MODE_BITS: u8, ED> $CX<MODE_BITS, ED> {
                 /// Calibrate the DAC output buffer by performing a "User
                 /// trimming" operation. It is useful when the VDDA/VREF+