Hrtim5

.github/workflows/ci.yml

@@ -22,8 +22,8 @@ jobs:
           - stm32g474
           - stm32g483
           - stm32g484
-          #- stm32g491 # Does not seem ready yet
-          #- stm32g4a1 # Does not seem ready yet
+          - stm32g491 # Does not seem ready yet
+          - stm32g4a1 # Does not seem ready yet
         features:
           - log-rtt,defmt
           # TODO: -log-rtt # log-rtt without defmt, more combos?

Cargo.toml

@@ -13,14 +13,16 @@ version = "0.0.2"
 
 [dependencies]
 nb = "0.1.1"
-stm32g4 = "0.15.1"
+#stm32g4 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies" } #"0.15.1"
+stm32g4 = { version = "0.17.0", package = "stm32g4-staging" }
 paste = "1.0"
 bitflags = "1.2"
 vcell = "0.1"
 static_assertions = "1.1"
 fugit = "0.3.5"
 stm32-usbd = { version = "0.7.0", optional = true }
 fixed = { version = "1.28.0", optional = true }
+embedded-io = "0.6.1"
 
 [dependencies.cortex-m]
 version = "0.7.7"
@@ -85,11 +87,12 @@ stm32g431 = ["stm32g4/stm32g431"]
 stm32g441 = ["stm32g4/stm32g441"]
 stm32g471 = ["stm32g4/stm32g471"]
 stm32g473 = ["stm32g4/stm32g473"]
-stm32g474 = ["stm32g4/stm32g474"]
+stm32g474 = ["stm32g4/stm32g474", "hrtim"]
 stm32g483 = ["stm32g4/stm32g483"]
-stm32g484 = ["stm32g4/stm32g484"]
+stm32g484 = ["stm32g4/stm32g484", "hrtim"]
 stm32g491 = ["stm32g4/stm32g491"]
 stm32g4a1 = ["stm32g4/stm32g4a1"]
+hrtim = []
 log-itm = ["cortex-m-log/itm"]
 log-rtt = []
 log-semihost = ["cortex-m-log/semihosting"]
@@ -119,3 +122,43 @@ required-features = ["usb"]
 [[example]]
 name = "cordic"
 required-features = ["cordic"]
+
+[[example]]
+name = "hrtim-adc-trigger"
+required-features = ["hrtim"]
+path = "examples/hrtim/adc-trigger.rs"
+
+[[example]]
+name = "hrtim-capture"
+required-features = ["hrtim"]
+path = "examples/hrtim/capture.rs"
+
+[[example]]
+name = "hrtim-eev-comp"
+required-features = ["hrtim"]
+path = "examples/hrtim/eev-comp.rs"
+
+[[example]]
+name = "hrtim-eev"
+required-features = ["hrtim"]
+path = "examples/hrtim/eev.rs"
+
+[[example]]
+name = "hrtim-flt-comp"
+required-features = ["hrtim"]
+path = "examples/hrtim/flt-comp.rs"
+
+[[example]]
+name = "hrtim-flt"
+required-features = ["hrtim"]
+path = "examples/hrtim/flt.rs"
+
+[[example]]
+name = "hrtim"
+required-features = ["hrtim"]
+path = "examples/hrtim/hrtim.rs"
+
+[[example]]
+name = "hrtim-master"
+required-features = ["hrtim"]
+path = "examples/hrtim/master.rs"

examples/adc-one-shot.rs

@@ -13,7 +13,7 @@ use stm32g4xx_hal as hal;
 
 use cortex_m_rt::entry;
 
-use log::info;
+use utils::logger::info;
 
 #[macro_use]
 mod utils;

examples/flash_with_rtic.rs

@@ -73,7 +73,7 @@ mod app {
 
         unsafe {
             let mut flash = &(*stm32g4xx_hal::stm32::FLASH::ptr());
-            flash.acr.modify(|_, w| {
+            flash.acr().modify(|_, w| {
                 w.latency().bits(0b1000) // 8 wait states
             });
         }

examples/hrtim/adc-trigger.rs

@@ -0,0 +1,157 @@
+#![no_std]
+#![no_main]
+
+/// Example showcasing the use of the HRTIM peripheral to trigger the ADC at various points of the switch cycle off HRTIM_TIMA
+
+#[path = "../utils/mod.rs"]
+mod utils;
+
+use cortex_m_rt::entry;
+use utils::logger::info;
+
+#[entry]
+fn main() -> ! {
+    use hal::adc;
+    use stm32g4xx_hal as hal;
+
+    use hal::{
+        adc::{
+            config::{Continuous, Dma as AdcDma, SampleTime, Sequence},
+            AdcClaim, ClockSource, Temperature, Vref,
+        },
+        delay::SYSTDelayExt,
+        dma::{self, config::DmaConfig, stream::DMAExt, TransferExt},
+        gpio::GpioExt,
+        hrtim::compare_register::HrCompareRegister,
+        hrtim::control::HrControltExt,
+        hrtim::output::HrOutput,
+        hrtim::timer::HrTimer,
+        hrtim::HrPwmAdvExt,
+        hrtim::Pscl4,
+        pwr::PwrExt,
+        rcc::{self, RccExt},
+        stm32::Peripherals,
+    };
+
+    const VREF: f32 = 3.3;
+
+    info!("start");
+
+    let dp = Peripherals::take().unwrap();
+    let cp = cortex_m::Peripherals::take().expect("cannot take core peripherals");
+
+    // Set system frequency to 16MHz * 15/1/2 = 120MHz
+    // This would lead to HrTim running at 120MHz * 32 = 3.84...
+    info!("rcc");
+    let pwr = dp.PWR.constrain().freeze();
+    let mut rcc = dp.RCC.freeze(
+        rcc::Config::pll().pll_cfg(rcc::PllConfig {
+            mux: rcc::PllSrc::HSI,
+            n: rcc::PllNMul::MUL_15,
+            m: rcc::PllMDiv::DIV_1,
+            r: Some(rcc::PllRDiv::DIV_2),
+
+            ..Default::default()
+        }),
+        pwr,
+    );
+
+    let mut delay = cp.SYST.delay(&rcc.clocks);
+
+    let dma::stream::StreamsTuple(dma1ch1, ..) = dp.DMA1.split(&rcc);
+    let config = DmaConfig::default()
+        .transfer_complete_interrupt(true)
+        .circular_buffer(true)
+        .memory_increment(true);
+
+    info!("Setup Gpio");
+    let gpioa = dp.GPIOA.split(&mut rcc);
+    let pa0 = gpioa.pa0.into_analog();
+
+    let pin_a = gpioa.pa8;
+    let pin_b = gpioa.pa9;
+
+    // ...with a prescaler of 4 this gives us a HrTimer with a tick rate of 960MHz
+    // With max the max period set, this would be 960MHz/2^16 ~= 15kHz...
+    let prescaler = Pscl4;
+
+    //        .               .
+    //        .  50%          .
+    //         ------          ------
+    //out1    |      |        |      |
+    //        |      |        |      |
+    // --------      ----------      --------
+    //        .    ^     ^
+    //        .    |     |
+    //AD samlp    pa0   temp
+    let period = 0xFFFF;
+    let (hr_control, ..) = dp.HRTIM_COMMON.hr_control(&mut rcc).wait_for_calibration();
+    let mut hr_control = hr_control.constrain();
+    let (mut timer, (mut cr1, _cr2, mut cr3, mut cr4), (mut out1, mut out2), ..) = dp
+        .HRTIM_TIMA
+        .pwm_advanced((pin_a, pin_b), &mut rcc)
+        .prescaler(prescaler)
+        .period(period)
+        .finalize(&mut hr_control);
+
+    cr1.set_duty(period / 2);
+    cr3.set_duty(period / 3);
+    cr4.set_duty((2 * u32::from(period) / 3) as u16);
+
+    hr_control.adc_trigger1.enable_source(&cr3);
+    hr_control.adc_trigger1.enable_source(&cr4);
+
+    out1.enable_rst_event(&cr1); // Set low on compare match with cr1
+    out2.enable_rst_event(&cr1);
+
+    out1.enable_set_event(&timer); // Set high at new period
+    out2.enable_set_event(&timer);
+
+    info!("Setup Adc1");
+    let mut adc = dp
+        .ADC1
+        .claim(ClockSource::SystemClock, &rcc, &mut delay, true);
+
+    adc.set_external_trigger((
+        adc::config::TriggerMode::RisingEdge,
+        &hr_control.adc_trigger1,
+    ));
+    adc.enable_temperature(&dp.ADC12_COMMON);
+    adc.set_continuous(Continuous::Discontinuous);
+    adc.reset_sequence();
+    adc.configure_channel(&pa0, Sequence::One, SampleTime::Cycles_640_5);
+    adc.configure_channel(&Temperature, Sequence::Two, SampleTime::Cycles_640_5);
+
+    info!("Setup DMA");
+    let first_buffer = cortex_m::singleton!(: [u16; 10] = [0; 10]).unwrap();
+
+    let mut transfer = dma1ch1.into_circ_peripheral_to_memory_transfer(
+        adc.enable_dma(AdcDma::Continuous),
+        &mut first_buffer[..],
+        config,
+    );
+
+    transfer.start(|adc| adc.start_conversion());
+
+    out1.enable();
+    out2.enable();
+
+    timer.start(&mut hr_control.control);
+
+    loop {
+        let mut b = [0_u16; 4];
+        let r = transfer.read_exact(&mut b);
+
+        info!("read: {}", r);
+        assert!(r == b.len());
+
+        let millivolts = Vref::sample_to_millivolts((b[0] + b[2]) / 2);
+        info!("pa3: {}mV", millivolts);
+        let temp = Temperature::temperature_to_degrees_centigrade(
+            (b[1] + b[3]) / 2,
+            VREF,
+            adc::config::Resolution::Twelve,
+        );
+        info!("temp: {}℃C", temp);
+    }
+}

examples/hrtim/capture-dma.rs

@@ -0,0 +1,130 @@
+#![no_std]
+#![no_main]
+
+/// Example showcasing the use of the HRTIM peripheral's capture function to detect phase shift between a digital event and the output of HRTIM_TIMA
+
+#[path = "../utils/mod.rs"]
+mod utils;
+
+use cortex_m_rt::entry;
+use utils::logger::info;
+
+#[entry]
+fn main() -> ! {
+    use stm32g4xx_hal as hal;
+
+    use hal::{
+        dma::{config::DmaConfig, stream::DMAExt, TransferExt},
+        gpio::{GpioExt, AF13},
+        hrtim::{
+            capture, compare_register::HrCompareRegister, control::HrControltExt, external_event,
+            external_event::ToExternalEventSource, output::HrOutput, timer::HrSlaveTimerCpt,
+            timer::HrTimer, HrPwmAdvExt, Pscl128,
+        },
+        pwr::PwrExt,
+        rcc::{self, RccExt},
+        stm32::Peripherals,
+    };
+    use info;
+
+    info!("start");
+
+    let dp = Peripherals::take().unwrap();
+
+    // Set system frequency to 16MHz * 15/1/2 = 120MHz
+    // This would lead to HrTim running at 120MHz * 32 = 3.84...
+    info!("rcc");
+    let pwr = dp.PWR.constrain().freeze();
+    let mut rcc = dp.RCC.freeze(
+        rcc::Config::pll().pll_cfg(rcc::PllConfig {
+            mux: rcc::PLLSrc::HSI,
+            n: rcc::PllNMul::MUL_15,
+            m: rcc::PllMDiv::DIV_1,
+            r: Some(rcc::PllRDiv::DIV_2),
+
+            ..Default::default()
+        }),
+        pwr,
+    );
+
+    info!("Setup Gpio");
+    let gpioa = dp.GPIOA.split(&mut rcc);
+    let gpiob = dp.GPIOB.split(&mut rcc);
+
+    // PA8 (D7 on Nucleo G474RE)
+    let pin_a = gpioa.pa8;
+
+    // PB5 (D4 on Nucleo G474RE)
+    let input = gpiob.pb5.into_pull_down_input();
+
+    // ...with a prescaler of 128 this gives us a HrTimer with a tick rate of 30MHz
+    // With max the max period set, this would be 30MHz/2^16 ~= 458Hz...
+    let prescaler = Pscl128;
+
+    //        t1     t2       .
+    //        |      |        .
+    //        v      v        .
+    //        .               .
+    //        .  50%          .
+    //         ------          ------
+    //out1    |      |        |      |
+    //        |      |        |      |
+    // --------      ----------      --------
+    let period = 0xFFFF;
+    let (mut hr_control, _flt_inputs, eev_inputs) =
+        dp.HRTIM_COMMON.hr_control(&mut rcc).wait_for_calibration();
+
+    let eev_input6 = eev_inputs
+        .eev_input6
+        .bind(input)
+        .edge_or_polarity(external_event::EdgeOrPolarity::Edge(
+            external_event::Edge::Both,
+        ))
+        .finalize(&mut hr_control);
+
+    let mut hr_control = hr_control.constrain();
+    let (timer, (mut cr1, _cr2, _cr3, _cr4), mut out1, dma_ch) = dp
+        .HRTIM_TIMA
+        .pwm_advanced(pin_a, &mut rcc)
+        .prescaler(prescaler)
+        .period(period)
+        .finalize(&mut hr_control);
+    out1.enable_rst_event(&cr1); // Set low on compare match with cr1
+    out1.enable_set_event(&timer); // Set high at new period
+    cr1.set_duty(period / 2);
+
+    let (mut timer, mut capture, _capture_ch2) = timer.split_capture();
+    timer.start(&mut hr_control.control);
+    out1.enable();
+
+    capture.enable_interrupt(true, &mut hr_control);
+    capture.add_event(&eev_input6);
+
+    info!("Setup DMA");
+    let streams = dp.DMA1.split(&rcc);
+    let config = DmaConfig::default()
+        .transfer_complete_interrupt(false)
+        .circular_buffer(true)
+        .memory_increment(true);
+
+    let first_buffer = cortex_m::singleton!(: [u32; 16] = [0; 16]).unwrap();
+    let mut transfer = streams.0.into_circ_peripheral_to_memory_transfer(
+        capture.enable_dma(dma_ch),
+        &mut first_buffer[..],
+        config,
+    );
+
+    transfer.start(|_| ());
+
+    let mut old_duty = 0;
+    loop {
+        for duty in (u32::from(period) / 10)..(9 * u32::from(period) / 10) {
+            let mut data = [0; 2];
+            transfer.read_exact(&mut data);
+            let [t1, t2] = data.map(capture::dma_value_to_signed);
+            cr1.set_duty(duty as u16);
+            info!("Capture: t1: {}, t2: {}, duty: {}, ", t1, t2, old_duty);
+            old_duty = duty;
+        }
+    }
+}