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Adds DMA implementation #48

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25df5e9
Started implementation of DMA stream
Jan561 Dec 11, 2019
509ab48
Implemented dma stream config checks
Jan561 Dec 12, 2019
064cce9
Using type Infallible for Errors that wont occur.
Jan561 Dec 12, 2019
71b3b5b
Fixed stream config check
Jan561 Dec 12, 2019
f85576f
Started implementation of DmaMux and implemented its config
Jan561 Dec 12, 2019
c679d3f
Implemented Isr for Dma mux
Jan561 Dec 12, 2019
7ccafab
Fixed state machine of dma mux
Jan561 Dec 14, 2019
6475211
Changed my email address in cargo.toml
Jan561 Dec 14, 2019
f58c273
Minor improvements
Jan561 Dec 14, 2019
7a2edd1
Implemented config for dma request generator
Jan561 Dec 14, 2019
0a4242f
Implemented enable / disable method for DMA Request generator
Jan561 Dec 14, 2019
1046e45
Replaced static with static mut references to justify unsafe sync imp…
Jan561 Dec 14, 2019
168a74a
Implemented isr of dma mux
Jan561 Dec 14, 2019
82ca7b7
Bit of reworkk
Jan561 Dec 15, 2019
fb3c958
Implemented default values for config types
Jan561 Dec 15, 2019
fb178af
Implemented dma stream config check for ndt register
Jan561 Dec 15, 2019
0696ebe
Added DMA channel struct as a wrapper for the stream and it's mux cha…
Jan561 Dec 15, 2019
c269d65
minor changes
Jan561 Dec 15, 2019
84181e9
Started implementation of DMA safe transfer
Jan561 Dec 15, 2019
998ef6a
Reimplemented all kinds of buffers
Jan561 Dec 16, 2019
8f0d9b0
Implemented buffer enums
Jan561 Dec 16, 2019
4d761da
Added lifetime to buffer types for more flexibility
Jan561 Dec 17, 2019
b0442cf
Fixed WordOffsetMut Buffer
Jan561 Dec 17, 2019
1132792
minor changes
Jan561 Dec 17, 2019
a0911be
Implemented unwrap methods for buffer enums
Jan561 Dec 17, 2019
4caa092
implemented as_immutable methods for buffers
Jan561 Dec 17, 2019
ae105e8
Implemented stream configuration for safe transfer
Jan561 Dec 18, 2019
774a413
Configuring m_size and p_size now
Jan561 Dec 18, 2019
f5e69aa
Implemented secure transfer
Jan561 Dec 18, 2019
af64d65
Improved safe transfer safety
Jan561 Dec 20, 2019
b082c1f
Pre-PR-commit
Jan561 Dec 20, 2019
aa429d2
Removed idea files
Jan561 Dec 20, 2019
47497fb
Removed manual implementation of Send where possible
Jan561 Dec 21, 2019
942b97a
Implemented missing setters for interrupt configuration for dma stream
Jan561 Dec 21, 2019
f6a9a6a
Added setters to the safe transfers to allow stream interrupt configu…
Jan561 Dec 21, 2019
c49226c
Added check of stream compatibility for double buffer transfers
Jan561 Dec 21, 2019
09d613e
Implemented DMA Extension trait
Jan561 Dec 22, 2019
66156aa
Removed example (didn't mean to push that)
Jan561 Dec 22, 2019
c3689f0
Changed rcc type from RCC to Ccdr
Jan561 Dec 22, 2019
b189688
Added DmaExt to prelude
Jan561 Dec 22, 2019
d62d6b1
Fixed compilation issue for other mcus
Jan561 Dec 23, 2019
9c73e3b
uhh hard to explain :) (fixed config register assignment of dma2 stre…
Jan561 Dec 24, 2019
9658022
Moved RAM into AXISRAM
Jan561 Dec 24, 2019
1674e80
Added effective_buffer_mode and fixed effective_circular_mode methods…
Jan561 Dec 24, 2019
5292c1f
Added AsImmutable trait
Jan561 Dec 24, 2019
16a617b
Using AsImmutable when input type might me mutable
Jan561 Dec 25, 2019
08213eb
bit of rework
Jan561 Dec 25, 2019
13271a5
Renamed Type parameter of safe transfer buffer
Jan561 Dec 28, 2019
cef803e
Renamed safe transfer buffer
Jan561 Dec 29, 2019
35419b4
wrapping enums for R/W buffers
Jan561 Jan 1, 2020
10bd944
Reworked safe transfer
Jan561 Jan 8, 2020
5a4d12b
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Jan 10, 2020
3faf0a8
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Mar 5, 2020
c7b618b
Move dma.rs into the dma directory
richardeoin Mar 7, 2020
f496187
Added dma feature gate
Jan561 Mar 8, 2020
838e3fc
switching to mod.rs style from 2018-style
Jan561 Mar 8, 2020
cf724cf
Added some documentation
Jan561 Mar 8, 2020
6915aec
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Mar 8, 2020
f97665f
Added some doc
Jan561 Mar 13, 2020
1ef4ed5
fmt
Jan561 Mar 13, 2020
e2e046a
Added Sealed trait
Jan561 Mar 15, 2020
0cceb5b
Removed Disabling state for dma stream
Jan561 Mar 15, 2020
17ae877
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Mar 15, 2020
5801937
After merge cleanup
Jan561 Mar 15, 2020
42600dd
minor changes
Jan561 Mar 16, 2020
3389b30
begun implementation of config builder
Jan561 Mar 19, 2020
d732c0a
update
Jan561 Mar 20, 2020
abd4b02
Implemented config type states
Jan561 Mar 20, 2020
aa243f1
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Mar 20, 2020
6ea6bcf
Merge branch 'master' into config_type_state
Jan561 Mar 20, 2020
a67f86d
update
Jan561 Mar 20, 2020
abe4521
update
Jan561 Mar 22, 2020
5269529
update
Jan561 Mar 24, 2020
aca7179
update
Jan561 Mar 24, 2020
3b8accc
update
Jan561 Mar 24, 2020
417daf1
implemented config builder
Jan561 Mar 26, 2020
ee5a8e7
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Mar 26, 2020
a98bf8f
Merge branch 'master' into config_type_state
Jan561 Mar 26, 2020
6114919
Implemented config struct for stream
Jan561 Mar 28, 2020
29993cc
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Mar 28, 2020
ebb223f
Merge branch 'master' into config_type_state
Jan561 Mar 28, 2020
9eeee2c
Made stream setters private and removed effective_CONF methods
Jan561 Mar 29, 2020
1afd27f
update
Jan561 Mar 29, 2020
80bbbc7
Implemented getter of config for stream
Jan561 Mar 30, 2020
91b884b
moved channel module into dma module
Jan561 Apr 1, 2020
fe3d0af
Removed dma::mux::shared module
Jan561 Apr 1, 2020
34bd18a
Fixed formatting
Jan561 Apr 1, 2020
def0fe3
Implemented UsartDmaRx (not yet in submodule for conditional compilat…
Jan561 Apr 9, 2020
f2b94af
Removed generic parameter `DMA` of Stream because unnecessary
Jan561 Apr 9, 2020
f3c596f
Moved usart dma code into sumbodule
Jan561 Apr 9, 2020
33380a7
Implemented safe_transfer transfer directions with buffers
Jan561 Apr 13, 2020
7bfbf86
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Apr 13, 2020
c6a5a14
Fixed doc
Jan561 Apr 13, 2020
d58d9b6
Reworking SafeTransfer
Jan561 Apr 17, 2020
4dab86a
Added enum-as-inner dependency to remove some bloat
Jan561 Apr 18, 2020
ad9fc7e
many things
Jan561 Apr 20, 2020
148c369
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Apr 20, 2020
e19cb50
splits dma into more modules
Jan561 Apr 21, 2020
76630dc
Moved TransferDirection from transfer to transfer::config
Jan561 Apr 21, 2020
8dd0fa8
Implemented methods for transfer
Jan561 Apr 21, 2020
4b888cf
fmt + doc
Jan561 Apr 21, 2020
4deac5c
update
Jan561 Apr 21, 2020
e599f51
Removed TransferBuffers struct as TransferDirection already checks it…
Jan561 Apr 23, 2020
3d33487
Implemented more methods for transfer
Jan561 Apr 23, 2020
be2378e
update
Jan561 Apr 23, 2020
e7beb6b
update
Jan561 Apr 24, 2020
baeda15
update
Jan561 Apr 24, 2020
0a07916
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Apr 24, 2020
b1f9feb
update
Jan561 Apr 25, 2020
d7aa593
Added option to halt the stream
Jan561 Apr 25, 2020
f39a4a1
update
Jan561 Apr 25, 2020
2df1b7a
minor change
Jan561 Apr 25, 2020
c2278b7
Moved isr implementations into isr structs
Jan561 Apr 26, 2020
956c0c7
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Apr 26, 2020
bf013dd
Started implementation of serial dma
Jan561 Apr 27, 2020
be1ea6c
update
Jan561 Apr 27, 2020
74d4aca
Merge branch 'master' of https://github.com/stm32-rs/stm32h7xx-hal
Jan561 Apr 27, 2020
e1c4455
fmt
Jan561 Apr 27, 2020
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5 changes: 4 additions & 1 deletion Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ version = "0.5.0"
authors = ["Andrew Straw <[email protected]>",
"Richard Meadows <[email protected]>",
"Henrik Böving <[email protected]>",
"Jan Adä <[email protected]>",
"Jan Adä <[email protected]>",
"Robert Jördens <[email protected]>",
"Florian Jung <[email protected]>"]
edition = "2018"
Expand All @@ -29,6 +29,8 @@ stm32h7 = "0.11.0"
void = { version = "1.0.2", default-features = false }
cast = { version = "0.2.2", default-features = false }
nb = "0.1.2"
# FIXME: Change to crates.io when next version (> 0.3.2) gets released
enum-as-inner = { git = "https://github.com/bluejekyll/enum-as-inner", rev = "9670594f29ade6feba581ee746736087e335210b" }
paste = "0.1.10"

[dependencies.bare-metal]
Expand All @@ -47,6 +49,7 @@ device-selected = []
revision_v = []
singlecore = []
dualcore = []
dma = []
cm4 = []
cm7 = []
rt = ["stm32h7/rt"]
Expand Down
22 changes: 12 additions & 10 deletions examples/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7,19 +7,13 @@ extern crate panic_itm;
use cortex_m;
use cortex_m_rt::entry;

use stm32h7xx_hal::{
adc,
pac,
delay::Delay,
prelude::*,
};
use stm32h7xx_hal::{adc, delay::Delay, pac, prelude::*};

use cortex_m_log::println;
use cortex_m_log::{
destination::Itm, printer::itm::InterruptSync as InterruptSyncItm,
};


#[entry]
fn main() -> ! {
let cp = cortex_m::Peripherals::take().unwrap();
Expand All @@ -36,9 +30,12 @@ fn main() -> ! {
let rcc = dp.RCC.constrain();

// setting this per_ck to 4 Mhz here (which is gonna choose the CSI that runs at exactly 4 Mhz) as the adc requires per_ck as its
// own kernel clock and wouldn't work at all if per_ck wouldnt be enabled or loose a few bits if it was too fast
// own kernel clock and wouldn't work at all if per_ck wouldnt be enabled or loose a few bits if it was too fast
// (the maximum for this is 36 Mhz)
let mut ccdr = rcc.sys_ck(100.mhz()).per_ck(4.mhz()).freeze(vos, &dp.SYSCFG);
let mut ccdr = rcc
.sys_ck(100.mhz())
.per_ck(4.mhz())
.freeze(vos, &dp.SYSCFG);

println!(log, "");
println!(log, "stm32h7xx-hal example - ADC");
Expand All @@ -59,6 +56,11 @@ fn main() -> ! {
loop {
let data: u32 = adc3.read(&mut channel).unwrap();
// voltage = reading * (vref/resolution)
println!(log, "ADC reading: {}, voltage for nucleo: {}", data, data as f32 * (3.3/adc3.max_sample() as f32));
println!(
log,
"ADC reading: {}, voltage for nucleo: {}",
data,
data as f32 * (3.3 / adc3.max_sample() as f32)
);
}
}
8 changes: 5 additions & 3 deletions memory.x
Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,9 @@ MEMORY
/* FLASH and RAM are mandatory memory regions */
FLASH : ORIGIN = 0x08000000, LENGTH = 1024K
FLASH1 : ORIGIN = 0x08100000, LENGTH = 1024K
RAM : ORIGIN = 0x20000000, LENGTH = 128K

/* AXISRAM */
AXISRAM : ORIGIN = 0x24000000, LENGTH = 512K
/* AXISRAM = RAM */
RAM : ORIGIN = 0x24000000, LENGTH = 512K

/* SRAM */
SRAM1 : ORIGIN = 0x30000000, LENGTH = 128K
Expand All @@ -19,6 +18,9 @@ MEMORY

/* Instruction TCM */
ITCM : ORIGIN = 0x00000000, LENGTH = 64K

/* Data TCM */
DTCM : ORIGIN = 0x20000000, LENGTH = 128K
}

/* The location of the stack can be overridden using the
Expand Down
244 changes: 244 additions & 0 deletions src/dma/macros.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,244 @@
//! Macros

macro_rules! type_state {
($trait:ident $({$($item_def:item),*})?, $($type_state:ident $({$($item_impl:item),*})?),*) => {
pub trait $trait: Copy + Clone + PartialEq + Eq + core::fmt::Debug + crate::private::Sealed {
$(
$(
$item_def
)*
)?
}

$(
#[derive(Copy, Clone, PartialEq, Eq, PartialOrd, Ord, Debug, Hash)]
pub struct $type_state {
_private: (),
}

impl crate::private::Sealed for $type_state {}

impl $trait for $type_state {
$(
$(
$item_impl
)*
)?
}
)*
};
}

/// Macro for generating enums that map one-to-one to bool values.
///
/// To set the default variant, write `(D)` after it.
macro_rules! bool_enum {
($name:ident, $doc:tt, $v_false:ident $((D $($_syntax_false:ident)?))?, $v_true:ident $((D $($_syntax_true:ident)?))?) => {
#[doc=$doc]
#[derive(Debug, PartialEq, Eq, Clone, Copy)]
pub enum $name {
$v_false,
$v_true,
}

impl From<$name> for bool {
fn from(val: $name) -> bool {
val == $name::$v_true
}
}

impl From<bool> for $name {
fn from(val: bool) -> Self {
if val {
$name::$v_true
} else {
$name::$v_false
}
}
}

$(
impl Default for $name {
fn default() -> Self {
$name::$v_false
}
}
// Needed because otherwise the macro would lack a syntax variable being matched to
$(
type $_syntax_false = __INVALID__;
)?
)?

$(
impl Default for $name {
fn default() -> Self {
$name::$v_true
}
}
// Needed because otherwise the macro would lack a syntax variable being matched to
$(
type $_syntax_true = __INVALID__;
)?
)?
};
}

/// Macro for generating enums that map one-to-one to int values of type `$ty`.
///
/// To set the default variant, write `(D)` after it.
macro_rules! int_enum {
($name:ident <=> $ty:ty, $doc:tt, $($variant:ident <=> $num:tt $((D $($_syntax:ident)?))?),*) => {
#[doc=$doc]
#[derive(Debug, PartialEq, Eq, Clone, Copy)]
pub enum $name {
$(
$variant,
)*
}

impl From<$name> for $ty {
fn from(val: $name) -> $ty {
match val {
$(
$name::$variant => $num,
)*
}
}
}

impl core::convert::TryFrom<$ty> for $name {
type Error = &'static str;

fn try_from(val: $ty) -> Result<Self, &'static str> {
match val {
$(
$num => Ok($name::$variant),
)*
_ => Err("Conversion failed"),
}
}
}

$(
$(
impl Default for $name {
fn default() -> Self {
$name::$variant
}
}
// Needed because otherwise the macro would lack a syntax variable being matched to
$(
type $_syntax = __INVALID__;
)?
)?
)*
};
}

/// Macro for generating structs closely related to integers.
///
/// Attention: If you don't want to limit the length of the stored value,
/// set `$len = 0`.
macro_rules! int_struct {
($name:ident, $int_type:ident, $len:tt, $doc:tt $(, $default:tt)?) => {
int_struct! { @INNER $name, $doc, $int_type, $len $(, $default)? }
};
(@INNER $name:ident, $doc:tt, $int_type:ident, 0 $(, $default:tt)?) => {
#[doc=$doc]
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub struct $name(pub $int_type);

impl $name {
pub fn new(val: $int_type) -> Self {
$name(val)
}

pub fn set_value(&mut self, val: $int_type) {
self.0 = val;
}

pub fn value(self) -> $int_type {
self.0
}
}

impl From<$int_type> for $name {
fn from(val: $int_type) -> Self {
$name::new(val)
}
}

impl From<$name> for $int_type {
fn from(val: $name) -> $int_type {
val.value()
}
}

$(
impl Default for $name {
fn default() -> $name {
$name($default)
}
}
)?
};
(@INNER $name:ident, $doc:tt, $int_type:ident, $len:tt $(, $default:tt)?) => {
#[doc=$doc]
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub struct $name($int_type);

impl $name {
pub fn new(val: $int_type) -> Self {
if !$name::is_val_valid(val) {
// Expression `(1 << $len) - 1` overflows if $len = len of $int_type
panic!("The given value is incompatible with this type (max_value={}, got={})", (1 << $len) - 1, val);
}

$name(val)
}

pub fn value(self) -> $int_type {
self.0
}

pub fn set_value(&mut self, val: $int_type) {
if !$name::is_val_valid(val) {
panic!("The given value is incompatible with this type (max_value={}, got={})", (1 << $len) - 1, val);
}

self.0 = val;
}

fn is_val_valid(val: $int_type) -> bool {
val >> ($len - 1) <= 0b1
}
}

impl From<$name> for $int_type {
fn from(val: $name) -> $int_type {
val.value()
}
}

impl core::convert::TryFrom<$int_type> for $name {
// FIXME
type Error = &'static str;

fn try_from(val: $int_type) -> Result<Self, &'static str> {
if $name::is_val_valid(val) {
Ok($name::new(val))
} else {
Err("Conversion failed.")
}
}
}

$(
impl Default for $name {
fn default() -> $name {
$name($default)
}
}
)?
};
}
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