Add SDMMC support.

.github/workflows/ci.yml

@@ -25,10 +25,10 @@ jobs:
           - { id: stm32l462, additional-features: ",stm32-usbd" }
           - { id: stm32l471, additional-features: "" }
           - { id: stm32l475, additional-features: "" } # USB_OTG not supported by PAC
-          - { id: stm32l476, additional-features: ",otg_fs" }
-          - { id: stm32l486, additional-features: ",otg_fs" }
-          - { id: stm32l496, additional-features: ",otg_fs" }
-          - { id: stm32l4a6, additional-features: ",otg_fs" }
+          - { id: stm32l476, additional-features: ",otg_fs,sdmmc,embedded-sdmmc,fatfs" }
+          - { id: stm32l486, additional-features: ",otg_fs,sdmmc,embedded-sdmmc,fatfs" }
+          - { id: stm32l496, additional-features: ",otg_fs,sdmmc,embedded-sdmmc,fatfs" }
+          - { id: stm32l4a6, additional-features: ",otg_fs,sdmmc,embedded-sdmmc,fatfs" }
 
     steps:
       - uses: actions/checkout@v2

Cargo.toml

@@ -28,6 +28,9 @@ embedded-dma = "0.1"
 bxcan = ">=0.4, <0.7"
 fugit = "0.3.5"
 bitfield = "0.13.2"
+sdio-host = { version = "0.7.0", optional = true }
+embedded-sdmmc = { version = "0.3.0", optional = true }
+fatfs = { version = "0.4.0", default-features = false, optional = true }
 
 [dependencies.rand_core]
 version = "0.6.2"
@@ -69,6 +72,9 @@ features = ["rt", "stm32l432", "stm32-usbd"]
 rt = ["stm32l4/rt"]
 unproven = ["embedded-hal/unproven"]
 otg_fs = ["synopsys-usb-otg"]
+sdmmc = ["dep:sdio-host"]
+embedded-sdmmc = ["dep:embedded-sdmmc", "sdmmc"]
+fatfs = ["dep:fatfs", "sdmmc"]
 
 # L4x1
 stm32l431 = [ "stm32l4/stm32l4x1" ]
@@ -203,3 +209,6 @@ required-features = ["rt"]
 [[example]]
 name = "adc_dma"
 required-features = ["rt"]
+
+[patch.crates-io]
+fatfs = { git = "https://github.com/rafalh/rust-fatfs" }

examples/rng.rs

@@ -12,6 +12,7 @@ use crate::hal::prelude::*;
 use crate::hal::serial::{Config, Serial};
 use crate::hal::stm32;
 use hal::hal::blocking::rng::Read;
+use hal::rcc::Clk48Source;
 
 macro_rules! uprint {
     ($serial:expr, $($arg:tt)*) => {
@@ -39,7 +40,28 @@ fn main() -> ! {
 
     let clocks = rcc
         .cfgr
-        .hsi48(true) // needed for RNG
+        // Needed for RNG.
+        .clk48_source({
+            #[cfg(any(
+                feature = "stm32l476",
+                feature = "stm32l486",
+                feature = "stm32l496",
+                feature = "stm32l4a6"
+            ))]
+            {
+                Clk48Source::Hsi48
+            }
+
+            #[cfg(not(any(
+                feature = "stm32l476",
+                feature = "stm32l486",
+                feature = "stm32l496",
+                feature = "stm32l4a6"
+            )))]
+            {
+                Clk48Source::Msi
+            }
+        })
         .sysclk(64.MHz())
         .pclk1(32.MHz())
         .freeze(&mut flash.acr, &mut pwr);

examples/usb_serial.rs

@@ -6,6 +6,7 @@
 extern crate panic_semihosting;
 
 use cortex_m_rt::entry;
+use stm32l4xx_hal::rcc::Clk48Source;
 use stm32l4xx_hal::usb::{Peripheral, UsbBus};
 use stm32l4xx_hal::{prelude::*, stm32};
 use usb_device::prelude::*;
@@ -43,7 +44,28 @@ fn main() -> ! {
 
     let _clocks = rcc
         .cfgr
-        .hsi48(true)
+        // Needed for USB.
+        .clk48_source({
+            #[cfg(any(
+                feature = "stm32l476",
+                feature = "stm32l486",
+                feature = "stm32l496",
+                feature = "stm32l4a6"
+            ))]
+            {
+                Clk48Source::Hsi48
+            }
+
+            #[cfg(not(any(
+                feature = "stm32l476",
+                feature = "stm32l486",
+                feature = "stm32l496",
+                feature = "stm32l4a6"
+            )))]
+            {
+                Clk48Source::Msi
+            }
+        })
         .sysclk(80.MHz())
         .freeze(&mut flash.acr, &mut pwr);
 

src/dma.rs

@@ -541,6 +541,7 @@ macro_rules! dma {
                     /// A singleton that represents a single DMAx channel (channel X in this case)
                     ///
                     /// This singleton has exclusive access to the registers of the DMAx channel X
+                    #[derive(Debug)]
                     pub struct $CX;
 
                     impl $CX {
@@ -594,7 +595,9 @@ macro_rules! dma {
                         #[inline]
                         pub fn listen(&mut self, event: Event) {
                             match event {
-                                Event::HalfTransfer => self.ccr().modify(|_, w| w.htie().set_bit()),
+                                Event::HalfTransfer => {
+                                    self.ccr().modify(|_, w| w.htie().set_bit())
+                                },
                                 Event::TransferComplete => {
                                     self.ccr().modify(|_, w| w.tcie().set_bit())
                                 }

src/lib.rs

@@ -158,6 +158,7 @@ pub mod qspi;
 pub mod rcc;
 pub mod rng;
 pub mod rtc;
+pub mod sdmmc;
 pub mod serial;
 pub mod signature;
 pub mod spi;